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authorWolfgang Denk <wd@denx.de>2008-02-15 00:06:18 +0100
committerWolfgang Denk <wd@denx.de>2008-02-15 00:06:18 +0100
commit6f99eec3dc2285abfb93631003f7e5cadf2eab0f (patch)
tree1eaaa31eb768d8bfa68e9ff41eef53d37b64f21c /include/asm-blackfin/mach-common/bits/ppi.h
parentf6921e3dc331293c873ec4d109fd5517a42a90b3 (diff)
parent30942b18b66f35f2ceedab39af10e9eccaa943cc (diff)
downloadtalos-obmc-uboot-6f99eec3dc2285abfb93631003f7e5cadf2eab0f.tar.gz
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Merge branch 'master' of git://www.denx.de/git/u-boot-blackfin
Conflicts: Makefile doc/README.standalone Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/asm-blackfin/mach-common/bits/ppi.h')
-rw-r--r--include/asm-blackfin/mach-common/bits/ppi.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-common/bits/ppi.h b/include/asm-blackfin/mach-common/bits/ppi.h
new file mode 100644
index 0000000000..523f2388e4
--- /dev/null
+++ b/include/asm-blackfin/mach-common/bits/ppi.h
@@ -0,0 +1,38 @@
+/*
+ * PPI Masks
+ */
+
+#ifndef __BFIN_PERIPHERAL_PPI__
+#define __BFIN_PERIPHERAL_PPI__
+
+/* PPI_CONTROL Masks */
+#define PORT_EN 0x0001 /* PPI Port Enable */
+#define PORT_DIR 0x0002 /* PPI Port Direction */
+#define XFR_TYPE 0x000C /* PPI Transfer Type */
+#define PORT_CFG 0x0030 /* PPI Port Configuration */
+#define FLD_SEL 0x0040 /* PPI Active Field Select */
+#define PACK_EN 0x0080 /* PPI Packing Mode */
+#define DMA32 0x0100 /* PPI 32-bit DMA Enable */
+#define SKIP_EN 0x0200 /* PPI Skip Element Enable */
+#define SKIP_EO 0x0400 /* PPI Skip Even/Odd Elements */
+#define DLENGTH 0x3800 /* PPI Data Length */
+#define DLEN_8 0x0000 /* Data Length = 8 Bits */
+#define DLEN_10 0x0800 /* Data Length = 10 Bits */
+#define DLEN_11 0x1000 /* Data Length = 11 Bits */
+#define DLEN_12 0x1800 /* Data Length = 12 Bits */
+#define DLEN_13 0x2000 /* Data Length = 13 Bits */
+#define DLEN_14 0x2800 /* Data Length = 14 Bits */
+#define DLEN_15 0x3000 /* Data Length = 15 Bits */
+#define DLEN_16 0x3800 /* Data Length = 16 Bits */
+#define POLC 0x4000 /* PPI Clock Polarity */
+#define POLS 0x8000 /* PPI Frame Sync Polarity */
+
+/* PPI_STATUS Masks */
+#define FLD 0x0400 /* Field Indicator */
+#define FT_ERR 0x0800 /* Frame Track Error */
+#define OVR 0x1000 /* FIFO Overflow Error */
+#define UNDR 0x2000 /* FIFO Underrun Error */
+#define ERR_DET 0x4000 /* Error Detected Indicator */
+#define ERR_NCOR 0x8000 /* Error Not Corrected Indicator */
+
+#endif
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