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| author | Stefano Babic <sbabic@denx.de> | 2016-06-18 10:24:54 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-06-18 10:25:13 +0200 |
| commit | dc557e9a1fe00ca9d884bd88feef5bebf23fede4 (patch) | |
| tree | ec09fdf8f7c4c44e30f4b38b7459a2cbbb71d094 /board/freescale/t104xrdb/ddr.h | |
| parent | d2ba7a6adcef6e6f8c4418c7b0caf9d7ab98a6d4 (diff) | |
| parent | 6b3943f1b04be60f147ee540fbd72c4c7ea89f80 (diff) | |
| download | talos-obmc-uboot-dc557e9a1fe00ca9d884bd88feef5bebf23fede4.tar.gz talos-obmc-uboot-dc557e9a1fe00ca9d884bd88feef5bebf23fede4.zip | |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board/freescale/t104xrdb/ddr.h')
| -rw-r--r-- | board/freescale/t104xrdb/ddr.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h index b9c02f7fe0..012991cf46 100644 --- a/board/freescale/t104xrdb/ddr.h +++ b/board/freescale/t104xrdb/ddr.h @@ -29,20 +29,20 @@ static const struct board_specific_parameters udimm0[] = { * ranks| mhz| GB |adjst| start | ctl2 */ #ifdef CONFIG_SYS_FSL_DDR4 - {2, 1600, 4, 4, 6, 0x07090A0c, 0x0e0f100a}, + {2, 1600, 4, 8, 6, 0x07090A0c, 0x0e0f100a}, #elif defined(CONFIG_SYS_FSL_DDR3) - {2, 833, 4, 4, 6, 0x06060607, 0x08080807}, - {2, 833, 0, 4, 6, 0x06060607, 0x08080807}, - {2, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09}, - {2, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09}, - {2, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A}, - {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A}, - {1, 833, 4, 4, 6, 0x06060607, 0x08080807}, - {1, 833, 0, 4, 6, 0x06060607, 0x08080807}, - {1, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09}, - {1, 1350, 0, 4, 7, 0x0708080A, 0x0A0B0C09}, - {1, 1666, 4, 4, 7, 0x0808090B, 0x0C0D0E0A}, - {1, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A}, + {2, 833, 4, 8, 6, 0x06060607, 0x08080807}, + {2, 833, 0, 8, 6, 0x06060607, 0x08080807}, + {2, 1350, 4, 8, 7, 0x0708080A, 0x0A0B0C09}, + {2, 1350, 0, 8, 7, 0x0708080A, 0x0A0B0C09}, + {2, 1666, 4, 8, 7, 0x0808090B, 0x0C0D0E0A}, + {2, 1666, 0, 8, 7, 0x0808090B, 0x0C0D0E0A}, + {1, 833, 4, 8, 6, 0x06060607, 0x08080807}, + {1, 833, 0, 8, 6, 0x06060607, 0x08080807}, + {1, 1350, 4, 8, 7, 0x0708080A, 0x0A0B0C09}, + {1, 1350, 0, 8, 7, 0x0708080A, 0x0A0B0C09}, + {1, 1666, 4, 8, 7, 0x0808090B, 0x0C0D0E0A}, + {1, 1666, 0, 8, 7, 0x0808090B, 0x0C0D0E0A}, #else #error DDR type not defined #endif |
