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authorKumar Gala <galak@kernel.crashing.org>2011-02-09 02:00:08 +0000
committerKumar Gala <galak@kernel.crashing.org>2011-04-27 22:29:04 -0500
commite02aea61cb17fc1e39368e4911491305d805e886 (patch)
tree4bbff9a3f7309744dbcea8f2de9e4529127d34b7 /board/freescale/corenet_ds/p5020ds_ddr.c
parentdf8af0b4a63b6375e7abbaffe1f93cc01c34529c (diff)
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powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)
The P3041DS & P5020DS boards are almost identical (except for the processor in them). Additionally they are based on the P4080DS board design so we use the some board code for all 3 boards. Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock configuration. Additionally, the P3041DS/P5020DS support NAND. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/corenet_ds/p5020ds_ddr.c')
-rw-r--r--board/freescale/corenet_ds/p5020ds_ddr.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/board/freescale/corenet_ds/p5020ds_ddr.c b/board/freescale/corenet_ds/p5020ds_ddr.c
new file mode 100644
index 0000000000..e65de364d7
--- /dev/null
+++ b/board/freescale/corenet_ds/p5020ds_ddr.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <asm/fsl_ddr_sdram.h>
+
+fixed_ddr_parm_t fixed_ddr_parm_0[] = {
+ {0, 0, NULL}
+};
+
+fixed_ddr_parm_t fixed_ddr_parm_1[] = {
+ {0, 0, NULL}
+};
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