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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-02-26 14:21:41 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-02-29 03:50:16 +0900
commit4f19f6118478c8bbf4bd435404094b23991ad225 (patch)
tree9c06698652d1ee3e40044d62cdd60f59437d0c9e /arch/arm/mach-uniphier/dram_init.c
parent4021b4381d8d3c18a3d8732967eec3ec1624ab7b (diff)
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ARM: uniphier: merge DDR PHY init code for 3 SoCs
Now these three are almost the same. The only difference is the DTPR1 register dependency on the DRAM size, but it can be ignored. (It has already been ignored in PH1-sLD8 and PH1-Pro4.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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