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authorMingkai Hu <Mingkai.Hu@freescale.com>2015-10-26 19:47:51 +0800
committerYork Sun <yorksun@freescale.com>2015-10-29 10:34:00 -0700
commit8281c58fd46d095e28e60b2fb0ce84b4444896f8 (patch)
treef2e2bc68eb6d3fdcd7cc99a3718602206477029c /arch/arm/include/asm/arch-fsl-layerscape/soc.h
parent9f3183d2d69f6d392fb943d249934f8648531e7e (diff)
downloadtalos-obmc-uboot-8281c58fd46d095e28e60b2fb0ce84b4444896f8.tar.gz
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armv8/fsl_lsch2: Add fsl_lsch2 SoC
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with ARMv8 cores and 2rd generation of Chassis. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/soc.h')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/soc.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index f131f5754b..5ed456e4e2 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -33,6 +33,7 @@ struct cpu_type {
{ .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)}
#define SVR_WO_E 0xFFFFFE
+#define SVR_LS1043 0x879204
#define SVR_LS2045 0x870120
#define SVR_LS2080 0x870110
#define SVR_LS2085 0x870100
@@ -42,6 +43,11 @@ struct cpu_type {
#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E)
#define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1))
+#ifdef CONFIG_FSL_LSCH3
void fsl_lsch3_early_init_f(void);
+#elif defined(CONFIG_FSL_LSCH2)
+void fsl_lsch2_early_init_f(void);
+#endif
+
void cpu_name(char *name);
#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
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