From 8281c58fd46d095e28e60b2fb0ce84b4444896f8 Mon Sep 17 00:00:00 2001 From: Mingkai Hu Date: Mon, 26 Oct 2015 19:47:51 +0800 Subject: armv8/fsl_lsch2: Add fsl_lsch2 SoC Freescale LayerScape with Chassis Generation 2 is a set of SoCs with ARMv8 cores and 2rd generation of Chassis. Signed-off-by: Li Yang Signed-off-by: Hou Zhiqiang Signed-off-by: Mingkai Hu Signed-off-by: Gong Qianyu Reviewed-by: York Sun --- arch/arm/include/asm/arch-fsl-layerscape/soc.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/include/asm/arch-fsl-layerscape/soc.h') diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index f131f5754b..5ed456e4e2 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -33,6 +33,7 @@ struct cpu_type { { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)} #define SVR_WO_E 0xFFFFFE +#define SVR_LS1043 0x879204 #define SVR_LS2045 0x870120 #define SVR_LS2080 0x870110 #define SVR_LS2085 0x870100 @@ -42,6 +43,11 @@ struct cpu_type { #define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) #define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1)) +#ifdef CONFIG_FSL_LSCH3 void fsl_lsch3_early_init_f(void); +#elif defined(CONFIG_FSL_LSCH2) +void fsl_lsch2_early_init_f(void); +#endif + void cpu_name(char *name); #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */ -- cgit v1.2.1