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| author | Olof Johansson <olof@lixom.net> | 2015-04-01 17:52:02 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-04-01 17:52:02 -0700 |
| commit | 824f25c1ccded5de2d3e18268b91cddccdad3868 (patch) | |
| tree | 11122c29a02e59c1b6f4fe6c23c902bc25bf80f3 /arch/arm/mach-rockchip/pm.c | |
| parent | ffe971ef40ca147ab0443ea12ed4fc552bb28498 (diff) | |
| parent | a0307d186f5015ee3d77e209e5c06190cbf02478 (diff) | |
| download | talos-obmc-linux-824f25c1ccded5de2d3e18268b91cddccdad3868.tar.gz talos-obmc-linux-824f25c1ccded5de2d3e18268b91cddccdad3868.zip | |
Merge tag 'v4.1-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Merge "ARM: rockchip: soc code changes for 4.1" from Heiko Stuebner:
Some suspend improvements reducing resume time and making sure the
watchdog does not reset after 12 hours and a change to constify and
staticize some smp parts.
* tag 'v4.1-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: disable watchdog during suspend
ARM: rockchip: decrease the wait time for resume
ARM: rockchip: Constify struct regmap_config and staticize local function
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-rockchip/pm.c')
| -rw-r--r-- | arch/arm/mach-rockchip/pm.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/mach-rockchip/pm.c b/arch/arm/mach-rockchip/pm.c index 50cb781aaa36..b07d88602073 100644 --- a/arch/arm/mach-rockchip/pm.c +++ b/arch/arm/mach-rockchip/pm.c @@ -75,9 +75,13 @@ static void rk3288_slp_mode_set(int level) regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON, &rk3288_pmu_pwr_mode_con); - /* set bit 8 so that system will resume to FAST_BOOT_ADDR */ + /* + * SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR + * PCLK_WDT_GATE - disable WDT during suspend. + */ regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0, - SGRF_FAST_BOOT_EN | SGRF_FAST_BOOT_EN_WRITE); + SGRF_PCLK_WDT_GATE | SGRF_FAST_BOOT_EN + | SGRF_PCLK_WDT_GATE_WRITE | SGRF_FAST_BOOT_EN_WRITE); /* booting address of resuming system is from this register value */ regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR, @@ -122,7 +126,8 @@ static void rk3288_slp_mode_set_resume(void) rk3288_pmu_pwr_mode_con); regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0, - rk3288_sgrf_soc_con0 | SGRF_FAST_BOOT_EN_WRITE); + rk3288_sgrf_soc_con0 | SGRF_PCLK_WDT_GATE_WRITE + | SGRF_FAST_BOOT_EN_WRITE); } static int rockchip_lpmode_enter(unsigned long arg) @@ -209,6 +214,9 @@ static int rk3288_suspend_init(struct device_node *np) memcpy(rk3288_bootram_base, rockchip_slp_cpu_resume, rk3288_bootram_sz); + regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, OSC_STABL_CNT_THRESH); + regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, PMU_STABL_CNT_THRESH); + return 0; } |
