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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-02-05 17:55:01 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-03-06 07:40:36 +0100 |
| commit | bab86b948e8e1052a82c8723db717ae3d727f2fa (patch) | |
| tree | b0b8ac491013a8bc92c65c5c618877e308aa4fdc | |
| parent | b8fa6ca601908653a14bddc75691f41d29d15f76 (diff) | |
| download | talos-obmc-linux-bab86b948e8e1052a82c8723db717ae3d727f2fa.tar.gz talos-obmc-linux-bab86b948e8e1052a82c8723db717ae3d727f2fa.zip | |
ARM: sun5i: Add UART2 pin group
There's one UART2 pin group that can be used across all sun5i SoCs.
However, the A10s already has one pin group for that controller.
Change the index of the one in the A10s DTSI, and add the common one to
sun5i.dtsi
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| -rw-r--r-- | arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun5i-a10s.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sun5i.dtsi | 10 |
3 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index 9fbeb584abf5..baee64d61f6d 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -257,7 +257,7 @@ &uart2 { pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins_a>; + pinctrl-0 = <&uart2_pins_b>; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 0c08b6173d9c..5122d1179e59 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -151,7 +151,7 @@ function = "uart0"; }; - uart2_pins_a: uart2@0 { + uart2_pins_b: uart2@1 { pins = "PC18", "PC19"; function = "uart2"; }; diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index a9574a6cd95c..83da6366d062 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -331,6 +331,16 @@ function = "spi2"; }; + uart2_pins_a: uart2@0 { + pins = "PD2", "PD3"; + function = "uart2"; + }; + + uart2_cts_rts_pins_a: uart2-cts-rts@0 { + pins = "PD4", "PD5"; + function = "uart2"; + }; + uart3_pins_a: uart3@0 { pins = "PG9", "PG10"; function = "uart3"; |
