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authorCatalin Udma <catalin.udma@freescale.com>2013-06-05 15:22:08 -0500
committerScott Wood <scottwood@freescale.com>2013-08-07 18:38:03 -0500
commit96c3c9e78f7fe45303985cce13ce26e35afd01ba (patch)
tree96f0e95f0472e909dde39b3e1afe505a53398d2e
parenta9a5cda06922545ed7540cf5ed7e5ad6b80851d9 (diff)
downloadtalos-obmc-linux-96c3c9e78f7fe45303985cce13ce26e35afd01ba.tar.gz
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powerpc/perf: increase the perf HW events to 6
This change is required after the e6500 perf support has been added. There are 6 counters in e6500 core instead of 4 in e500 core and the MAX_HWEVENTS counter should be changed accordingly from 4 to 6. Added also runtime check for counters overflow. Signed-off-by: Catalin Udma <catalin.udma@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--arch/powerpc/include/asm/perf_event_fsl_emb.h2
-rw-r--r--arch/powerpc/perf/core-fsl-emb.c6
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/perf_event_fsl_emb.h b/arch/powerpc/include/asm/perf_event_fsl_emb.h
index 718a9fa94e68..a58165450f6f 100644
--- a/arch/powerpc/include/asm/perf_event_fsl_emb.h
+++ b/arch/powerpc/include/asm/perf_event_fsl_emb.h
@@ -13,7 +13,7 @@
#include <linux/types.h>
#include <asm/hw_irq.h>
-#define MAX_HWEVENTS 4
+#define MAX_HWEVENTS 6
/* event flags */
#define FSL_EMB_EVENT_VALID 1
diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-emb.c
index 106c53354675..0b13f74f5fb3 100644
--- a/arch/powerpc/perf/core-fsl-emb.c
+++ b/arch/powerpc/perf/core-fsl-emb.c
@@ -462,6 +462,12 @@ static int fsl_emb_pmu_event_init(struct perf_event *event)
int num_restricted;
int i;
+ if (ppmu->n_counter > MAX_HWEVENTS) {
+ WARN(1, "No. of perf counters (%d) is higher than max array size(%d)\n",
+ ppmu->n_counter, MAX_HWEVENTS);
+ ppmu->n_counter = MAX_HWEVENTS;
+ }
+
switch (event->attr.type) {
case PERF_TYPE_HARDWARE:
ev = event->attr.config;
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