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| author | Andres Rodriguez <andresx7@gmail.com> | 2017-10-13 14:58:14 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-10-19 15:26:48 -0400 |
| commit | 8bc4c256f4995d315eb9cce6e47b4885c79ff661 (patch) | |
| tree | d4ca85b49d7bb1cc69581bbbb8eca9d23473ef28 | |
| parent | 52c6a62c64fac03a434cdacf6ef671c6a9e9000f (diff) | |
| download | talos-obmc-linux-8bc4c256f4995d315eb9cce6e47b4885c79ff661.tar.gz talos-obmc-linux-8bc4c256f4995d315eb9cce6e47b4885c79ff661.zip | |
drm/amdgpu: rename context priority levels
Don't leak implementation details about how each priority behaves to
usermode. This allows greater flexibility in the future.
Squash into c2636dc53abd8269a0930bccd564f2f195dba729
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c | 8 | ||||
| -rw-r--r-- | include/uapi/drm/amdgpu_drm.h | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c index cd123306eda7..290cc3f9c433 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c @@ -32,14 +32,14 @@ enum amd_sched_priority amdgpu_to_sched_priority(int amdgpu_priority) { switch (amdgpu_priority) { - case AMDGPU_CTX_PRIORITY_HIGH_HW: + case AMDGPU_CTX_PRIORITY_VERY_HIGH: return AMD_SCHED_PRIORITY_HIGH_HW; - case AMDGPU_CTX_PRIORITY_HIGH_SW: + case AMDGPU_CTX_PRIORITY_HIGH: return AMD_SCHED_PRIORITY_HIGH_SW; case AMDGPU_CTX_PRIORITY_NORMAL: return AMD_SCHED_PRIORITY_NORMAL; - case AMDGPU_CTX_PRIORITY_LOW_SW: - case AMDGPU_CTX_PRIORITY_LOW_HW: + case AMDGPU_CTX_PRIORITY_LOW: + case AMDGPU_CTX_PRIORITY_VERY_LOW: return AMD_SCHED_PRIORITY_LOW; case AMDGPU_CTX_PRIORITY_UNSET: return AMD_SCHED_PRIORITY_UNSET; diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index a332de1aeb42..d0a3ea69eab6 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -172,12 +172,12 @@ union drm_amdgpu_bo_list { /* Context priority level */ #define AMDGPU_CTX_PRIORITY_UNSET -2048 -#define AMDGPU_CTX_PRIORITY_LOW_HW -1023 -#define AMDGPU_CTX_PRIORITY_LOW_SW -512 +#define AMDGPU_CTX_PRIORITY_VERY_LOW -1023 +#define AMDGPU_CTX_PRIORITY_LOW -512 #define AMDGPU_CTX_PRIORITY_NORMAL 0 /* Selecting a priority above NORMAL requires CAP_SYS_NICE or DRM_MASTER */ -#define AMDGPU_CTX_PRIORITY_HIGH_SW 512 -#define AMDGPU_CTX_PRIORITY_HIGH_HW 1023 +#define AMDGPU_CTX_PRIORITY_HIGH 512 +#define AMDGPU_CTX_PRIORITY_VERY_HIGH 1023 struct drm_amdgpu_ctx_in { /** AMDGPU_CTX_OP_* */ |
