diff options
| author | Milo Kim <woogyom.kim@gmail.com> | 2016-11-15 22:02:13 +0900 |
|---|---|---|
| committer | Lee Jones <lee.jones@linaro.org> | 2016-11-29 08:21:39 +0000 |
| commit | 6d2c2b9f806a4ec81833af533d57395db856d5a3 (patch) | |
| tree | b79c7d99b2bcb11901f2a2a4fa055ea7333fd56a | |
| parent | f66020640367affd8efa788dc3f904acac435244 (diff) | |
| download | talos-obmc-linux-6d2c2b9f806a4ec81833af533d57395db856d5a3.tar.gz talos-obmc-linux-6d2c2b9f806a4ec81833af533d57395db856d5a3.zip | |
mfd: tps65217: Update register interrupt mask bits instead of writing operation
TPS65217 interrupt register includes read/writeable mask bits with
read-only status bits. (bit 4, 5, 6 are R/W, bit 0, 1, 2 are RO)
And reserved bit is not required.
Register update operation is preferred for disabling all interrupts during
the device initialisation.
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
| -rw-r--r-- | drivers/mfd/tps65217.c | 7 | ||||
| -rw-r--r-- | include/linux/mfd/tps65217.h | 3 |
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/mfd/tps65217.c b/drivers/mfd/tps65217.c index 77fb8122abd8..9d76de99b2e3 100644 --- a/drivers/mfd/tps65217.c +++ b/drivers/mfd/tps65217.c @@ -189,10 +189,9 @@ static int tps65217_irq_init(struct tps65217 *tps, int irq) tps->irq = irq; /* Mask all interrupt sources */ - tps->irq_mask = (TPS65217_INT_RESERVEDM | TPS65217_INT_PBM - | TPS65217_INT_ACM | TPS65217_INT_USBM); - tps65217_reg_write(tps, TPS65217_REG_INT, tps->irq_mask, - TPS65217_PROTECT_NONE); + tps->irq_mask = TPS65217_INT_MASK; + tps65217_set_bits(tps, TPS65217_REG_INT, TPS65217_INT_MASK, + TPS65217_INT_MASK, TPS65217_PROTECT_NONE); tps->irq_domain = irq_domain_add_linear(tps->dev->of_node, TPS65217_NUM_IRQ, &tps65217_irq_domain_ops, tps); diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h index 4ccda8969639..dfa9f0d0ae2b 100644 --- a/include/linux/mfd/tps65217.h +++ b/include/linux/mfd/tps65217.h @@ -73,13 +73,14 @@ #define TPS65217_PPATH_AC_CURRENT_MASK 0x0C #define TPS65217_PPATH_USB_CURRENT_MASK 0x03 -#define TPS65217_INT_RESERVEDM BIT(7) #define TPS65217_INT_PBM BIT(6) #define TPS65217_INT_ACM BIT(5) #define TPS65217_INT_USBM BIT(4) #define TPS65217_INT_PBI BIT(2) #define TPS65217_INT_ACI BIT(1) #define TPS65217_INT_USBI BIT(0) +#define TPS65217_INT_MASK (TPS65217_INT_PBM | TPS65217_INT_ACM | \ + TPS65217_INT_USBM) #define TPS65217_CHGCONFIG0_TREG BIT(7) #define TPS65217_CHGCONFIG0_DPPM BIT(6) |
