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author | Sean Lee <beginner2arm@eyou.com> | 2005-08-17 09:28:26 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-08-17 09:28:26 +0100 |
commit | 22d8be866ee23bf3ad9fe867587eef5f4200bf84 (patch) | |
tree | 30776229759256eae069428e15423ce61faed970 | |
parent | 54738e82755f73080e779ba0c8052e232df24d78 (diff) | |
download | talos-obmc-linux-22d8be866ee23bf3ad9fe867587eef5f4200bf84.tar.gz talos-obmc-linux-22d8be866ee23bf3ad9fe867587eef5f4200bf84.zip |
[ARM] 2852/1: Correct the mistake in arch/arm/mm/Kconfig file
Patch from Sean Lee
In the arch/arm/mm/Kconfig file, the CPU_DCACHE_WRITETHROUGH
option is depend on the CPU_DISABLE_DCACHE, but the "Disable
D-Cache" option is configured as CPU_DCACHE_DISABLE.
The CPU_DISABLE_DCACHE should be CPU_DCACHE_DISABLE
Signed-off-by: Sean Lee <beginner2arm@eyou.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mm/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index afbbeb6f4658..db5e47dfc303 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -384,7 +384,7 @@ config CPU_DCACHE_DISABLE config CPU_DCACHE_WRITETHROUGH bool "Force write through D-cache" - depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DISABLE_DCACHE + depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DCACHE_DISABLE default y if CPU_ARM925T help Say Y here to use the data cache in writethrough mode. Unless you |