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authorGabor Juhos <juhosg@openwrt.org>2012-03-14 10:36:13 +0100
committerRalf Baechle <ralf@linux-mips.org>2012-05-15 17:49:06 +0200
commit1f3a92de2a5081077799a51f39b1010ed0492264 (patch)
tree40f87868826968db3fece53d8490ae634af92333
parent52c28be371e33b99700811dbed009913b854c44d (diff)
downloadtalos-obmc-linux-1f3a92de2a5081077799a51f39b1010ed0492264.tar.gz
talos-obmc-linux-1f3a92de2a5081077799a51f39b1010ed0492264.zip
MIPS: ath79: register PCI controller on the PB44 board
The PB44 reference board has two miniPCI slots. Register the PCI controller to make those usable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3502/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/ath79/mach-pb44.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/ath79/mach-pb44.c b/arch/mips/ath79/mach-pb44.c
index fe9701a32291..c5f0ea5e00c3 100644
--- a/arch/mips/ath79/mach-pb44.c
+++ b/arch/mips/ath79/mach-pb44.c
@@ -19,6 +19,7 @@
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
+#include "pci.h"
#define PB44_GPIO_I2C_SCL 0
#define PB44_GPIO_I2C_SDA 1
@@ -114,6 +115,7 @@ static void __init pb44_init(void)
ath79_register_spi(&pb44_spi_data, pb44_spi_info,
ARRAY_SIZE(pb44_spi_info));
ath79_register_usb();
+ ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
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