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path: root/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PCIE.rule
Commit message (Expand)AuthorAgeFilesLines
* PRD: Remove remaining P8 codeZane Shelley2018-11-081-346/+0
* PRD: Handle 4th PHB on Naples chipBenjamin Weisenbeck2015-08-261-0/+42
* PRD: Chip support for the Naples processorZane Shelley2015-08-261-6/+37
* PRD: Added support for monitoring PCI clock switch over.Prem Shanker Jha2015-04-131-2/+3
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-211-10/+10
* PRD: FIR action updatePrem Shanker Jha2014-04-111-27/+0
* PRD: Enhance error log content with c_err_rpt dataBilicon Patil2014-02-121-0/+16
* PRD: add clock osc calloutChris Phan2014-01-151-1/+19
* PRD: add conditional capture for PCICLOCKFIRsChris Phan2013-10-221-0/+25
* PRDF:Added support for FIR after conclusion of review - part3Prem Shanker Jha2013-09-181-14/+14
* PRD: Support for FIRsachin gupta2013-08-231-90/+2
* PRD: re-enable PCICLOCKFIRsChris Phan2013-07-301-17/+18
* To reduce number of ACT0 and ACT1 registers in capture dataprashanthacharya2013-06-141-0/+8
* PRD: fixed issues with secondary registersZane Shelley2013-06-141-9/+0
* PRD: change PCICLOCKFIR capture group to neverChris Phan2013-03-251-21/+21
* PRD: comment out PCICLOCKFIR analysis and capture due to a chip bugChris Phan2013-03-211-21/+26
* Design change for PRD Registerprem2013-02-151-1/+1
* Merged common FSP and HB PRD code to prdf/common/Zane Shelley2012-11-161-0/+323
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