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* Add in RCD attributes for DD2 debugJacob Harvey2017-07-119-7/+552
* PSTATE_PARAMETER_BLOCK structure alignment and error handlingPrasad Bg Ranganath2017-07-115-108/+191
* PM: Hcode Image Build Level3 - Part 3Prem Shanker Jha2017-07-114-509/+579
* p9_setup_bars -- fix NPU BAR addressing for Nimbus DD2Joe McGill2017-07-111-8/+8
* Disabling LVext for all P9 partsLuke C. Murray2017-07-111-18/+0
* p9.npu.scom.initfile -- Nimbus DD2 updatesJoe McGill2017-07-112-42/+194
* DD2 updated scan overrides, Cumulus DD1 initfile updatesdchowe2017-07-116-131/+102
* p9_mem_pll_reset: Level 3Joachim Fenkes2017-07-102-42/+5
* p9_perv_sbe_cmn: Level 3Joachim Fenkes2017-07-101-0/+56
* FFDC UpdatesAnusha Reddy Rangareddygari2017-07-101-14/+148
* Add sbeError tag to all SBE related error xml filesRichard J. Knight2017-07-101-0/+4
* HWP's for p9_perv_sbe_cmn,p9_sbe_arrayinit,p9_sbe_tp_arrayinitAnusha Reddy Rangareddygari2017-07-101-0/+13
* Makefile Infrastructure for SBE Level 2 HWPsSunil.Kumar2017-07-101-0/+40
* PHB4 init updates per Ross Leaven's requestRicardo Mata2017-07-101-3/+19
* Add WAs for HW413799 HW413853 HW413917 HW414249 HW414375 HW414871 HW414829Nick Klazynski2017-07-091-0/+119
* Adding HW414702 workaround to INT scan initfilesJenny Huynh2017-07-091-0/+18
* PM: Hcode Image Build Level3 -Part 2Prem Shanker Jha2017-07-095-524/+761
* PCIe updates for Nimbus DD2 GEN4 operationJoe McGill2017-07-093-4/+39
* PM: HOMER Header Magic word change.Prem Shanker Jha2017-07-091-18/+14
* PM: Added core throttle assert and deassert count in PGPE Image Header.Prem Shanker Jha2017-07-082-11/+49
* Cumulus proc updatesAnusha Reddy Rangareddygari2017-07-081-2/+3
* PM: fix PSTATE_MODE=OFF istep 15 failureGreg Still2017-07-071-3/+10
* PM: Fix missing init step in proc_get_mvpd_dataDean Sanner2017-07-071-0/+1
* PM: set PGPE and SGPE Timer SelectGreg Still2017-07-072-0/+17
* p9.pci.scan.initfile -- initial releaseJoe McGill2017-07-071-0/+16
* Fixes parallel CAC shmoo bugStephen Glancy2017-07-062-2/+2
* jgr17061400 Adding setting for Nim DD2John Rell2017-07-064-6/+46
* WOF: HWP support for advanced function enablementGreg Still2017-06-309-870/+1614
* Set HB to ignore draminit_training failsJacob Harvey2017-06-302-21/+60
* p9_{mem,sbe_chiplet}_pll_setup: Level 3Joachim Fenkes2017-06-303-38/+84
* Nimbus ec_20: updates to fbc-n2_pb025/pb_serial_scom_reg.figJohannes Koesters2017-06-301-3/+115
* PM: Fix for cyclic inclusion of header files.Prem Shanker Jha2017-06-302-1/+2
* Adds workaround for scrub timeoutStephen Glancy2017-06-301-1/+1
* Improve power and clock checking when checking for stop statesBrian Vanderpool2017-06-285-32/+116
* p9.core.scan.initfile -- set disable 241 for Nimbus DD2Joe McGill2017-06-281-3/+3
* Adds workaround for training timeoutStephen Glancy2017-06-281-1/+2
* Fill empty descriptions with placeholdercrgeddes2017-06-281-14/+14
* Move MSS Rosetta map from lab to f/w library, add APILouis Stermole2017-06-271-0/+25
* Turn off A17 if not neededJacob Harvey2017-06-258-25/+132
* Fix draminit_training wrapper and functionJacob Harvey2017-06-252-27/+60
* p9_sbe_common_errors.xmlAnusha Reddy Rangareddygari2017-06-251-4/+1
* SIBRC detailsAshish2017-06-251-8/+77
* L3 update -- p9_mss_eff_groupingThi Tran2017-06-233-9/+3
* L3 update -- p9_sbe_instruct_startThi Tran2017-06-232-12/+11
* Propagate "fused_core" IPL option into PU chipJoachim Fenkes2017-06-231-1/+17
* Move p9n2 SCOM headers into base chip include dir, mirror to PPE/HBJoachim Fenkes2017-06-2312-0/+252560
* L3 update -- p9_mpipl_chip_cleanupJoe McGill2017-06-233-162/+45
* Fixes DD2 training bugStephen Glancy2017-06-233-28/+131
* p9_ppe_commands: add -step_trap supportGreg Still2017-06-221-6/+6
* p9_ppe_commands : Enhanced single stepAshish2017-06-221-10/+25
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