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path: root/src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml
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* Update p9_setup_bars for 3 NPU's on AxoneBen Gass2019-05-311-3/+177
| | | | | | | | | | | | | | | | | | | - The PHY0/1 BARS were dropped. The MMIO bar's 16M space includes both 2M PHY spaces. - Added Private Register Interface configuration registers setup by attributes. Change-Id: I7c4b6a23f2f46a8f6417b40201eafac57dd50945 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77769 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77777 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Attribute cleanupDan Crowell2018-09-271-29/+29
| | | | | | | | | | | | | | | | | | | | | | | Added mrwHide to a lot of platInit attributes, this will prevent them from showing up in the ServerWiz tool where the value will be hard to change. Instead these will always rely on the default in the xml or explicit platform code to set. Also removed a bunch of unused tags to clean things up. Change-Id: Id237924d737392368c418cc31d6506f1f5598b98 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64233 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66015 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adding support to setup INT BAR registersJenny Huynh2016-10-131-0/+188
| | | | | | | | | | | | | | | | | | | > Attributes are intended to be enabled under cronus only > Added initToZero tag to attribute defs for future use > Added temp default values for attributes Change-Id: I130a163e2f2c85c22181747b694b71a9d6f0aaaa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30767 Dev-Ready: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: DAVID M. KAUER <dmkauer@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30768 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* p9_rng_init_phase[12] -- initial releaseChen Qian2016-09-041-33/+7
| | | | | | | | | | | | | Change-Id: I24f02b04eb3841ca7c4b9e9c8e5961d1667ccba8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27745 Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Dev-Ready: CHRISTOPHER D. HANUDEL <chanudel@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28519 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* L2 HWP -- p9_setup_barsJoe McGill2016-08-251-44/+226
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | p9_setup_bars initial relase -- program FSP/PSI/NPU BARs & configure MCD nest_attributes proc_setup_bars_attributes adjust scope of BAR base address attributes from chip->system change to reflect offset from base of chip address range, rather than absolute address p9_fbc_utils modify p9_fbc_utils_get_chip_base_address() to output base of each on chip region, consider policy affecting placement of mirrrored memory p9_mss_eff_grouping p9_sbe_load_bootloader p9_sbe_mcs_setup adapt to p9_fbc_utils_get_chip_base_address() changes p9_sbe_scominit adapt to p9_fbc_utils_get_chip_base_address() / attribute scope changes add placeholder for FIR register initialization p9_pcie_config adapt to p9_fbc_utils_get_chip_base_address() / attribute scope changes skip programming of INT resources Change-Id: I62e1766fbe8366168cc3f1b9b43c64f48659aec0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27841 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27850 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* p9_setup_bars L1 deliveryJoe McGill2016-08-151-0/+139
HWP shell Attributes for PSI,FSP only Change-Id: I6007e30e4f759a1af5d7f88bf4495ea16b424269 Original-Change-Id: Iecbf392f56536f6bde7623a12e3f518c119fc725 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21636 Tested-by: Jenkins Server Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28240 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
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