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author | Joe McGill <jmcgill@us.ibm.com> | 2015-10-30 13:49:19 -0500 |
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committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-08-15 11:12:08 -0400 |
commit | 2cc02a5c335de6e33b6b868d0d8a3b13a99f9a84 (patch) | |
tree | 8db94e14e10e73145c48ec3ba0949be828a42fcb /src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml | |
parent | 4c35edebbed8ad665681f0863e49041e35ce9e6a (diff) | |
download | talos-hostboot-2cc02a5c335de6e33b6b868d0d8a3b13a99f9a84.tar.gz talos-hostboot-2cc02a5c335de6e33b6b868d0d8a3b13a99f9a84.zip |
p9_setup_bars L1 delivery
HWP shell
Attributes for PSI,FSP only
Change-Id: I6007e30e4f759a1af5d7f88bf4495ea16b424269
Original-Change-Id: Iecbf392f56536f6bde7623a12e3f518c119fc725
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21636
Tested-by: Jenkins Server
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28240
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml | 139 |
1 files changed, 139 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml new file mode 100644 index 000000000..a7a27813e --- /dev/null +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml @@ -0,0 +1,139 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/p9_setup_bars_attributes.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2015,2016 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- p9_setup_bars_attributes.xml --> +<attributes> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PSI_BRIDGE_BAR_ENABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>PSI Bridge BAR enable + creator: platform + consumer: p9_setup_bars + firmware notes: none + </description> + <valueType>uint8</valueType> + <enum>DISABLE = 0x0, ENABLE = 0x1</enum> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>PSI Bridge BAR base address value + creator: platform + consumer: p9_setup_bars + firmware notes: + 64-bit address representing BAR RA + NOTE: BAR register covers RA 8:43 + NOTE: Implied size of 1MB + </description> + <valueType>uint64</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_FSP_BAR_ENABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>FSP BAR enable + creator: platform + consumer: p9_setup_bars + firmware notes: none + </description> + <valueType>uint8</valueType> + <enum>DISABLE = 0x0, ENABLE = 0x1</enum> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_FSP_BAR_BASE_ADDR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>FSP BAR base address value + creator: platform + consumer: p9_setup_bars + firmware notes: + 64-bit address representing BAR RA + NOTE: BAR register covers RA 8:43 + </description> + <valueType>uint64</valueType> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_FSP_BAR_SIZE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>FSP BAR size value + creator: platform + consumer: p9_setup_bars + firmware notes: none + </description> + <valueType>uint64</valueType> + <enum> + 4_GB = 0x0000000100000000, + 2_GB = 0x0000000080000000, + 1_GB = 0x0000000040000000, + 512_MB = 0x0000000020000000, + 256_MB = 0x0000000010000000, + 128_MB = 0x0000000008000000, + 64_MB = 0x0000000004000000, + 32_MB = 0x0000000002000000, + 16_MB = 0x0000000001000000, + 8_MB = 0x0000000000800000, + 4_MB = 0x0000000000400000, + 2_MB = 0x0000000000200000, + 1_MB = 0x0000000000100000 + </enum> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PROC_FSP_MMIO_MASK_SIZE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>FSP MMIO mask size value + creator: platform + consumer: p9_setup_bars + firmware notes: + AND mask applied to RA 32:35 when transmitting address to FSP + NOTE: RA 8:31 are always replaced with zero + </description> + <valueType>uint64</valueType> + <enum> + 4_GB = 0x0000000100000000, + 2_GB = 0x0000000080000000, + 1_GB = 0x0000000040000000, + 512_MB = 0x0000000020000000, + 256_MB = 0x0000000010000000 + </enum> + <platInit/> + <persistRuntime/> + </attribute> + <!-- ********************************************************************* --> + <!-- TODO: add remaining nest MMIO BAR attributes required for IPL --> + <!-- ********************************************************************* --> +</attributes> |