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path: root/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
Commit message (Expand)AuthorAgeFilesLines
* Memory Controller Axone initfiles - initialAdam Hale2019-02-131-5/+38
* Adding omi_init procedures.Ben Gass2018-11-201-25/+87
* FBC ABUS TDM inject and recovery HWPsJoe McGill2018-09-221-11/+1
* SW427193 / HW461448: Enable memory controller watJenny Huynh2018-09-141-0/+49
* Set TRAIN_TIME to 0 for simulation.Ben Gass2018-05-171-1/+1
* FIR updates to match XML changes in 56335Joe McGill2018-04-161-4/+4
* Cumulus MSS FIR updatesJoe McGill2018-02-031-0/+13
* shift XBUS FIR programming inits for secure bootJoe McGill2018-01-261-18/+115
* remove NV iovalid assertion from FW and add scan inits to resolve glsmux xstateJoe McGill2017-11-281-88/+0
* IO, FBC updates to enable ABUS for FleetwoodJoe McGill2017-11-101-2/+39
* Set missing mask bits in FBC_IOO_DL_FIR_MASK_SIM for sim.Ben Gass2017-10-031-1/+1
* Undo HB p9_chiplet_scominit workaroundThi Tran2017-09-141-27/+4
* Fix DMI SCOM MCMODE0 issue.Lennard Streat2017-09-141-1/+1
* Updates for Cumulus dmi/mi/mc initfilesBen Gass2017-08-141-1/+1
* Fixing mmu epsilon write cycles valueJenny Huynh2017-07-261-0/+27
* TP, Nest FIR updates -- DD2 updates to match RAS XMLJoe McGill2017-07-251-11/+4
* p9_chiplet_scominit - add Cumulus supportLiuYangFan2017-07-141-62/+160
* HW414700 checkstop on UEs and disable core ECC counterLuke C. Murray2017-07-141-1/+8
* future proof EC feature attributes, add missing P9N DD2 initsJoe McGill2017-06-071-11/+8
* P9 Cumulus InitCompiler supports - Part 2Thi Tran2017-05-241-2/+2
* temp fix for boston mem 2400 nest 1600 issue HW411339Shelton Leung2017-05-221-1/+2
* Initfile updates for FBC DD2dchowe2017-05-221-1/+1
* rename TYPE_NV to TYPE_OBUS_BRICKPrachi Gupta2017-05-221-30/+27
* security -- split p9_chiplet_scominit and p9_chiplet_enable_ridi istepsJoe McGill2017-05-221-93/+3
* Build p9n 10 and 20 by default.Ben Gass2017-04-071-9/+12
* Set NDL IOValids based on configured NV links.Ben Gass2017-03-091-0/+90
* Updates to initcompiler to support DD2 and cumulusRichard J. Knight2017-02-281-3/+3
* p9.fbc.ioo_tl.scom.initfile update for nvlinkdchowe2017-02-231-13/+21
* adding sim and dd1 check to fir maskJoshua Hannan2017-02-211-3/+21
* masking bits 60-61 of PB fir register for link0,1 sim errorJoshua Hannan2017-02-161-1/+1
* p9.mcs.scom.initfile -- apply workaround for HW400075 in RL=0 onlyJoe McGill2017-02-071-1/+1
* Remove action bit settings for HCA from p9_chiplet_scominit.Ben Gass2017-01-271-26/+0
* p9_chiplet_scominit -- set FBC IOE/IOO DL TL FIR programming, mask HCA FIRsJoe McGill2017-01-161-2/+90
* p9_sbe_scominit -- invoke NMMU scom initfileJoe McGill2016-10-171-12/+0
* Integrating p9.vas.scom.initfileThi Tran2016-08-251-0/+12
* Update prologs of mirrored files to apache licenseStephen Cprek2016-08-051-8/+14
* Integrating initfiles: NEST cxa/int/nx/mmuThi Tran2016-08-011-6/+70
* MCA,MCBIST,MCS (all files in one, no 2 part thing anymore)Shelton Leung2016-07-051-35/+15
* Translate logical mca regisers in mcs chiplet as mca target typeBen Gass2016-06-011-0/+39
* L2 - Fabric updates for multi-chip supportJoe McGill2016-05-131-6/+88
* L2 HWPs -- p9_smp_link_layer and p9_fab_iovalidJoe McGill2016-02-261-8/+10
* p9_chiplet_scominit Level 1Michael Dye2016-02-191-0/+51
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