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path: root/src/import/chips/p9/procedures/hwp/memory
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* Updates MWD_COARSE to run multiple patternsStephen Glancy2019-02-055-2/+129
* Adds exp_draminit_mcAlvin Wang2019-02-0512-315/+134
* Move fake_spd testing data into genericAndre Marin2019-01-252-429/+0
* Update to allow DDR4-SORDIMM modules to be used. [1/2]Evan Lojewski2019-01-231-0/+6
* P9: NVDIMM SBE Support to Trigger Catastrophic SaveTsung Yeung2019-01-185-3/+340
* Fix RC09 ODT errors on Nimbus dual-drop configsLouis Stermole2019-01-181-2/+17
* Fixes LRDIMM initialization attributes and timingsStephen Glancy2019-01-163-13/+35
* Updates LRDIMM flags to be HB compatibleStephen Glancy2019-01-151-0/+4
* Moves fir reg to generic folderAlvin Wang2018-12-177-225/+16
* Adds MRD coarseStephen Glancy2018-12-143-5/+10
* Adds LRDIMM MWD fine training stepLi Meng2018-12-143-3/+10
* Adds LRDIMM MWD coarse training stepLi Meng2018-12-134-85/+50
* Creates LRDIMM mrep/dwl calibration recorder classLi Meng2018-12-131-0/+4
* Creates LRDIMM fine calibration recorder classStephen Glancy2018-12-051-4/+8
* Adds LRDIMM MRD - DRAM to buffer RD calibrationStephen Glancy2018-12-053-87/+10
* Move MSS volt attr setters to generic folderLouis Stermole2018-12-046-174/+140
* Adds LRDIMM helper functionsStephen Glancy2018-11-301-0/+4
* Adds CCS ODT helper commandsStephen Glancy2018-11-301-0/+62
* Adds LRDIMM DWL training stepStephen Glancy2018-11-295-93/+100
* Fixes set_pba_mode to use proper F0BC1x valuesStephen Glancy2018-11-212-9/+21
* Add empty files for porting mss_volt to genericLouis Stermole2018-11-211-0/+24
* Add exp_draminit and fix data_structs constantsAndre Marin2018-11-211-3/+0
* Adding omi_init procedures.Ben Gass2018-11-203-0/+167
* Updates PBA to use RCW's to issue BCW'sStephen Glancy2018-11-154-3/+85
* Updates LRDIMM code to utilize board swizzlingStephen Glancy2018-11-092-29/+240
* Fixes LRDIMM eff_config bugsStephen Glancy2018-11-059-105/+1488
* P9: Disable Maint Address Mode After Self-Refresh Exit on NVDIMMTsung Yeung2018-11-022-0/+35
* add lrdimm plug rulesLi Meng2018-10-292-17/+20
* Adds MREP training for LRDIMMStephen Glancy2018-10-295-19/+797
* Fixes BCW load bugsStephen Glancy2018-10-291-1/+1
* Fixes b-side bug in MPR write functionStephen Glancy2018-10-293-39/+164
* Adds code to run MPR writes on all ranks in a rank pairStephen Glancy2018-10-293-2/+189
* Adds per-Buffer addressability API for LRDIMMStephen Glancy2018-10-182-0/+440
* Adds blank files for LRDIMM PBAStephen Glancy2018-10-182-0/+48
* Updates rank API to work with LRDIMM'sStephen Glancy2018-10-165-88/+273
* Updates to configure all four rank pair registersStephen Glancy2018-10-162-26/+146
* Updates training steps factory to be LRDIMM capableStephen Glancy2018-10-155-16/+131
* Fixes VPD access and eff_config for LRDIMM'sStephen Glancy2018-10-152-18/+24
* Create empty files for OMI init procedures.Thi Tran2018-10-123-0/+91
* Works around LRDIMM plug rules error for LRDIMM BUPStephen Glancy2018-10-081-0/+13
* Removes unused attribute accessorsStephen Glancy2018-10-041-7894/+0
* Adds per-Buffer addressability API for LRDIMMStephen Glancy2018-10-038-56/+89
* Adds insert function space helpers for LRDIMMStephen Glancy2018-09-274-116/+352
* Moves sync code to generic folderStephen Glancy2018-09-199-1258/+647
* Moves and renames swizzle.H to genericStephen Glancy2018-09-193-136/+2
* Adds skeleton code for LRDIMMStephen Glancy2018-09-181-0/+1
* Remove Nimbus dependencies from the SPD decoderAndre Marin2018-09-181-0/+234
* Adds MRW support for x4/x8 DIMM configurationsStephen Glancy2018-09-181-0/+74
* Fixes memdiags broadcast mode address check bugAndre Marin2018-09-181-2/+1
* Add plug rule for dual-drop DIMM configs that produce different xlate settingsLouis Stermole2018-09-181-0/+50
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