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path: root/src/import/chips/p9/procedures/hwp/memory
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* Clear bit 56/ ddr_phy fir bit 2 after dram calJacob Harvey2017-09-291-9/+6
* Increment red_waterfall for low vdn fixJacob Harvey2017-09-266-7/+242
* remove cas_latency.H include from p9_mss_freq.HMatt K. Light2017-09-251-1/+0
* Restore original training settings if mss_draminit_training_adv failsLouis Stermole2017-09-253-32/+627
* Added comment for INVALID enum valueSachin Gupta2017-09-251-0/+3
* Add Write CRC attributes to xml and eff_dimmAndre Marin2017-09-256-128/+629
* Modify VPD decoder to take into account deconfigured portsAndre Marin2017-09-252-71/+172
* Changed two symbol correction disable to mnfg flag DISABLE_DRAM_REPAIRSMatthew Hickman2017-09-251-2/+2
* Change training advance checkJacob Harvey2017-09-211-3/+7
* Fix eff_config_thermal allocationsJacob Harvey2017-09-183-77/+54
* Fixes sf_init random to run random dataStephen Glancy2017-09-181-0/+16
* Updates RCD power settingsStephen Glancy2017-09-181-2/+69
* Adds in workaround for self-time refreshStephen Glancy2017-09-183-2/+204
* Skip ports without DIMMs for VPD collectionJacob Harvey2017-09-181-0/+5
* Disabled Training Advance in simJacob Harvey2017-09-131-2/+7
* Expanding MCU tag fifo settings to be freq dependent.Lennard Streat2017-09-131-0/+24
* Modify enum to get around compile issuesaravnair-in2017-09-083-5/+5
* Adds MCA workaround blank files for HBStephen Glancy2017-09-072-0/+48
* Add FIR checking to training error checkingJacob Harvey2017-09-073-3/+72
* Remove logic to disable memory clocks in STR if in PD_AND_STR_CLK_STOP modeAndre Marin2017-09-072-30/+0
* ZZ VPD Pass 4 Board UpdateChris Yan2017-09-074-913/+1925
* Fix order of sequence for register control words, and CKE levelsAndre Marin2017-09-057-27/+109
* Fix rdvref, wrvref error handlingJacob Harvey2017-09-054-118/+127
* Add in ATTR_BAD_BIT_DQMAP functionsJacob Harvey2017-09-053-37/+33
* Change blue waterfall drift limits for 2400Jacob Harvey2017-09-051-3/+3
* Add in last addr register to memdiags error xmlJacob Harvey2017-08-291-2/+5
* Implementing draminit_training_advJacob Harvey2017-08-2916-81/+720
* Adds DDR4 hybrid NV-RDIMM supportStephen Glancy2017-08-2910-36/+275
* p9_mss_eff_config_thermal L3Jacob Harvey2017-08-292-4/+36
* Add in L1 draminit_training_adv filesJacob Harvey2017-08-281-0/+62
* Temp remove of p9_mss_draminit_training_adv.H to fix bad mirrorDan Crowell2017-08-281-62/+0
* Add in L1 draminit_training_adv filesJacob Harvey2017-08-224-0/+246
* Modify BAD_DQ_BITMAP to DIMM target for FW to reuse w/CentaurAndre Marin2017-08-214-112/+47
* Fix draminit_training error logging and unit testJacob Harvey2017-08-196-107/+212
* L3 work for mss xmlsJacob Harvey2017-08-1822-316/+255
* Fix duplicate symbol error when linking mss and cen libsAndre Marin2017-08-182-184/+0
* Improve description of ATTR_EFF_RANK_GROUP_OVERRIDELouis Stermole2017-08-181-12/+39
* Changed API related to mss_memdiags ipl changeMatthew Hickman2017-08-185-9/+18
* Changed maint AUE and IAUE to recoverable during memdiagsMatthew Hickman2017-08-182-3/+5
* Modified gen_accessors script for greater supportAndre Marin2017-08-181-1224/+0
* Make freq_x_mhz attribute writeablecrgeddes2017-08-141-2/+2
* Enable skipping sbefifo reset during p9_start_cbsMatt K. Light2017-08-141-0/+21
* Change tREFI calc to be 99% of calculated result to stay within lab marginAndre Marin2017-08-071-4/+5
* Add in check for no DIMMs under MCSJacob Harvey2017-08-055-19/+37
* Disabled TCE corrections for MNFG ThresholdMatthew Hickman2017-07-272-7/+131
* Added ATTR_MSS_VPD_MT_WINDAGE_RD_CTR support after SYSCLK_RESET.Andre Marin2017-07-273-9/+33
* L3 draminit and mss_libJacob Harvey2017-07-2644-411/+547
* Fixed reporting of errors for multiple errors on portMatthew Hickman2017-07-261-3/+3
* Remove reset_dll from scominit, enable delay line tap pointsAndre Marin2017-07-253-85/+0
* L3 support for ddr_phy_reset, termination_controlJacob Harvey2017-07-246-7/+7
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