summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/memory
diff options
context:
space:
mode:
authorAndre Marin <aamarin@us.ibm.com>2017-07-12 09:42:23 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2017-07-25 23:51:21 -0400
commit74fe23130c9e94b6d72de3cb3a5aec3a8858ce91 (patch)
treea3f8ca0edcc0b14b052439d75669a97701efd3b4 /src/import/chips/p9/procedures/hwp/memory
parent8179bdadd03ebf36890dee3dad647d53d1272c1a (diff)
downloadtalos-hostboot-74fe23130c9e94b6d72de3cb3a5aec3a8858ce91.tar.gz
talos-hostboot-74fe23130c9e94b6d72de3cb3a5aec3a8858ce91.zip
Remove reset_dll from scominit, enable delay line tap points
reset_dll API was found to be redundant to what already exists in the initfile per John Bialas. Removed if from scominit. Also included initfile changes that John made by enabling delay line tap points Change-Id: Ide517e8dced5176d508dcb352e041e09da206a09 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43018 Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43235 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C3
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C32
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H50
3 files changed, 0 insertions, 85 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
index 81f7f3f2b..66da61305 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
@@ -778,9 +778,6 @@ fapi2::ReturnCode phy_scominit(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target
FAPI_TRY( mss::dp16::reset_bad_bits(p) );
#endif
- // New for Nimbus reset the DLL
- FAPI_TRY( mss::dp16::reset_dll(p) );
-
FAPI_TRY( mss::rank::get_rank_pairs(p, l_pairs) );
// Section 5.2.4.8 DP16 Write Clock Enable & Clock Selection on page 301
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
index 5258d87b0..39135d317 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
@@ -1533,38 +1533,6 @@ fapi_try_exit:
}
///
-/// @brief Reset all of the DLL registers - Nimbus only
-/// @param[in] i_target an MCA
-/// @return FAPI2_RC_SUCCESs iff ok
-///
-fapi2::ReturnCode reset_dll( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
-{
- typedef dp16Traits<TARGET_TYPE_MCA> TT;
-
- // For DD1.0 we have some workarounds. We send the magic
- // number in to the work around and it fixes it up as needed.
- uint64_t l_vreg_cnrtl = mss::workarounds::dp16::vreg_control0(i_target, 0x6740);
-
- // Magic numbers are from the PHY team (see the ddry phy initfile, too.) They are, in fact,
- // magic numbers ...
-
- // TK How about a little broadcast action here? BRS
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_CNFG_REG, 0x0060) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_CNTRL_REG, 0x8100) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_DAC_LOWER_REG, 0x8000) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_DAC_UPPER_REG, 0xffe0) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_SLAVE_LOWER_REG, 0x8000) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_SLAVE_UPPER_REG, 0xffe0) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_EXTRA_REG, 0x2020) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_VREG_CNTRL_REG, l_vreg_cnrtl) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_SW_CNTRL_REG, 0x0800) );
- FAPI_TRY( mss::scom_blastah(i_target, TT::DLL_VREG_COARSE_REG, 0x0402) );
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
/// @brief Configure Read VREF Registers
/// @param[in] i_target a MCA target
/// @return FAPI2_RC_SUCCESs iff ok
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H
index 690bad635..8fdb47f5c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H
@@ -84,56 +84,6 @@ fapi2::ReturnCode rd_dia_config5( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i
fapi2::ReturnCode dqsclk_offset( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target );
///
-/// @brief DP16 DLL_VREG_CONTROL0
-/// In DD1.0 Nimbus VREG control work arounds are needed
-/// @param[in] port in question - needed to figure out whether to apply the work-around or not
-/// @param[in] i_original_value a value to which we add the workaround bits
-/// @return uint64_t the original value with the bits added
-///
-inline uint64_t vreg_control0( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
- const uint64_t i_original_value )
-{
-
-// Anuwat has asked that we don't enforce this right now.
-#ifdef ANUWAT_SAYS_DONT_DO_THIS_NOW
-
- fapi2::buffer<uint64_t> l_value(i_original_value);
- uint8_t l_vccd_override = 0;
-
- // Check for whether we apply this workaround or not
- if (! mss::chip_ec_feature_mss_vccd_override(i_target) )
- {
- return i_original_value;
- }
-
- FAPI_TRY( mss::vccd_override(l_vccd_override) );
-
- // No VCCD override, don't mess with the DLL's
- if (fapi2::ENUM_ATTR_MSS_VCCD_OVERRIDE_YES == l_vccd_override)
- {
- l_value.insertFromRight<MCA_DDRPHY_DP16_DLL_VREG_CONTROL0_P0_0_01_RXREG_REF_SEL_DC,
- MCA_DDRPHY_DP16_DLL_VREG_CONTROL0_P0_0_01_RXREG_REF_SEL_DC_LEN>(0b111);
- }
-
- FAPI_INF("vreg_control0 0x%016lx, 0x%016lx", i_original_value, uint64_t(l_value));
- return l_value;
-
-fapi_try_exit:
- // Probably bigger problems ...
- FAPI_ERR("Unable to get vccd_override attribute");
- fapi2::Assert(false);
-
- // Not reached
- return 0;
-
-#else
-
- return i_original_value;
-
-#endif
-}
-
-///
/// @brief DP16 VREF DAC override
/// In DD1.0 Nimbus VREF DAC work arounds are needed
/// @param[in] i_target the port target for this override
OpenPOWER on IntegriCloud