| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fixed the ccs port merge conflicts and added lab code | Matthew Hickman | 2019-05-13 | 1 | -12/+13 |
| * | Updates the training advanced algorithm | Stephen Glancy | 2018-06-21 | 1 | -1/+9 |
| * | Updates training advanced and adds custom WR CTR | Stephen Glancy | 2018-01-13 | 1 | -1/+8 |
| * | Updates dramint training structure | Stephen Glancy | 2017-11-10 | 1 | -38/+15 |
| * | Fix rdvref, wrvref error handling | Jacob Harvey | 2017-09-05 | 1 | -1/+1 |
| * | Implementing draminit_training_adv | Jacob Harvey | 2017-08-29 | 1 | -0/+9 |
| * | Fix draminit_training error logging and unit test | Jacob Harvey | 2017-08-19 | 1 | -0/+24 |
| * | L3 support for ddr_phy_reset, termination_control | Jacob Harvey | 2017-07-19 | 1 | -10/+6 |
| * | Fix draminit_training wrapper and function | Jacob Harvey | 2017-06-25 | 1 | -0/+9 |
| * | Added register reset functionality for DD2 | Stephen Glancy | 2017-06-07 | 1 | -0/+9 |
| * | Remove ZQCAL redundant CCS inst, move to draminit_training | Andre Marin | 2017-05-25 | 1 | -10/+10 |
| * | Disable RTT_WR during WR_LEVEL cal step, and set equivalent terminations | Louis Stermole | 2017-03-15 | 1 | -11/+160 |
| * | Map from Centaur canonical rank numbering to Nimbus | Brian Silver | 2017-02-07 | 1 | -2/+35 |
| * | Change SEQ timings, SEQ ODT, WC config and DQS polarity | Brian Silver | 2016-09-12 | 1 | -36/+9 |
| * | Change PHY to use GPO, RLO, WLO from VPD | Brian Silver | 2016-09-08 | 1 | -18/+0 |
| * | Added support for PHY drive strength attributes | Stephen Glancy | 2016-08-23 | 1 | -0/+9 |
| * | Update prologs of mirrored files to apache license | Stephen Cprek | 2016-08-05 | 1 | -8/+14 |
| * | Add flush, init io to phy reset | Brian Silver | 2016-07-21 | 1 | -7/+17 |
| * | Add ZCNTL enable in phy reset | Brian Silver | 2016-07-13 | 1 | -21/+2 |
| * | Add DLL Calibration | Brian Silver | 2016-07-13 | 1 | -0/+25 |
| * | Add bang-bang lock algorithm for the PHY | Brian Silver | 2016-06-22 | 1 | -5/+6 |
| * | Change mss build to account for double free in wrappers | Brian Silver | 2016-06-17 | 1 | -1/+1 |
| * | Add phy control error checking, clean up dp16, apb | Brian Silver | 2016-04-01 | 1 | -174/+6 |
| * | Change WC to follow the new register block pattern | Brian Silver | 2016-04-01 | 1 | -190/+0 |
| * | Fixed doxygen errors and typos | Jacob Harvey | 2016-04-01 | 1 | -51/+51 |
| * | Add dump_regs for PHY registers | Brian Silver | 2016-04-01 | 1 | -195/+0 |
| * | Add PHY RC class, update setup cal for 2D wc/rc | Brian Silver | 2016-04-01 | 1 | -67/+8 |
| * | Changes related to model 31, attr changes for sim latencies | Brian Silver | 2016-04-01 | 1 | -2/+37 |
| * | Added mss::get/putScom | Brian Silver | 2016-04-01 | 1 | -18/+18 |
| * | Initial commit of memory subsystem | Brian Silver | 2016-04-01 | 1 | -0/+832 |
