Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Revert PLL unlock commits of 45102 and 46563 | Yue Du | 2017-10-08 | 1 | -11/+0 |
* | STOP: Properly clear DPLL unlock indication in dpll_setup | Yue Du | 2017-10-03 | 1 | -0/+11 |
* | HWP: Fixing pfet sense bit bug in p9_hcd_common_poweronoff | Yue Du | 2017-09-29 | 1 | -15/+17 |
* | PM Level 3 for multiple procedures | Amit Kumar | 2017-09-29 | 1 | -1/+489 |
* | Cache HWP: DD1 VCS Workaround | Yue Du | 2017-02-11 | 1 | -1/+3 |
* | p9_sbe_select_ex Level 2 update | Greg Still | 2017-02-10 | 1 | -1/+65 |
* | HWP-CORE/CACHE: Update Istep 4 procedures regressed on model 34 | Yue Du | 2017-02-10 | 1 | -24/+15 |
* | PPE-HWP: [Level 2] Cache/Core chiplet_reset/init/scan0+startclocks | Yue Du | 2017-02-10 | 1 | -0/+85 |
* | PPE-HWP: [Level 2] Poweronoff Hcode Procedures using API | David Young | 2017-02-10 | 1 | -68/+0 |
* | PPE-HWP: [Level 1] Cache + Core Hcode Procedures with API and Attribute defined | Yue Du | 2017-02-10 | 1 | -0/+68 |