diff options
Diffstat (limited to 'src/usr/targeting/common')
18 files changed, 15191 insertions, 860 deletions
diff --git a/src/usr/targeting/common/Targets.pm b/src/usr/targeting/common/Targets.pm index aa1e07f7d..c106ef0fc 100644 --- a/src/usr/targeting/common/Targets.pm +++ b/src/usr/targeting/common/Targets.pm @@ -22,6 +22,7 @@ # permissions and limitations under the License. # # IBM_PROLOG_END_TAG + package Targets; use strict; @@ -78,12 +79,18 @@ my %maxInstance = ( "NPU" => 1, "MC" => 2, "MI" => 4, + "MCC" => 8, + "OMI" => 16, + "OCMB_CHIP" => 16, + "MEM_PORT" => 16, + "DDIMM" => 16, "DMI" => 8, "OCC" => 1, "NV" => 6, "NX" => 1, "MEMBUF" => 8, "SMPGROUP" => 8, + "OMIC" => 6, ); sub new { @@ -94,6 +101,7 @@ sub new targeting => undef, enumerations => undef, MAX_MCS => 0, + master_proc => undef, UNIT_COUNTS => undef, huid_idx => undef, mru_idx => undef, @@ -223,9 +231,17 @@ sub printTarget return; } + my $target_TYPE = $self->getAttribute($target, "TYPE"); + + # Only allow OMI types with MCC parent + # OMIC_PARENT only exists on an OMI target with MCC parent + if ($target_TYPE eq "OMI" && !defined($target_ptr->{ATTRIBUTES}->{"OMIC_PARENT"}->{default})) + { + return; + } + print $fh "<targetInstance>\n"; my $target_id = $self->getAttribute($target, "PHYS_PATH"); - my $target_TYPE = $self->getAttribute($target, "TYPE"); $target_id = substr($target_id, 9); $target_id =~ s/\///g; $target_id =~ s/\-//g; @@ -545,6 +561,13 @@ sub buildHierarchy }, $b ); + push( + @{ + $self->{data}->{TARGETS}->{$source_target}->{CONNECTION} + ->{BUS_PARENT} + }, + $key + ); my %bus_entry; $bus_entry{SOURCE_TARGET} = $source_target; $bus_entry{DEST_TARGET} = $dest_target; @@ -643,9 +666,17 @@ sub buildAffinity my $tpm = -1; my $ucd = -1; my $bmc = -1; + my $mcc = -1; + my $omi = -1; + my $ocmb = -1; + my $mem_port = -1; + my $i2c_mux = -1; + my $dimm = -1; + my $pmic = -1; my $sys_phys = ""; my $node_phys = ""; my $node_aff = ""; + my $proc_fapi = ""; my $sys_pos = 0; # There is always a single system target my $mcbist = -1; my $num_mc = 0 ; @@ -776,6 +807,64 @@ sub buildAffinity $self->deleteAttribute($target, "POSITION"); $self->deleteAttribute($target, "FRU_ID"); } + elsif ($type eq "MCC") + { + $mcc++; + + # For a given proc, there are 2 MCs, 4 MIs, 8 MCCs, and 16 OMIs + # To get the corresponding proc, MC, or MI number for a given MCC + # divide the MCC number by the number of MCCs per unit, then mod 2 + # to get the relative path in terms of 0 or 1 + my $numOfMccsPerProc = $maxInstance{$type}; + my $numOfMccsPerMc = 4; + my $numOfMccsPerMi = 2; + my $proc_num = ($mcc / $numOfMccsPerProc) % 2; + my $mc_num = ($mcc / $numOfMccsPerMc) % 2; + my $mi_num = ($mcc / $numOfMccsPerMi) % 2; + my $mcc_num = $mcc % 2; + my $path = "/proc-$proc_num/mc-$mc_num/mi-$mi_num/mcc-$mcc_num"; + my $mcc_aff = $node_aff . $path; + my $mcc_phys = $node_phys . $path; + $self->setAttribute($target, "AFFINITY_PATH", $mcc_aff); + $self->setAttribute($target, "PHYS_PATH", $mcc_phys); + + $self->setAttribute($target, "REL_POS", $mcc_num); + my $pos = $self->getAttribute($target, "CHIP_UNIT"); + my $fapi_pos = $pos + $numOfMccsPerProc * $proc_fapi; + $self->setAttribute($target, "FAPI_POS", $fapi_pos); + $self->setAttribute($target, "ORDINAL_ID", $mcc); + } + elsif ($type eq "OMI") + { + # We only want OMIs with MCC parent, skip over the ones with OMIC parent + my $parent = $self->getTargetParent($target); + my $parent_type = $self->getType($parent); + if ($parent_type eq "MCC") + { + $omi++; + + # Same logic for MCC, but for OMI instead + my $numOfOmisPerProc = $maxInstance{$type}; + my $numOfOmisPerMc = 8; + my $numOfOmisPerMi = 4; + my $numOfOmisPerMcc = 2; + my $proc_num = ($omi / $numOfOmisPerProc) % 2; + my $mc_num = ($omi / $numOfOmisPerMc) % 2; + my $mi_num = ($omi / $numOfOmisPerMi) % 2; + my $mcc_num = ($omi / $numOfOmisPerMcc) % 2; + my $omi_num = $omi % 2; + my $path = "/proc-$proc_num/mc-$mc_num/mi-$mi_num/mcc-$mcc_num/omi-$omi_num"; + my $omi_aff = $node_aff . $path; + my $omi_phys = $node_phys . $path; + $self->setAttribute($target, "AFFINITY_PATH", $omi_aff); + $self->setAttribute($target, "PHYS_PATH", $omi_phys); + + my $pos = $self->getAttribute($target, "CHIP_UNIT"); + my $fapi_pos = $pos + $numOfOmisPerProc * $proc_fapi; + $self->setAttribute($target, "FAPI_POS", $fapi_pos); + $self->setAttribute($target, "ORDINAL_ID", $omi); + } + } elsif ($type eq "BMC") { $bmc++; @@ -801,7 +890,322 @@ sub buildAffinity my $ddrs = $self->findConnections($target,"DDR4",""); $self->processMcaDimms($ddrs, $sys_pos, $node_phys, $node, $proc); } + elsif ($type eq "OCMB_CHIP") + { + # Ocmbs are not in order, so we take the parent dimm's POSITION as + # our current ocmb number + # Ex. dimm19 = ocmb19 + my $parent = $self->getTargetParent($target); + $ocmb = $self->getAttribute($parent, "POSITION"); + $self->{targeting}{SYS}[0]{NODES}[$node]{OCMB_CHIPS}[$ocmb]{KEY} = $target; + $self->setHuid($target, $sys_pos, $node); + + my $ocmb_phys = $node_phys . "/ocmb_chip-$ocmb"; + + # Find the OMI bus connection to determine target values + my $proc_num = -1; + my $mc_num = -1; + my $mi_num = -1; + my $mcc_num = -1; + my $omi_num = -1; + my $conn = $self->findConnectionsByDirection($target, "OMI", "", 1); + + my $omi_chip_unit = -1; + if ($conn ne "") + { + foreach my $conn (@{$conn->{CONN}}) + { + my $source = $conn->{SOURCE}; + if ($source =~ /omic/i) + { + next; + } + my @targets = split(/\//, $source); + # Split the source into proc#, mc#, mi#, mcc#, omi# + # Source example: + # /sys-#/node-#/Pallid-#/proc_socket-#/Hopper-#/p9_axone/mc#/mi#/mcc#/omi# + foreach my $target (@targets) + { + $target =~ s/\D//g; + } + + # Splitting on "/" makes the first array index empty string + # so every value here is shifted over by 1 + # There are only ever two targets per parent in this case, + # so to get the relative positions for each target, we take + # mod two of the source value + $proc_num = $targets[4] % 2; + $mc_num = $targets[7] % 2; + $mi_num = $targets[8] % 2; + $mcc_num = $targets[9] % 2; + + # omi_num indicates the chip_unit of the corresponding omi + $omi_num = $targets[10]; + $omi_chip_unit = $omi_num; + $omi_num %= 2; + } + } + + my $ocmb_aff = $node_aff . "/proc-$proc_num/mc-$mc_num/mi-$mi_num/mcc-$mcc_num/omi-$omi_num/ocmb_chip-0"; + $self->setAttribute($target, "AFFINITY_PATH", $ocmb_aff); + $self->setAttribute($target, "PHYS_PATH", $ocmb_phys); + + # The standard fapi_pos calculation uses the relative position to + # the proc instead of omi_chip_unit. However, in this case, there is + # no direct way to get the relative position to the proc. The + # relationship between ocmb and omi is 1:1, so we take the chip unit + # of the corresponding omi as the relative position to the proc + my $fapi_pos = $omi_chip_unit + ($maxInstance{$type} * $proc_num); + $self->setAttribute($target, "FAPI_POS", $fapi_pos); + + my $ocmb_num = $fapi_pos; + # The norm for FAPI_NAME has a two digit number at the end + if ($fapi_pos < 10) + { + $ocmb_num = "0$fapi_pos"; + } + + $self->setAttribute($target, "MRU_ID", "0x00060000"); + $self->setAttribute($target, "POSITION", $ocmb); + + # chipunit:system:node:slot:position + $self->setAttribute($target, "FAPI_NAME", "ocmb:k0:n0:s0:p$ocmb_num"); + + $self->setAttribute($target, "REL_POS", "0"); + + my $fapi_name = "FAPI_I2C_CONTROL_INFO"; + my $master_path = "physical:sys-0/node-0/proc-$proc_num"; + $self->setAttributeField($target, $fapi_name, "i2cMasterPath", $master_path); + + my $eeprom_name = "EEPROM_VPD_PRIMARY_INFO"; + $self->setAttributeField($target, $eeprom_name, "i2cMasterPath", $master_path); + $self->setAttributeField($target, $eeprom_name, "chipCount", "0x01"); + } + elsif ($type eq "I2C_MUX") + { + $i2c_mux++; + + $self->{targeting}{SYS}[0]{NODES}[$node]{I2C_MUXS}[$i2c_mux]{KEY} = $target; + + # There exists 1 i2c_mux per MC, so 2 i2c_mux per proc + my $numOfMuxesPerProc = 2; + my $proc_num = ($i2c_mux / $numOfMuxesPerProc) % 2; + my $i2c_aff = $node_aff . "/proc-$proc_num/i2c_mux-$i2c_mux"; + $self->setAttribute($target, "AFFINITY_PATH", $i2c_aff); + + my $i2c_phys = $node_phys . "/i2c_mux-$i2c_mux"; + $self->setAttribute($target, "PHYS_PATH", $i2c_phys); + $self->setHuid($target, $sys_pos, $node); + + my $fapi_name = "FAPI_I2C_CONTROL_INFO"; + my $master_path = $node_phys . "/proc-$proc_num"; + $self->setAttributeField($target, $fapi_name, "i2cMasterPath", $master_path); + my $conn = $self->findConnectionsByDirection($target, "I2C", + "", 1); + if ($conn ne "") + { + # Get the i2c-master-omi which has the engine and port values + # The endpoint mux has the devAddr + foreach my $conn (@{$conn->{CONN}}) + { + my $source = $conn->{SOURCE}; + my $dest = $conn->{DEST}; + if ($self->getTargetParent($conn->{DEST}) eq $target) + { + $self->setAttributeField($target, $fapi_name, "engine", + $self->getAttribute($source, "I2C_ENGINE")); + $self->setAttributeField($target, $fapi_name, "port", + $self->getAttribute($source, "I2C_PORT")); + $self->setAttributeField($target, $fapi_name, "devAddr", + $self->getAttribute($dest, "I2C_ADDRESS")); + } + } + } + } + elsif ($type eq "MEM_PORT") + { + my $parent = $self->getTargetParent($target); + my $ocmb_num = $self->getAttribute($parent, "POSITION"); + my $ocmb_affinity = $self->getAttribute($parent, "AFFINITY_PATH"); + $self->setAttribute($target, "AFFINITY_PATH", "$ocmb_affinity/mem_port-0"); + my $ocmb_phys = $self->getAttribute($parent, "PHYS_PATH"); + $self->setAttribute($target, "PHYS_PATH", "$ocmb_phys/mem_port-0"); + $self->setHuid($target, $sys_pos, $node); + $self->deleteAttribute($target, "EXP_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT"); + + $self->{targeting}{SYS}[0]{NODES}[$node]{OCMB_CHIPS}[$ocmb_num]{MEM_PORTS}[0]{KEY} = $target; + } + # Witherspoon has its own DIMM parsing mechanism so don't want to + # interfere with it + elsif ($type eq "DIMM" && $self->getTargetType($target) eq "lcard-dimm-ddimm") + { + # Dimms are not posted in order, so need to get the dimm's position + $dimm = $self->getAttribute($target, "POSITION"); + + # Find the OMI bus connection to determine target values + my $proc_num = -1; + my $mc_num = -1; + my $mi_num = -1; + my $mcc_num = -1; + my $omi_num = -1; + my $conn = $self->findConnectionsByDirection($target, "OMI", "", 1); + + my $omi_chip_unit = -1; + if ($conn ne "") + { + foreach my $conn (@{$conn->{CONN}}) + { + my $source = $conn->{SOURCE}; + my @targets = split(/\//, $source); + + if ($source =~ /omic/i) + { + next; + } + + # Split the source into proc#, mc#, mi#, mcc#, omi# + # Source example: + # /sys-#/node-#/Pallid-#/proc_socket-#/Hopper-#/p9_axone/mc#/mi#/mcc#/omi# + foreach my $target (@targets) + { + $target =~ s/\D//g; + } + + # Splitting on "/" makes the first array index empty string + # so every value here is shifted over by 1 + # There are only ever two targets per parent in this case, + # so to get the relative positions for each target, we take + # mod two of the source value + $proc_num = $targets[4] % 2; + $mc_num = $targets[7] % 2; + $mi_num = $targets[8] % 2; + $mcc_num = $targets[9] % 2; + $omi_num = $targets[10]; + + # omi_num indicates the chip_unit of the corresponding omi + $omi_chip_unit = $omi_num; + $omi_num %= 2; + } + } + + $self->{targeting}{SYS}[0]{NODES}[$node]{DIMMS}[$dimm]{KEY} = $target; + $self->setAttribute($target, "PHYS_PATH", $node_phys . "/dimm-$dimm"); + $self->setHuid($target, $sys_pos, $node); + + # The standard fapi_pos calculation uses the relative position to + # the proc instead of omi_chip_unit. However, in this case, there is + # no direct way to get the relative position to the proc. The + # relationship between dimm and omi is 1:1, so we take the chip unit + # of the corresponding omi as the relative position to the proc + my $fapi_pos = $omi_chip_unit + ($maxInstance{"DDIMM"} * $proc_num); + $self->setAttribute($target, "FAPI_POS", $fapi_pos); + $self->setAttribute($target, "ORDINAL_ID", $dimm); + $self->setAttribute($target, "REL_POS", 0); + $self->setAttribute($target, "VPD_REC_NUM", $dimm); + + my $dimm_num = $fapi_pos; + if ($fapi_pos < 10) + { + $dimm_num = "0$fapi_pos"; + } + # chipunit:slot:node:system:position + $self->setAttribute($target, "FAPI_NAME", "dimm:k0:n0:s0:p$dimm_num"); + + my $ocmb_num = 0; + my $mem_num = 0; + $dimm_num = 0; + my $dimm_aff = $node_aff . "/proc-$proc_num/mc-$mc_num/mi-$mi_num/mcc-$mcc_num/omi-$omi_num/ocmb_chip-$ocmb_num/mem_port-$mem_num/dimm-$dimm_num"; + $self->setAttribute($target, "AFFINITY_PATH", $dimm_aff); + + my $eeprom_name = "EEPROM_VPD_PRIMARY_INFO"; + $self->setAttributeField($target, $eeprom_name, "chipCount", "0x01"); + $self->setAttributeField($target, $eeprom_name, "i2cMasterPath", "physical:sys-0/node-0/proc-$proc_num"); + } + elsif ($type eq "PMIC") + { + # Pmics are not in order, so we take the parent dimm's + # POSITION * 4 as our current pmic number, adding one + # if it's a pmic1, two if it's a pmic2, three if it's a + # pmic3 + # Ex. on a pmic0, dimm19 = pmic76 + # Ex. on a pmic1, dimm19 = pmic77 + # Ex. on a pmic2, dimm19 = pmic78 + # Ex. on a pmic3, dimm19 = pmic79 + my $instance_name = $self->getInstanceName($target); + my $parent = $self->getTargetParent($target); + my $parent_fapi_pos = $self->getAttribute($parent, "FAPI_POS"); + my $parent_pos = $self->getAttribute($parent, "POSITION"); + my $position = $self->getAttribute($target, "POSITION"); + $pmic = ($parent_pos * 4) + $position; + + $self->{targeting}{SYS}[0]{NODES}[$node]{PMICS}[$pmic]{KEY} = $target; + $self->setAttribute($target, "PHYS_PATH", $node_phys . "/pmic-$pmic"); + $self->setAttribute($target, "ORDINAL_ID", $pmic); + $self->setAttribute($target, "REL_POS", $pmic % 2); + + # Same logic with the position, but with FAPI_POS instead + my $fapi_pos = ($parent_fapi_pos * 4) + $position; + $self->setAttribute($target, "FAPI_POS", $fapi_pos); + $self->setAttribute($target, "POSITION", $pmic); + $self->setHuid($target, $sys_pos, $node); + + my $pmic_num = $fapi_pos; + # The norm for FAPI_NAME has a two digit number at the end + if ($fapi_pos < 10) + { + $pmic_num = "0$fapi_pos"; + } + # chipunit:slot:node:system:position + $self->setAttribute($target, "FAPI_NAME", "pmic:k0:n0:s0:p$pmic_num"); + + # Find the OMI bus connection to determine target values + my $proc_num = -1; + my $mc_num = -1; + my $mi_num = -1; + my $mcc_num = -1; + my $omi_num = -1; + my $conn = $self->findConnectionsByDirection($self->getTargetParent($target), "OMI", "", 1); + if ($conn ne "") + { + foreach my $conn (@{$conn->{CONN}}) + { + my $source = $conn->{SOURCE}; + my @targets = split(/\//, $source); + # Split the source into proc#, mc#, mi#, mcc#, omi# + # Source example: + # /sys-#/node-#/Pallid-#/proc_socket-#/Hopper-#/p9_axone/mc#/mi#/mcc#/omi# + if ($source =~ /omic/i) + { + next; + } + + foreach my $target (@targets) + { + $target =~ s/\D//g; + } + # Splitting on "/" makes the first array index empty string + # so every value here is shifted over by 1 + # There are only ever two targets per parent in this case, + # so to get the relative positions for each target, we take + # mod two of the source value + $proc_num = $targets[4] % 2; + $mc_num = $targets[7] % 2; + $mi_num = $targets[8] % 2; + $mcc_num = $targets[9] % 2; + $omi_num = $targets[10] % 2; + } + } + + my $ocmb_num = 0; + $pmic_num %= 2; + my $pmic_aff = $node_aff . "/proc-$proc_num/mc-$mc_num/mi-$mi_num/mcc-$mcc_num/omi-$omi_num/ocmb_chip-$ocmb_num/pmic-$pmic_num"; + $self->setAttribute($target, "AFFINITY_PATH", $pmic_aff); + + my $fapi_name = "FAPI_I2C_CONTROL_INFO"; + $self->setAttributeField($target, $fapi_name, "i2cMasterPath", + "physical:sys-0/node-0/proc-$proc_num"); + } elsif ($type eq "PROC") { my $socket = $target; @@ -879,14 +1283,14 @@ sub buildAffinity $self->setAttribute($target, "POSITION", $proc); $self->setAttribute($target, "FABRIC_GROUP_ID", - $self->getAttribute($socket,"FABRIC_GROUP_ID")); + $self->getAttribute($socket,"FABRIC_GROUP_ID")); $self->setAttribute($target, "FABRIC_CHIP_ID", - $self->getAttribute($socket,"FABRIC_CHIP_ID")); + $self->getAttribute($socket,"FABRIC_CHIP_ID")); $self->setAttribute($target, "VPD_REC_NUM", $proc); - $self->setAttribute($target, "FAPI_POS", - $self->getAttribute($socket,"FABRIC_GROUP_ID") * - NUM_PROCS_PER_GROUP + - $self->getAttribute($socket,"FABRIC_CHIP_ID")); + $proc_fapi = $self->getAttribute($socket, "FABRIC_GROUP_ID") * + NUM_PROCS_PER_GROUP + + $self->getAttribute($socket, "FABRIC_CHIP_ID"); + $self->setAttribute($target, "FAPI_POS", $proc_fapi); # Both for FSP and BMC based systems, it's good enough # to look for processor with active LPC bus connected @@ -1026,6 +1430,11 @@ sub iterateOverChiplets my $tgt_ptr = $self->getTarget($target); my $tgt_type = $self->getType($target); + # Previous OBUS parent + my $prev_obus = -1; + # Subtract factor for OBUS_BRICK + my $brick_sub = -1; + my $target_children = $self->getTargetChildren($target); if ($target_children eq "") @@ -1120,13 +1529,27 @@ sub iterateOverChiplets #System XML has some sensor target as hidden children #of targets. We don't care for sensors in this function #So, we can avoid them with this conditional - if ($unit_type ne "PCI" && $unit_type ne "NA" && $unit_type ne "FSI" && $unit_type ne "PSI" && $unit_type ne "SYSREFCLKENDPT" && $unit_type ne "MFREFCLKENDPT") { + if ($unit_type eq "OBUS_BRICK") + { + # Check to see if this is on a new obus + # Current obus is the CHIP_UNIT of the parent obus + my $curr_obus = $self->getAttribute($target, + "CHIP_UNIT"); + if ($prev_obus ne $curr_obus) + { + my $brick_pos = $self->getAttribute($child, + "CHIP_UNIT"); + $brick_sub = $brick_pos; + $prev_obus = $curr_obus; + } + } #set common attrs for child - $self->setCommonAttrForChiplet($child, $sys, $node, $proc); + $self->setCommonAttrForChiplet($child, $sys, $node, $proc, + $prev_obus, $brick_sub); $self->iterateOverChiplets($child, $sys, $node, $proc); } } @@ -1156,6 +1579,8 @@ sub setCommonAttrForChiplet my $sys = shift; my $node = shift; my $proc = shift; + my $prev_obus = shift; + my $brick_sub = shift; my $tgt_ptr = $self->getTarget($target); my $tgt_type = $self->getType($target); @@ -1194,7 +1619,15 @@ sub setCommonAttrForChiplet } elsif ($tgt_type eq "OBUS_BRICK") { - $unit_pos = $pos%3; + # Relative position of OBUS_BRICK is just the difference between the + # current position and the position of the first obus_brick of the + # parent obus + # Ex: obus3 -> obus_brick9 + # -> obus_brick10 + # -> obus_brick11 + # Position of first obus_brick of parent obus = 9 + # Relative position of obus_brick11 = 11 - 9 = 2 + $unit_pos = $pos - $brick_sub; } elsif ($tgt_type eq "SMPGROUP") { @@ -1203,6 +1636,11 @@ sub setCommonAttrForChiplet $self->setAttribute($target, "INSTANCE_PATH", $target); $unit_pos = $pos%2; } + elsif ($tgt_type eq "OMIC") + { + # There are 3 OMICs per MC parent + $unit_pos = $pos % 3; + } my $parent_affinity = $self->getAttribute( $self->getTargetParent($target),"AFFINITY_PATH"); @@ -1394,6 +1832,7 @@ sub getPervasiveForUnit my $offset = 0; for my $obrick (0..$maxInstance{"OBUS_BRICK"}-1) { + #todo-RTC:209409-Handle Axone layout $offset += (($obrick%3 == 0) && ($obrick != 0)) ? 1 : 0; $unitToPervasive{"OBUS_BRICK$obrick"} = PERVASIVE_PARENT_OBUS_OFFSET + $offset; @@ -1412,6 +1851,7 @@ sub getPervasiveForUnit return $pervasive } + sub processMcaDimms { my $self = shift; @@ -1546,6 +1986,12 @@ sub processMc foreach my $dmi (@{ $self->getTargetChildren($mi) }) { + my $child_type = $self->getType($dmi); + if ($child_type ne "DMI") + { + next; + } + my $dmi_num = $self->getAttribute($dmi, "CHIP_UNIT"); my $membufnum = $proc * $self->{MAX_DMI} + $dmi_num; @@ -1572,7 +2018,7 @@ sub processMc my $parent_physical = $self->getAttribute($membuf, "PHYS_PATH"); $self->setAttribute($membuf,"FAPI_NAME", - $self->getFapiName($membuf_type, $node, $membufnum)); + $self->getFapiName($membuf_type, $node, $membufnum, $memCardOffset)); my $fapi_pos = (($node * $maxInstance{"PROC"}) + $proc ) * $self->{MAX_DMI} + $dmi_num; @@ -1955,6 +2401,15 @@ sub getConnectionBus return $target_ptr->{CONNECTION}->{BUS}->[$i]; } +sub getConnectionBusParent +{ + my $self = shift; + my $target = shift; + my $i = shift; + my $target_ptr = $self->getTarget($target); + return $target_ptr->{CONNECTION}->{BUS_PARENT}->[$i]; +} + sub findFirstEndpoint { my $self = shift; @@ -2012,6 +2467,192 @@ sub findDestConnections } +sub setEepromAttributesForAxone +{ + my $self = shift; + my $targetObj = shift; + # Expects ocmb target + my $target = shift; + + my %connections; + my $num=0; + + my $eeprom_name = "EEPROM_VPD_PRIMARY_INFO"; + my $fapi_name = "FAPI_I2C_CONTROL_INFO"; + # SPD contains data for EEPROM_VPD_PRIMARY_INFO and FAPI_I2C_CONTROL_INFO + # SPD is the child of ocmb's parent, so get ocmb's parent + # then look for the SPD child + # With the resulting info, we populate pmic0, pmic1, ocmb, and dimm + my $target_parent = $self->getTargetParent($target); + + # Need to store pmic targets because they get parsed before we + # do calculations for engine, port, and muxBusSelector + # pmics need these values, so we store them until we need them later + my $address = 0; + my @pmic_array; + foreach my $child (@{ $self->getTargetChildren($target_parent) }) + { + my $type = $self->getTargetType($child); + if ($type eq "chip-spd-device") + { + my $offset = $self->getAttribute($child, "BYTE_ADDRESS_OFFSET"); + my $memory_size = $self->getAttribute($child, "MEMORY_SIZE_IN_KB"); + my $cycle_time = $self->getAttribute($child, "WRITE_CYCLE_TIME"); + my $page_size = $self->getAttribute($child, "WRITE_PAGE_SIZE"); + + # Populate EEPROM for ocmb + $targetObj->setAttributeField($target, $eeprom_name, "byteAddrOffset", + $offset); + $targetObj->setAttributeField($target, $eeprom_name, "maxMemorySizeKB", + $memory_size); + $targetObj->setAttributeField($target, $eeprom_name, "writeCycleTime", + $cycle_time); + $targetObj->setAttributeField($target, $eeprom_name, "writePageSize", + $page_size); + + # Populate EEPROM for dimm + $targetObj->setAttributeField($target_parent, $eeprom_name, "byteAddrOffset", + $offset); + $targetObj->setAttributeField($target_parent, $eeprom_name, "maxMemorySizeKB", + $memory_size); + $targetObj->setAttributeField($target_parent, $eeprom_name, "writeCycleTime", + $cycle_time); + $targetObj->setAttributeField($target_parent, $eeprom_name, "writePageSize", + $page_size); + + # spd only child is i2c-slave, which contains devAddr info + foreach my $i2c_slave (@{ $self->getTargetChildren($child) }) + { + $address = $self->getAttribute($i2c_slave, "I2C_ADDRESS"); + # Populate EEPROM for dimm + $targetObj->setAttributeField($target_parent, $eeprom_name, "devAddr", + $address); + + # Populate EEPROM for ocmb + $targetObj->setAttributeField($target, $eeprom_name, "devAddr", + $address); + } + } + elsif ($type eq "chip-vreg-generic") + { + push(@pmic_array, $child); + foreach my $i2c_slave (@{ $self->getTargetChildren($child) }) + { + $type = $self->getTargetType($i2c_slave); + # pmic has child i2c_slave which contains the device address + if ($type eq "unit-i2c-slave") + { + $address = $self->getAttribute($i2c_slave, "I2C_ADDRESS"); + + # Populate FAPI for pmic + $targetObj->setAttributeField($child, $fapi_name, "devAddr", + $address); + last; + } + } + } + elsif ($type eq "chip-ocmb") + { + foreach my $i2c_slave (@{ $self->getTargetChildren($child) }) + { + # ocmb has multiple i2c-slaves, so we query with instance_name + my $instance_name = $self->getInstanceName($i2c_slave); + if ($instance_name eq "i2c-ocmb") + { + $address = $self->getAttribute($i2c_slave, "I2C_ADDRESS"); + + # Populate FAPI for ocmb + $targetObj->setAttributeField($target, $fapi_name, "devAddr", + $address); + last; + } + } + } + } + + # Get data from i2c-master-omi, which connects to the i2c_mux PCA9847 + my $conn = $self->findConnectionsByDirection($target, "I2C", "", 1); + if ($conn ne "") + { + # There exists multiple i2c bus connections with chip-ocmb + # They are all the same connections so we just take the first one + # The mux channel has the i2cMuxBusSelector + my $conn_source = @{$conn->{CONN}}[0]->{SOURCE}; + my $mux = $self->getAttribute($conn_source, "MUX_CHANNEL"); + + # Parent PCA9848 determines the mux path + my $parent = $self->getTargetParent($conn_source); + my $parent_pos = $self->getAttribute($parent, "POSITION"); + my $i2c_mux_path = "physical:sys-0/node-0/i2c_mux-$parent_pos"; + + # pmics and ocmb all grab FRU_ID from parent dimm + my $fru = $self->getAttribute($target_parent, "FRU_ID"); + + my $master_i2c = $self->findConnectionsByDirection($self->getTargetParent($conn_source), "I2C", "", 1); + if ($master_i2c ne "") + { + # There exists multiple i2c bus connections with the PCA9847 i2c_mux + # They are all the same connections so we just take the first one + $master_i2c = @{$master_i2c->{CONN}}[0]; + # i2c-master-omi source which has data we need + my $source = $master_i2c->{SOURCE}; + my $dest = $master_i2c->{DEST}; + my $engine = $self->getAttribute($source, "I2C_ENGINE"); + my $port = $self->getAttribute($source, "I2C_PORT"); + + # Populate FAPI for ocmb + $self->setAttributeField($target, $fapi_name, "engine", + $engine); + $self->setAttributeField($target, $fapi_name, "port", + $port); + $self->setAttributeField($target, $fapi_name, "i2cMuxBusSelector", + $mux); + $self->setAttributeField($target, $fapi_name, "i2cMuxPath", + $i2c_mux_path); + $self->setAttribute($target, "FRU_ID", + $fru); + + # Populate EEPROM for ocmb + $self->setAttributeField($target, $eeprom_name, "i2cMuxPath", + $i2c_mux_path); + $self->setAttributeField($target, $eeprom_name, "engine", + $engine); + $self->setAttributeField($target, $eeprom_name, "port", + $port); + $self->setAttributeField($target, $eeprom_name, "i2cMuxBusSelector", + $mux); + + + # Populate FAPI for pmics + foreach my $pmic (@pmic_array) + { + $self->setAttributeField($pmic, $fapi_name, "engine", + $engine); + $self->setAttributeField($pmic, $fapi_name, "port", + $port); + $self->setAttributeField($pmic, $fapi_name, "i2cMuxBusSelector", + $mux); + $self->setAttributeField($pmic, $fapi_name, "i2cMuxPath", + $i2c_mux_path); + $self->setAttribute($pmic, "FRU_ID", + $fru); + } + + # Populate EEPROM for dimm + $self->setAttributeField($target_parent, $eeprom_name, "engine", + $engine); + $self->setAttributeField($target_parent, $eeprom_name, "port", + $port); + $self->setAttributeField($target_parent, $eeprom_name, "i2cMuxBusSelector", + $mux); + $self->setAttributeField($target_parent, $eeprom_name, "i2cMuxPath", + $i2c_mux_path); + $self->setAttribute($target_parent, "FRU_ID", + $fru); + } + } +} + # Find connections from/to $target (and it's children) # $to_this_target indicates the direction to find. sub findConnectionsByDirection @@ -2049,6 +2690,7 @@ sub findConnectionsByDirection { $numOfConnections = $self->getNumConnections($child); } + for (my $i = 0; $i < $numOfConnections; $i++) { my $other_end_target = undef; @@ -2061,6 +2703,7 @@ sub findConnectionsByDirection $other_end_target = $self->getConnectionDestination($child, $i); } + my $other_end_parent = $self->getTargetParent($other_end_target); my $type = $self->getMrwType($other_end_parent); my $dest_type = $self->getType($other_end_parent); @@ -2079,12 +2722,10 @@ sub findConnectionsByDirection #like unit->pingroup->muxgroup->chip where the chip has #the interesting type. while ($type ne $other_end_type) { - $other_end_parent = $self->getTargetParent($other_end_parent); if ($other_end_parent eq "") { last; } - $type = $self->getMrwType($other_end_parent); if ($type eq "NA") { $type = $self->getType($other_end_parent); @@ -2518,7 +3159,6 @@ sub setHuid $index = $self->{huid_idx}->{$type}; } else { $self->{huid_idx}->{$type} = 0; } - # Format: SSSS NNNN TTTTTTTT iiiiiiiiiiiiiiii my $huid = sprintf("%01x%01x%02x%04x", $sys, $node, $type_id, $index); $huid = "0x" . uc($huid); @@ -2554,6 +3194,19 @@ sub setMruid $self->{mru_idx}->{$node}->{$type}++; } +sub getMasterProc +{ + my $self = shift; + return $self->{master_proc}; +} + +sub setMasterProc +{ + my $self = shift; + my $target = shift; + $self->{master_proc}=$target; +} + sub getSystemName { my $self = shift; @@ -2786,11 +3439,16 @@ C<TARGET_STRING>. The bus data structure is also a target with attributes. Returns the target string of the C<INDEX> target found connected to C<TARGET_STRING>. -=item getConnectionBus(C<TARGET_STRING>) +=item getConnectionBus(C<TARGET_STRING>,C<INDEX>) Returns the data structure of the C<INDEX> bus target found connected to C<TARGET_STRING>. +=item getConnectionBusParent(C<TARGET_STRING>,C<INDEX>) + +Returns C<PARENT_TARGET_STRING> of the parent target for the bus target found +connected to C<TARGET_STRING> + =item findEndpoint(C<TARGET_STRING>,C<BUS_TYPE>,C<ENDPOINT_MRW_TYPE>) Searches through all connections to C<TARGET_STRING> diff --git a/src/usr/targeting/common/associationmanager.C b/src/usr/targeting/common/associationmanager.C index 984eb17ec..b811f1861 100644 --- a/src/usr/targeting/common/associationmanager.C +++ b/src/usr/targeting/common/associationmanager.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -199,7 +199,7 @@ errlHndl_t AssociationManager::reconnectSyAndNodeTargets() { TARG_ERR("Failed to find master system target"); - /* + /*@ * @errortype * @refcode LIC_REFCODE * @subsys EPUB_FIRMWARE_SP @@ -304,7 +304,7 @@ errlHndl_t AssociationManager::_clearAssocsOfTypeFromSysOrNodeTarget( pAssocsItrPreTrans, i_pSysOrNodeTarget->getAttr<TARGETING::ATTR_HUID>(), i_pSysOrNodeTarget); - /* + /*@ * @errortype * @refcode LIC_REFCODE * @subsys EPUB_FIRMWARE_SP @@ -447,7 +447,7 @@ errlHndl_t AssociationManager::_addAssocToSysOrNodeTarget( pAssocsItrPreTrans, i_pSourceSysOrNodeTarget->getAttr<TARGETING::ATTR_HUID>(), i_pSourceSysOrNodeTarget); - /* + /*@ * @errortype * @refcode LIC_REFCODE * @subsys EPUB_FIRMWARE_SP @@ -482,7 +482,7 @@ errlHndl_t AssociationManager::_addAssocToSysOrNodeTarget( "maxLinks = %d, i_assocType = 0x%08X, HUID = 0x%08X", association, maxLinks, i_assocType, i_pSourceSysOrNodeTarget->getAttr<TARGETING::ATTR_HUID>()); - /* + /*@ * @errortype * @refcode LIC_REFCODE * @subsys EPUB_FIRMWARE_SP diff --git a/src/usr/targeting/common/attributeTank.C b/src/usr/targeting/common/attributeTank.C index 07ccff982..c6cad3c49 100644 --- a/src/usr/targeting/common/attributeTank.C +++ b/src/usr/targeting/common/attributeTank.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2017 */ +/* Contributors Listed Below - COPYRIGHT 2013,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -99,10 +99,12 @@ void AttributeTank::clearAllAttributes( while (l_itr != iv_attributes.end()) { + // Get a copy of the Attribute's node for quick access + uint8_t l_node = (*l_itr)->getHeader().iv_node; if (i_nodeFilter == NODE_FILTER_NOT_ALL_NODES) { // Only clear attributes that are not for all nodes - if ((*l_itr)->iv_hdr.iv_node == ATTR_NODE_NA) + if (l_node == ATTR_NODE_NA) { l_itr++; continue; @@ -111,8 +113,8 @@ void AttributeTank::clearAllAttributes( else if (i_nodeFilter == NODE_FILTER_SPECIFIC_NODE_AND_ALL) { // Only clear attributes associated with i_node or all - if ( ((*l_itr)->iv_hdr.iv_node != ATTR_NODE_NA) && - ((*l_itr)->iv_hdr.iv_node != i_node) ) + if ( (l_node != ATTR_NODE_NA) && + (l_node != i_node) ) { l_itr++; continue; @@ -121,7 +123,7 @@ void AttributeTank::clearAllAttributes( else if (i_nodeFilter == NODE_FILTER_SPECIFIC_NODE) { // Only clear attributes associated with i_node - if ((*l_itr)->iv_hdr.iv_node != i_node) + if (l_node != i_node) { l_itr++; continue; @@ -153,13 +155,18 @@ void AttributeTank::clearNonConstAttribute(const uint32_t i_attrId, for (AttributesItr_t l_itr = iv_attributes.begin(); l_itr != iv_attributes.end(); ++l_itr) { - if ( ((*l_itr)->iv_hdr.iv_attrId == i_attrId) && - ((*l_itr)->iv_hdr.iv_targetType == i_targetType) && - ((*l_itr)->iv_hdr.iv_pos == i_pos) && - ((*l_itr)->iv_hdr.iv_unitPos == i_unitPos) && - ((*l_itr)->iv_hdr.iv_node == i_node) ) + // Get a (constant) reference to the Attribute Header + // for easy access to data members + const AttributeHeader &l_attributeHeader = (*l_itr)->getHeader(); + + // Find attribute that satisfies search criteria + if ( (l_attributeHeader.iv_attrId == i_attrId) && + (l_attributeHeader.iv_targetType == i_targetType) && + (l_attributeHeader.iv_pos == i_pos) && + (l_attributeHeader.iv_unitPos == i_unitPos) && + (l_attributeHeader.iv_node == i_node) ) { - if (!((*l_itr)->iv_hdr.iv_flags & ATTR_FLAG_CONST)) + if (!(l_attributeHeader.iv_flags & ATTR_FLAG_CONST)) { delete (*l_itr); (*l_itr) = NULL; @@ -196,20 +203,25 @@ void AttributeTank::setAttribute(const uint32_t i_attrId, for (AttributesItr_t l_itr = iv_attributes.begin(); l_itr != iv_attributes.end(); ++l_itr) { - if ( ((*l_itr)->iv_hdr.iv_attrId == i_attrId) && - ((*l_itr)->iv_hdr.iv_targetType == i_targetType) && - ((*l_itr)->iv_hdr.iv_pos == i_pos) && - ((*l_itr)->iv_hdr.iv_unitPos == i_unitPos) && - ((*l_itr)->iv_hdr.iv_node == i_node) && - ((*l_itr)->iv_hdr.iv_valSize == i_valSize) ) + // Get a reference to the Attribute Header + // for easy access to data members + const AttributeHeader &l_attributeHeader = (*l_itr)->getHeader(); + + // Find attribute that satisfies search criteria + if ( (l_attributeHeader.iv_attrId == i_attrId) && + (l_attributeHeader.iv_targetType == i_targetType) && + (l_attributeHeader.iv_pos == i_pos) && + (l_attributeHeader.iv_unitPos == i_unitPos) && + (l_attributeHeader.iv_node == i_node) && + (l_attributeHeader.iv_valSize == i_valSize) ) { // Found existing attribute, update it unless the existing attribute // is const and the new attribute is non-const - if (!( ((*l_itr)->iv_hdr.iv_flags & ATTR_FLAG_CONST) && + if (!( (l_attributeHeader.iv_flags & ATTR_FLAG_CONST) && (!(i_flags & ATTR_FLAG_CONST)) ) ) { - (*l_itr)->iv_hdr.iv_flags = i_flags; - memcpy((*l_itr)->iv_pVal, i_pVal, i_valSize); + (*l_itr)->setFlags(i_flags); + (*l_itr)->setValue(i_pVal, i_valSize); } l_found = true; break; @@ -221,15 +233,13 @@ void AttributeTank::setAttribute(const uint32_t i_attrId, // Add a new attribute to the tank Attribute * l_pAttr = new Attribute(); - l_pAttr->iv_hdr.iv_attrId = i_attrId; - l_pAttr->iv_hdr.iv_targetType = i_targetType; - l_pAttr->iv_hdr.iv_pos = i_pos; - l_pAttr->iv_hdr.iv_unitPos = i_unitPos; - l_pAttr->iv_hdr.iv_node = i_node; - l_pAttr->iv_hdr.iv_flags = i_flags; - l_pAttr->iv_hdr.iv_valSize = i_valSize; - l_pAttr->iv_pVal = new uint8_t[i_valSize]; - memcpy(l_pAttr->iv_pVal, i_pVal, i_valSize); + l_pAttr->setId(i_attrId); + l_pAttr->setTargetType(i_targetType); + l_pAttr->setPosition(i_pos); + l_pAttr->setUnitPosition(i_unitPos); + l_pAttr->setNode(i_node); + l_pAttr->setFlags(i_flags); + l_pAttr->setValue(i_pVal, i_valSize); iv_attributesExist = true; iv_attributes.push_back(l_pAttr); @@ -253,18 +263,22 @@ bool AttributeTank::getAttribute(const uint32_t i_attrId, for (AttributesCItr_t l_itr = iv_attributes.begin(); l_itr != iv_attributes.end(); ++l_itr) { - // Allow match if attribute applies to all positions - if ( ((*l_itr)->iv_hdr.iv_attrId == i_attrId) && - ((*l_itr)->iv_hdr.iv_targetType == i_targetType) && - (((*l_itr)->iv_hdr.iv_pos == ATTR_POS_NA) || - ((*l_itr)->iv_hdr.iv_pos == i_pos)) && - (((*l_itr)->iv_hdr.iv_unitPos == ATTR_UNIT_POS_NA) || - ((*l_itr)->iv_hdr.iv_unitPos == i_unitPos)) && - (((*l_itr)->iv_hdr.iv_node == ATTR_NODE_NA) || - ((*l_itr)->iv_hdr.iv_node == i_node)) ) + // Get a (constant) reference to the Attribute Header + // for easy access to data members + const AttributeHeader &l_attributeHeader = (*l_itr)->getHeader(); + + // Find attribute that satisfies search criteria + if ( (l_attributeHeader.iv_attrId == i_attrId) && + (l_attributeHeader.iv_targetType == i_targetType) && + ((l_attributeHeader.iv_pos == ATTR_POS_NA) || + (l_attributeHeader.iv_pos == i_pos)) && + ((l_attributeHeader.iv_unitPos == ATTR_UNIT_POS_NA) || + (l_attributeHeader.iv_unitPos == i_unitPos)) && + ((l_attributeHeader.iv_node == ATTR_NODE_NA) || + (l_attributeHeader.iv_node == i_node)) ) { l_found = true; - memcpy(o_pVal, (*l_itr)->iv_pVal, (*l_itr)->iv_hdr.iv_valSize); + (*l_itr)->cloneValue(o_pVal, l_attributeHeader.iv_valSize); break; } } @@ -293,10 +307,18 @@ void AttributeTank::serializeAttributes( // Fill up the buffer with as many attributes as possible while (l_itr != iv_attributes.end()) { + // Get a (constant) reference to the Attribute Header + // for easy access to data members + const AttributeHeader &l_attributeHeader = + (*l_itr)->getHeader(); + + // Get a copy of the node for quick access + uint8_t l_node = l_attributeHeader.iv_node; + if (i_nodeFilter == NODE_FILTER_NOT_ALL_NODES) { // Only want attributes that are not for all nodes - if ((*l_itr)->iv_hdr.iv_node == ATTR_NODE_NA) + if (l_node == ATTR_NODE_NA) { l_itr++; continue; @@ -305,8 +327,8 @@ void AttributeTank::serializeAttributes( else if (i_nodeFilter == NODE_FILTER_SPECIFIC_NODE_AND_ALL) { // Only want attributes associated with i_node or all - if ( ((*l_itr)->iv_hdr.iv_node != ATTR_NODE_NA) && - ((*l_itr)->iv_hdr.iv_node != i_node) ) + if ( (l_node != ATTR_NODE_NA) && + (l_node != i_node) ) { l_itr++; continue; @@ -315,15 +337,14 @@ void AttributeTank::serializeAttributes( else if (i_nodeFilter == NODE_FILTER_SPECIFIC_NODE) { // Only want attributes associated with i_node - if ((*l_itr)->iv_hdr.iv_node != i_node) + if (l_node != i_node) { l_itr++; continue; } } - if ((l_index + sizeof(AttributeHeader) + - (*l_itr)->iv_hdr.iv_valSize) > i_chunkSize) + if ((l_index + (*l_itr)->getSize()) > i_chunkSize) { // Attribute will not fit into the buffer if (l_index == 0) @@ -334,7 +355,7 @@ void AttributeTank::serializeAttributes( TRACFCOMP(g_trac_targeting, "serializeAttributes: Error, attr too big to serialize " "(0x%x)", - (*l_itr)->iv_hdr.iv_valSize); + l_attributeHeader.iv_valSize); l_itr++; } else @@ -346,17 +367,8 @@ void AttributeTank::serializeAttributes( } else { - // Copy the attribute header to the buffer - AttributeHeader * l_pHeader = - reinterpret_cast<AttributeHeader *>(l_pBuffer + l_index); - *l_pHeader = (*l_itr)->iv_hdr; - l_index += sizeof(AttributeHeader); - - // Copy the attribute value to the buffer - memcpy((l_pBuffer + l_index), (*l_itr)->iv_pVal, - (*l_itr)->iv_hdr.iv_valSize); - l_index += (*l_itr)->iv_hdr.iv_valSize; - + l_index += (*l_itr)->serialize(l_pBuffer + l_index, + (*l_itr)->getSize()); l_itr++; } } @@ -404,7 +416,7 @@ bool AttributeTank::attributeExists(const uint32_t i_attrId) const for (AttributesCItr_t l_itr = iv_attributes.begin(); l_itr != iv_attributes.end(); ++l_itr) { - if ((*l_itr)->iv_hdr.iv_attrId == i_attrId) + if ((*l_itr)->getHeader().iv_attrId == i_attrId) { l_found = true; break; @@ -424,60 +436,54 @@ void AttributeTank::deserializeAttributes( uint32_t l_index = 0; + // Get a handle to the serialized Attributes + uint8_t* l_serializedData = + reinterpret_cast<uint8_t*>(i_attributes.iv_pAttributes); + + // Iterate thru the Attributes while (l_index < i_attributes.iv_size) { - AttributeHeader * l_pAttrHdr = - reinterpret_cast<AttributeHeader *> - (i_attributes.iv_pAttributes + l_index); + // Create a new Attribute + Attribute * l_pAttribute = new Attribute(); - if (sizeof(AttributeHeader) > (i_attributes.iv_size - l_index)) + // Deserialize the data, if possible + uint32_t l_deserializedDataSize = l_pAttribute->deserialize( + l_serializedData + l_index, + i_attributes.iv_size - l_index); + + if (!l_deserializedDataSize) { + // Unable to deserialize data, delete Attribute + delete l_pAttribute; + l_pAttribute = NULL; + // Remaining chunk smaller than attribute header, quit TRACFCOMP(g_trac_targeting, - "deserializeAttributes: Error, header too big for chunk " - "(0x%x)", + "deserializeAttributes: Error, attribute too big for " + "chunk (0x%x)", (i_attributes.iv_size - l_index)); break; } - l_index += sizeof(AttributeHeader); - - if (l_pAttrHdr->iv_valSize > (i_attributes.iv_size - l_index)) - { - // Remaining chunk smaller than attribute value, quit - TRACFCOMP(g_trac_targeting, - "deserializeAttributes: Error, attr too big for chunk " - "(0x%x:0x%x)", - l_pAttrHdr->iv_valSize, (i_attributes.iv_size - l_index)); - break; - } - - // Create a new Attribute and add it to the tank - Attribute * l_pAttr = new Attribute(); - l_pAttr->iv_hdr = *l_pAttrHdr; - l_pAttr->iv_pVal = new uint8_t[l_pAttrHdr->iv_valSize]; - memcpy(l_pAttr->iv_pVal, (i_attributes.iv_pAttributes + l_index), - l_pAttrHdr->iv_valSize); - - l_index += l_pAttrHdr->iv_valSize; + // Was able to deserialize data, add Attribute to the tank iv_attributesExist = true; - iv_attributes.push_back(l_pAttr); + iv_attributes.push_back(l_pAttribute); + + // Increment the index after deserializing an attribute + l_index += l_deserializedDataSize; - if // attributes should be echo'd - ( i_echoAttributes == true ) + if ( i_echoAttributes == true ) // attributes should be echo'd { // extract individual fields from attribute - uint32_t attrId = l_pAttr->iv_hdr.iv_attrId; - uint32_t targetType = l_pAttr->iv_hdr.iv_targetType; - uint16_t pos = l_pAttr->iv_hdr.iv_pos; - uint8_t unitPos = l_pAttr->iv_hdr.iv_unitPos; - - const uint8_t * pNodeFlags = (&(l_pAttr->iv_hdr.iv_unitPos)) + 1; + uint32_t attrId(l_pAttribute->getHeader().iv_attrId); + uint32_t targetType(l_pAttribute->getHeader().iv_targetType); + uint16_t pos(l_pAttribute->getHeader().iv_pos); + uint8_t unitPos(l_pAttribute->getHeader().iv_unitPos); - uint8_t node = (*pNodeFlags) >> 4; // isolate hi nibble - uint8_t flags = (*pNodeFlags) & 0x0F; // isolate lo nibble + uint8_t node(l_pAttribute->getHeader().iv_node); + uint8_t flags(l_pAttribute->getHeader().iv_flags); - uint32_t valueLen = l_pAttr->iv_hdr.iv_valSize; + uint32_t valueLen(l_pAttribute->getHeader().iv_valSize); TRACFCOMP(g_trac_targeting, "deserializeAttributes: Attribute Hdr: " @@ -488,7 +494,7 @@ void AttributeTank::deserializeAttributes( TRACFBIN(g_trac_targeting, "deserializeAttributes: Parm Value: ", - l_pAttr->iv_pVal, valueLen); + l_pAttribute->getValue(), valueLen); } // end echo attributes } @@ -505,20 +511,6 @@ void AttributeTank::deserializeAttributes( } //****************************************************************************** -AttributeTank::Attribute::Attribute() : - iv_pVal(NULL) -{ - -} - -//****************************************************************************** -AttributeTank::Attribute::~Attribute() -{ - delete[] iv_pVal; - iv_pVal = NULL; -} - -//****************************************************************************** errlHndl_t AttributeTank::writePermAttributes() { errlHndl_t l_err = NULL; @@ -526,8 +518,10 @@ errlHndl_t AttributeTank::writePermAttributes() for(AttributesCItr_t l_attrIter = iv_attributes.begin(); l_attrIter != iv_attributes.end(); ++l_attrIter) { - Attribute* l_attr = *l_attrIter; - AttributeHeader l_attrHdr = l_attr->iv_hdr; + // Get a (constant) reference to the Attribute Header + // for easy access to data members + const AttributeHeader &l_attrHdr = (*l_attrIter)->getHeader(); + PredicatePostfixExpr l_permAttrOverrides; // Predicate to match target type @@ -553,7 +547,7 @@ errlHndl_t AttributeTank::writePermAttributes() bool l_success = (*l_permTargetList)->_trySetAttr( static_cast<ATTRIBUTE_ID>(l_attrHdr.iv_attrId), l_attrHdr.iv_valSize, - l_attr->iv_pVal ); + (*l_attrIter)->getValue() ); if (l_success) { @@ -561,16 +555,17 @@ errlHndl_t AttributeTank::writePermAttributes() "permanent override of Attr ID:0x%X Value:0x%llX applied " "to target 0x%X", l_attrHdr.iv_attrId, - *reinterpret_cast<uint64_t *>(l_attr->iv_pVal), + *reinterpret_cast<const uint64_t *> + ((*l_attrIter)->getValue()), (*l_permTargetList)->getAttr<ATTR_HUID>() ); } else { - uint8_t * io_pAttrData = NULL; + uint8_t * l_pAttrData(NULL); bool l_found = (*l_permTargetList)->_tryGetAttr( static_cast<ATTRIBUTE_ID>(l_attrHdr.iv_attrId), l_attrHdr.iv_valSize, - io_pAttrData); + l_pAttrData); if (l_found) { @@ -579,9 +574,10 @@ errlHndl_t AttributeTank::writePermAttributes() "ID:0x%X Value:0x%llX on target 0x%X - current value " "0x%llX", l_attrHdr.iv_attrId, - *reinterpret_cast<uint64_t *>(l_attr->iv_pVal), + *reinterpret_cast<const uint64_t *> + ((*l_attrIter)->getValue()), (*l_permTargetList)->getAttr<ATTR_HUID>(), - *reinterpret_cast<uint64_t *>(io_pAttrData) ); + *reinterpret_cast<uint64_t *>(l_pAttrData) ); /*@ * @errortype * @moduleid TARG_WRITE_PERM_ATTR @@ -616,7 +612,7 @@ errlHndl_t AttributeTank::writePermAttributes() * @devdesc Given target does not have given attribute * to apply override */ - UTIL::createTracingError( + UTIL::createTracingError( TARG_WRITE_PERM_ATTR, TARG_RC_WRITE_PERM_ATTR_TARGET_FAIL, (*l_permTargetList)->getAttr<ATTR_HUID>(), @@ -641,4 +637,23 @@ size_t AttributeTank::size() const return iv_attributes.size(); } +//****************************************************************************** +void AttributeTank::getAllAttributes( std::list<Attribute *>& o_attributes ) const +{ + o_attributes = iv_attributes; +} + +//****************************************************************************** +const char* AttributeTank::layerToString( TankLayer i_layer ) +{ + switch(i_layer) + { + case(AttributeTank::TANK_LAYER_FAPI): return "FAPI"; + case(AttributeTank::TANK_LAYER_TARG): return "TARG"; + case(AttributeTank::TANK_LAYER_PERM): return "PERM"; + default: return "UNKNOWN"; + } +} + } + diff --git a/src/usr/targeting/common/common.mk b/src/usr/targeting/common/common.mk index 5c357f111..951aa8663 100644 --- a/src/usr/targeting/common/common.mk +++ b/src/usr/targeting/common/common.mk @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2011,2018 +# Contributors Listed Below - COPYRIGHT 2011,2020 # [+] International Business Machines Corp. # # @@ -64,4 +64,3 @@ COMMON_TARGETING_OBJS += ${TARGET_OBJS} COMMON_TARGETING_OBJS += ${PREDICATES_OBJS} COMMON_TARGETING_OBJS += ${ITERATORS_OBJS} COMMON_TARGETING_OBJS += ${OTHER_OBJS} - diff --git a/src/usr/targeting/common/genHDATstructures.pl b/src/usr/targeting/common/genHDATstructures.pl index 5150e3a06..2bbcbfd9a 100755 --- a/src/usr/targeting/common/genHDATstructures.pl +++ b/src/usr/targeting/common/genHDATstructures.pl @@ -6,7 +6,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2015,2018 +# Contributors Listed Below - COPYRIGHT 2015,2019 # [+] International Business Machines Corp. # # diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 1632b1cfc..c6b185426 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -6077,6 +6077,14 @@ sub generate_is_dimm my $uidstr = sprintf( "0x%02X03%04X", $node, $dimm_rel_node ); + # Generate the slot position for mvdimm restrictions + # The formula is: + # [processor position with no gaps, i.e. 0,1,2,3]*16 + + # [mca position on this processor * 2] + [dimm location behind this mca] + my $nvdimmslot = ($proc * MAX_MCA_PER_PROC * ARCH_LIMIT_DIMM_PER_MCA) + + ($mca * 2) + ($dimm_rel_mca); + + # add dimm to mcbist array push(@{$mcbist_dimms{$node . $proc."_".$mcb_rel_proc}}, "n${node}:p${pos}"); @@ -6117,6 +6125,10 @@ sub generate_is_dimm <default>$dimm_drop</default> </attribute> <attribute> + <id>MSS_MRW_NVDIMM_SLOT_POSITION</id> + <default>$nvdimmslot</default> + </attribute> + <attribute> <id>POS_ON_MEM_PORT</id> <default>$dimm_rel_mca</default> </attribute>"; diff --git a/src/usr/targeting/common/hbrt_target.C b/src/usr/targeting/common/hbrt_target.C new file mode 100644 index 000000000..b91979922 --- /dev/null +++ b/src/usr/targeting/common/hbrt_target.C @@ -0,0 +1,101 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/targeting/common/hbrt_target.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <targeting/common/hbrt_target.H> +#include <targeting/common/targetservice.H> +#include <targeting/common/targreasoncodes.H> +#include <runtime/customize_attrs_for_payload.H> +#include <targeting/common/trace.H> +#ifdef __HOSTBOOT_MODULE +#include <errl/errludtarget.H> +#endif + +extern trace_desc_t* g_trac_hbrt; +using namespace TARGETING; + +namespace TARGETING +{ + +errlHndl_t getRtTarget( + const TARGETING::Target* i_pTarget, + rtChipId_t& o_rtTargetId) +{ + errlHndl_t pError = NULL; + + do + { + if(i_pTarget == TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL) + { + TARGETING::Target* masterProcChip = NULL; + TARGETING::targetService(). + masterProcChipTargetHandle(masterProcChip); + i_pTarget = masterProcChip; + } + + auto hbrtHypId = RUNTIME::HBRT_HYP_ID_UNKNOWN; + if( (!i_pTarget->tryGetAttr<TARGETING::ATTR_HBRT_HYP_ID>(hbrtHypId)) + || (hbrtHypId == RUNTIME::HBRT_HYP_ID_UNKNOWN)) + { + auto huid = get_huid(i_pTarget); + auto targetingTargetType = + i_pTarget->getAttr<TARGETING::ATTR_TYPE>(); + TRACFCOMP(g_trac_targeting, ERR_MRK + "Targeting target type of 0x%08X not supported. " + "HUID: 0x%08X", + targetingTargetType, + huid); + /*@ + * @errortype + * @moduleid TARG_RT_GET_RT_TARGET + * @reasoncode TARG_RT_TARGET_TYPE_NOT_SUPPORTED + * @userdata1 Target's HUID + * @userdata2 target's targeting type + * @devdesc Targeting target's type not supported by runtime + * code + */ + pError = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_INFORMATIONAL, + TARGETING::TARG_RT_GET_RT_TARGET, + TARGETING::TARG_RT_TARGET_TYPE_NOT_SUPPORTED, + huid, + targetingTargetType +#ifdef __HOSTBOOT_MODULE + ,true); + + ERRORLOG::ErrlUserDetailsTarget(i_pTarget,"Targeting Target"). + addToLog(pError); +#else + ); // if not in hostboot code then skip last param of error log + // and do not create a user details section +#endif + } + + o_rtTargetId = hbrtHypId; + + } while(0); + + return pError; +} + +}
\ No newline at end of file diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl index 341574246..2b88520ba 100755 --- a/src/usr/targeting/common/processMrw.pl +++ b/src/usr/targeting/common/processMrw.pl @@ -44,9 +44,27 @@ my $debug = 0; my $report = 0; my $sdr_file = ""; my $build = "hb"; -my $system_config = ""; +my $system_config = ""; my $output_filename = ""; +# Map the OMI instance to its corresponding OMIC parent +my %omi_map = (4 => "omic-0", + 5 => "omic-0", + 6 => "omic-0", + 7 => "omic-1", + 2 => "omic-1", + 3 => "omic-1", + 0 => "omic-2", + 1 => "omic-2", + 12 => "omic-0", + 13 => "omic-0", + 14 => "omic-0", + 15 => "omic-1", + 10 => "omic-1", + 11 => "omic-1", + 8 => "omic-2", + 9 => "omic-2"); + # TODO RTC:170860 - Remove this after dimm connector defines VDDR_ID my $num_voltage_rails_per_proc = 1; @@ -378,7 +396,10 @@ foreach my $target (@targets) { processUcd($targetObj, $target); } - + } + elsif ($type eq "OCMB_CHIP") + { + processOcmbChip($targetObj, $target); } processIpmiSensors($targetObj,$target); @@ -1135,7 +1156,6 @@ sub processProcessor ## update path for mvpd's and sbe's my $path = $targetObj->getAttribute($target, "PHYS_PATH"); my $model = $targetObj->getAttribute($target, "MODEL"); - $targetObj->setAttributeField($target, "EEPROM_VPD_PRIMARY_INFO","i2cMasterPath",$path); $targetObj->setAttributeField($target, @@ -1434,9 +1454,9 @@ sub setupBars foreach my $bar (keys %bars) { my $i_base = Math::BigInt->new($bars{$bar}); - my $value=sprintf("0x%016s",substr(( - $i_base+$groupOffset*$group+ - $procOffset*$proc)->as_hex(),2)); + my $value=sprintf("0x%016s",substr(( + $i_base+$groupOffset*$group+ + $procOffset*$proc)->as_hex(),2)); $targetObj->setAttribute($target,$bar,$value); } } @@ -1642,6 +1662,9 @@ sub processMcbist ## sub processMc { + # NOTE: OMI_INBAND_BAR_BASE_ADDR_OFFSET will be set for the MC + # targets via a specific child OMI Target. View the + # processOmi function for further details. my $targetObj = shift; my $target = shift; @@ -1656,6 +1679,10 @@ sub processMc { processMi($targetObj, $child); } + elsif ($child_type eq "OMIC") + { + processOmic($targetObj, $child); + } } { @@ -1669,8 +1696,146 @@ sub processMc } } +#-------------------------------------------------- +## MCC +## +## +sub processMcc +{ + my $targetObj = shift; + my $target = shift; + + foreach my $child (@{ $targetObj->getTargetChildren($target) }) + { + my $child_type = $targetObj->getType($child); + + $targetObj->log($target, + "Processing MCC child: $child Type: $child_type"); + + if ($child_type eq "OMI") + { + processOmi($targetObj, $child); + } + } + + { + use integer; + # There are a total of four MCC units on an MC unit. So, to + # determine which MC an MCC belongs to, the CHIP_UNIT of the MCC can + # be divided by the number of units per MC to arrive at the correct + # offset to add to the pervasive MCC parent offset. + my $numberOfMccPerMc = 4; + my $chip_unit = $targetObj->getAttribute($target, "CHIP_UNIT"); + + my $value = sprintf("0x%x", + Targets::PERVASIVE_PARENT_MI_OFFSET + + ($chip_unit / $numberOfMccPerMc)); + + $targetObj->setAttribute( $target, "CHIPLET_ID", $value); + } +} #-------------------------------------------------- +## OMI +## +## +sub processOmi +{ + my $mrwObj = shift; + my $omitarg = shift; + + use integer; + # There are a total of eight OMI units on an MC unit. So, to + # determine which MC an OMI belongs to, the CHIP_UNIT of the OMI can + # be divided by the number of units per MC to arrive at the correct + # offset to add to the pervasive OMI parent offset. + my $numberOfOmiPerMc = 8; + my $chip_unit = $mrwObj->getAttribute($omitarg, "CHIP_UNIT"); + my $fapi_pos = $mrwObj->getAttribute($omitarg, "FAPI_POS"); + my $value = sprintf("0x%x", + Targets::PERVASIVE_PARENT_MI_OFFSET + + ($chip_unit / $numberOfOmiPerMc)); + + $mrwObj->setAttribute($omitarg, "CHIPLET_ID", $value); + + # Start with our affinity path "sys-a/node-b/proc-c/mc-d/mi-e/mcc-f/omi-g" + # then snip off everything before the mi + my $phys_path = $mrwObj->getAttribute($omitarg, "PHYS_PATH"); + my $up_to_mi = index($phys_path,"mi-"); + my $omic_parent = substr($phys_path,0,$up_to_mi); + $omic_parent = $omic_parent.$omi_map{$chip_unit}; + $mrwObj->setAttribute($omitarg, "OMIC_PARENT", $omic_parent); + + my $omi = Math::BigInt->new($mrwObj->getAttribute($omitarg,"FAPI_POS")); + # Base omi bar offset + # We use this base address in simics_AXONE.system.xml and want our + # addresses to match the ones in that xml + my $base = 0x30400000000; + my $gigabyte = 0x40000000; + my $value = 0; + + # This algorithm is explained in src/usr/mmio/mmio.C + if ($omi % 2 eq 0) + { + $value = $base + $omi * 4 * $gigabyte; + } + else + { + $value = $base + (($omi - 1) * 4 + 2) * $gigabyte; + } + + $value = sprintf("0x%016s", substr(($value)->as_hex(),2)); + $mrwObj->setAttribute($omitarg, "OMI_INBAND_BAR_BASE_ADDR_OFFSET", + $value); + + # Set the parent MC BAR value to value of first OMI unit + if ($omi % 8 eq 0) + { + my $parent_mcc = $mrwObj->getTargetParent($omitarg); + my $parent_mi = $mrwObj->getTargetParent($parent_mcc); + my $parent_mc = $mrwObj->getTargetParent($parent_mi); + $mrwObj->setAttribute($parent_mc, "OMI_INBAND_BAR_BASE_ADDR_OFFSET", + $value); + } +} + +#-------------------------------------------------- +## OMIC +## +## +sub processOmic +{ + my $targetObj = shift; + my $target = shift; + + use integer; + # There are a total of three OMIC units on an MC unit. So, to + # determine which MC an OMIC belongs to, the CHIP_UNIT of the OMIC can + # be divided by the number of units per MC to arrive at the correct + # offset to add to the pervasive OMIC parent offset. + my $numberOfOmicPerMc = 3; + my $chip_unit = $targetObj->getAttribute($target, "CHIP_UNIT"); + + my $value = sprintf("0x%x", + Targets::PERVASIVE_PARENT_MI_OFFSET + + ($chip_unit / $numberOfOmicPerMc)); + + $targetObj->setAttribute( $target, "CHIPLET_ID", $value); +} + +#-------------------------------------------------- +## OCMB_CHIP +## +## +sub processOcmbChip +{ + my $targetObj = shift; + my $target = shift; + + $targetObj->setEepromAttributesForAxone($targetObj, $target); +} + +#-------------------------------------------------g ## MI ## ## @@ -1690,6 +1855,10 @@ sub processMi { processDmi($targetObj, $child); } + elsif ($child_type eq "MCC") + { + processMcc($targetObj, $child); + } } { @@ -1745,7 +1914,7 @@ sub processDmi Targets::PERVASIVE_PARENT_DMI_OFFSET + ($chip_unit / $numberOfDmiPerMc)); - $targetObj->setAttribute( $target, "CHIPLET_ID", $value); + $targetObj->setAttribute($target, "CHIPLET_ID", $value); } } @@ -1837,12 +2006,27 @@ sub processObus if ($match eq 0) { $targetObj->setAttribute($obrick, "OBUS_SLOT_INDEX", -1); - } } } } + + my $chip_unit = $targetObj->getAttribute($target, "CHIP_UNIT"); + my $value = sprintf("0x%x", Targets::PERVASIVE_PARENT_OBUS_OFFSET + $chip_unit); + $targetObj->setAttribute($target, "CHIPLET_ID", $value); + + # Set CHIPLET_ID for OBUS_BRICKs + foreach my $child (@{ $targetObj->getTargetChildren($target) }) + { + my $type = $targetObj->getType($child); + if ($type eq "OBUS_BRICK") + { + # OBUS_BRICK takes on CHIPLET_ID of OBUS parent + $targetObj->setAttribute($child, "CHIPLET_ID", $value); + } + } } + #-------------------------------------------------- ## XBUS ## @@ -2769,6 +2953,23 @@ sub processI2C { $type = "0xFF"; } + # TPM types can vary by MODEL number + elsif ($type_str eq "NUVOTON_TPM") + { + # Model values can be found in tpmddif.H and are kept in + # sync with TPM_MODEL attribute in attribute_types_hb.xml + my $tpm_model = $targetObj->getAttribute($i2c->{DEST_PARENT},"TPM_MODEL"); + if ($tpm_model eq 1) + { + $type = $targetObj->getEnumValue("HDAT_I2C_DEVICE_TYPE",$type_str); + } + if ($tpm_model eq 2) + { + # @TODO RTC 212201 use proper enum when <system>.xml supports it + #$type = $targetObj->getEnumValue("HDAT_I2C_DEVICE_TYPE","TCG_I2C_TPM"); + $type = 0x15; + } + } else { $type = $targetObj->getEnumValue("HDAT_I2C_DEVICE_TYPE",$type_str); @@ -2901,7 +3102,17 @@ sub processI2C # <vendor>,<device type>,<purpose>,<scope> if ($type_str eq "NUVOTON_TPM") { - $label = "nuvoton,npct601,tpm,host"; + # Model values can be found in tpmddif.H and are kept in + # sync with TPM_MODEL attribute in attribute_types_hb.xml + my $tpm_model = $targetObj->getAttribute($i2c->{DEST_PARENT},"TPM_MODEL"); + if ($tpm_model eq 1) + { + $label = "nuvoton,npct601,tpm,host"; + } + if ($tpm_model eq 2) + { + $label = "tcg,tpm_i2c_ptp,tpm,host"; + } } if ($label eq "") @@ -2938,7 +3149,6 @@ sub processI2C \@i2cSpeed, \@i2cType, \@i2cPurpose, \@i2cLabel); } - sub setEepromAttributes { my $targetObj = shift; @@ -2953,9 +3163,7 @@ sub setEepromAttributes # $conn_target->{BUS_NUM}, "I2C_ADDRESS"); my $addr = $targetObj->getAttribute($conn_target->{DEST},"I2C_ADDRESS"); - - my $path = $targetObj->getAttribute($conn_target->{SOURCE_PARENT}, - "PHYS_PATH"); + my $path = $targetObj->getAttribute($conn_target->{SOURCE_PARENT}, "PHYS_PATH"); my $mem = $targetObj->getAttribute($conn_target->{DEST_PARENT}, "MEMORY_SIZE_IN_KB"); my $count = 1; # default for VPD SEEPROMs diff --git a/src/usr/targeting/common/target.C b/src/usr/targeting/common/target.C index 15fedd006..244d04993 100644 --- a/src/usr/targeting/common/target.C +++ b/src/usr/targeting/common/target.C @@ -617,7 +617,9 @@ void Target::getAttrTankTargetPosData(uint16_t & o_pos, } else if ((l_element.type == TYPE_PROC) || (l_element.type == TYPE_MEMBUF) || - (l_element.type == TYPE_DIMM)) + (l_element.type == TYPE_DIMM) || + (l_element.type == TYPE_OCMB_CHIP) || + (l_element.type == TYPE_PMIC)) { o_pos = l_element.instance; } @@ -635,7 +637,11 @@ void Target::getAttrTankTargetPosData(uint16_t & o_pos, (l_element.type == TYPE_PPE) || (l_element.type == TYPE_PERV) || (l_element.type == TYPE_PEC) || - (l_element.type == TYPE_PHB)) + (l_element.type == TYPE_PHB) || + (l_element.type == TYPE_OMI) || + (l_element.type == TYPE_MCC) || + (l_element.type == TYPE_OMIC) || + (l_element.type == TYPE_MEM_PORT)) { o_unitPos = l_element.instance; } @@ -745,6 +751,12 @@ void Target::targAssert(TargAssertReason i_reason, "TARGETING::Target::setAttr<0x%7x>: trySetAttr returned false", i_ffdc); break; + case SET_ATTR_FROM_STD_ARR: + TARG_ASSERT(false, + "TARGETING::Target::setAttrFromStdArr<0x%7x>: setAttrFromStdArr " + "returned false", + i_ffdc); + break; case GET_ATTR: TARG_ASSERT(false, "TARGETING::Target::getAttr<0x%7x>: tryGetAttr returned false", @@ -755,6 +767,12 @@ void Target::targAssert(TargAssertReason i_reason, "TARGETING::Target::getAttrAsString<0x%7x>: tryGetAttr returned false", i_ffdc); break; + case GET_ATTR_AS_STD_ARRAY: + TARG_ASSERT(false, + "TARGETING::Target::getAttrAsStdArray<0x%7x>: getAttrAsStdArray returned" + " false", + i_ffdc); + break; case GET_HB_MUTEX_ATTR: TARG_ASSERT(false, "TARGETING::Target::_getHbMutexAttr<0x%7x>: _getAttrPtr returned NULL", diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index b1ae2e230..e15880f87 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2012,2019 --> +<!-- Contributors Listed Below - COPYRIGHT 2012,2020 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -187,6 +187,62 @@ </simpleType> </attribute> + <enumerationType> + <default>DEFAULT_ALL</default> + <description>Enumeration for the various BPM update behaviors</description> + <enumerator> + <name>DEFAULT_ALL</name> + <value>0x0000</value> + </enumerator> + <enumerator> + <name>SKIP_ALL</name> + <value>0x1010</value> + </enumerator> + <enumerator> + <name>FORCE_ALL</name> + <value>0x1111</value> + </enumerator> + <enumerator> + <name>SKIP_FW</name> + <value>0x1000</value> + </enumerator> + <enumerator> + <name>FORCE_FW</name> + <value>0x1100</value> + </enumerator> + <enumerator> + <name>SKIP_CONFIG</name> + <value>0x0010</value> + </enumerator> + <enumerator> + <name>FORCE_CONFIG</name> + <value>0x0011</value> + </enumerator> + <enumerator> + <name>FORCE_CONFIG_SKIP_FW</name> + <value>0x1011</value> + </enumerator> + <enumerator> + <name>SKIP_CONFIG_FORCE_FW</name> + <value>0x1110</value> + </enumerator> + <id>BPM_UPDATE_BEHAVIOR</id> + </enumerationType> + + <attribute> + <id>BPM_UPDATE_OVERRIDE</id> + <description> + If non-zero then use value to determine which portion of BPM updates to + skip/force/default behavior. + </description> + <simpleType> + <uint16_t/> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <no_export/> + </attribute> + <attribute> <id>BRAZOS_RX_FIFO_OVERRIDE</id> <description> @@ -884,6 +940,54 @@ </attribute> <attribute> + <description>Specifies a target's eeprom content type.</description> + <hasStringConversion/> + <id>EEPROM_CONTENT_TYPE</id> + <persistency>non-volatile</persistency> + <readable/> + <simpleType> + <enumeration> + <id>EEPROM_CONTENT_TYPE</id> + </enumeration> + </simpleType> + </attribute> + + <enumerationType> + <default>RAW</default> + <description>Enumeration indicating a target's eeprom + content type. + RAW - eeprom has no specified layout + ISDIMM - uses standard JEDEC layout for DDR memory + IBM_FRUVPD - uses ipz converged vpd layout with records/keywords for + generic FRUs + IBM_MVPD - use ipz converged vpd layout with records/keywords for + processor modules + DDIMM - uses Differential DIMM layout + </description> + <enumerator> + <name>RAW</name> + <value>0</value> + </enumerator> + <enumerator> + <name>ISDIMM</name> + <value>1</value> + </enumerator> + <enumerator> + <name>IBM_FRUVPD</name> + <value>2</value> + </enumerator> + <enumerator> + <name>IBM_MVPD</name> + <value>3</value> + </enumerator> + <enumerator> + <name>DDIMM</name> + <value>4</value> + </enumerator> + <id>EEPROM_CONTENT_TYPE</id> + </enumerationType> + + <attribute> <id>EEPROM_NV_INFO</id> <description>Information needed to address the NV controller on the NVDIMM</description> <complexType> @@ -1179,8 +1283,9 @@ <attribute> <complexType> - <description>Structure to define the addressing for an I2C - slave device.</description> + <description>Structure to define the addressing for an attached I2C + eeprom device that contains secondary VPD info. + </description> <field> <default>physical:sys-0</default> <description>Entity path to the chip that contains the I2C @@ -1189,49 +1294,49 @@ <type>EntityPath</type> </field> <field> - <default>0x80</default> + <default>0xFF</default> <description>Port from the I2C Master device. This is a 6-bit value.</description> <name>port</name> <type>uint8_t</type> </field> <field> - <default>0x80</default> + <default>0xFF</default> <description>Device address on the I2C bus. This is a 7-bit value, but then shifted 1 bit left.</description> <name>devAddr</name> <type>uint8_t</type> </field> <field> - <default>0x80</default> + <default>0xFF</default> <description>I2C master engine. This is a 2-bit value.</description> <name>engine</name> <type>uint8_t</type> </field> <field> - <default>0x02</default> + <default>0xFF</default> <description>The number of bytes a device requires to set its internal address/offset.</description> <name>byteAddrOffset</name> <type>uint8_t</type> </field> <field> - <default>0x0</default> + <default>0xFFFFFFFFFFFFFFFF</default> <description>The number of kilobytes a device can hold. 'Zero' value possible for some devices.</description> <name>maxMemorySizeKB</name> <type>uint64_t</type> </field> <field> - <default>0x01</default> + <default>0xFF</default> <description>The number of chips making up an eeprom device. </description> <name>chipCount</name> <type>uint8_t</type> </field> <field> - <default>0x0</default> + <default>0xFFFFFFFFFFFFFFFF</default> <description>The maximum number of bytes that can be written to a device at one time. 'Zero' value means no maximum value is expected or checked.</description> @@ -1239,7 +1344,7 @@ <type>uint64_t</type> </field> <field> - <default>0xA</default> + <default>0xFFFFFFFFFFFFFFFF</default> <description>The amount of time in milliseconds a device requires on the completion of a write command to update its internal memory.</description> @@ -1264,6 +1369,12 @@ <name>i2cMuxPath</name> <type>EntityPath</type> </field> + <field> + <default>0xFFFFFFFF</default> + <description>Indicates the target's eeprom content type</description> + <name>eepromContentType</name> + <type>uint32_t</type> + </field> </complexType> <description>Information needed to address the EERPROM slaves</description> <id>EEPROM_VPD_BACKUP_INFO</id> @@ -1273,8 +1384,9 @@ <attribute> <complexType> - <description>Structure to define the addressing for an I2C - slave device.</description> + <description>Structure to define the addressing for an attached I2C + eeprom device that contains primary VPD info. + </description> <field> <default>physical:sys-0</default> <description>Entity path to the chip that contains the I2C @@ -1283,28 +1395,28 @@ <type>EntityPath</type> </field> <field> - <default>0x80</default> + <default>0xFF</default> <description>Port from the I2C Master device. This is a 6-bit value.</description> <name>port</name> <type>uint8_t</type> </field> <field> - <default>0x80</default> + <default>0xFF</default> <description>Device address on the I2C bus. This is a 7-bit value, but then shifted 1 bit left.</description> <name>devAddr</name> <type>uint8_t</type> </field> <field> - <default>0x80</default> + <default>0xFF</default> <description>I2C master engine. This is a 2-bit value.</description> <name>engine</name> <type>uint8_t</type> </field> <field> - <default>0x02</default> + <default>0xFF</default> <description> The number of bytes a device requires to set its internal address/offset. DDR4 DIMMs require a special EEPROM @@ -1318,21 +1430,21 @@ <type>uint8_t</type> </field> <field> - <default>0x0</default> + <default>0xFFFFFFFFFFFFFFFF</default> <description>The number of kilobytes a device can hold. 'Zero' value possible for some devices.</description> <name>maxMemorySizeKB</name> <type>uint64_t</type> </field> <field> - <default>0x01</default> + <default>0xFF</default> <description>The number of chips making up an eeprom device. </description> <name>chipCount</name> <type>uint8_t</type> </field> <field> - <default>0x0</default> + <default>0xFFFFFFFFFFFFFFFF</default> <description>The maximum number of bytes that can be written to a device at one time. 'Zero' value means no maximum value is expected or checked.</description> @@ -1340,7 +1452,7 @@ <type>uint64_t</type> </field> <field> - <default>0xA</default> + <default>0xFFFFFFFFFFFFFFFF</default> <description>The amount of time in milliseconds a device requires on the completion of a write command to update its internal memory.</description> @@ -1365,6 +1477,12 @@ <name>i2cMuxPath</name> <type>EntityPath</type> </field> + <field> + <default>0xFFFFFFFF</default> + <description>Indicates the target's eeprom content type</description> + <name>eepromContentType</name> + <type>uint32_t</type> + </field> </complexType> <description>Information needed to address the EEPROM slaves</description> <id>EEPROM_VPD_PRIMARY_INFO</id> @@ -1672,6 +1790,36 @@ </attribute> <attribute> + <description> + Lab-only trigger to force a factory reset of the NVDIMMs. + NOTE: This will erase any saved image and encryption keys. + </description> + <id>FORCE_NVDIMM_RESET</id> + <persistency>volatile-zeroed</persistency> + <readable/> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + </attribute> + + <attribute> + <id>FORCE_SRAM_MMIO_OVER_I2C</id> + <description> + Force inband SRAM access to be over I2C instead of MMIO + This is a way to get data when the MMIO path is not working + (0x00 = use normal path, 0x01 = force i2c path) + </description> + <simpleType> + <uint8_t/> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> <id>FREQ_CORE_CEILING_MHZ</id> <description> The maximum core frequency in MHz. @@ -2208,6 +2356,46 @@ <value>0xB</value> </enumerator> <enumerator> + <name>THERMAL_SENSOR</name> + <value>0x0C</value> + </enumerator> + <enumerator> + <name>SEEPROM_Atmel24c04</name> + <value>0x0D</value> + </enumerator> + <enumerator> + <name>SEEPROM_Atmel24c412</name> + <value>0x0E</value> + </enumerator> + <enumerator> + <name>SEEPROM_Atmel24c32</name> + <value>0x0F</value> + </enumerator> + <enumerator> + <name>SEEPROM_Atmel24c64</name> + <value>0x10</value> + </enumerator> + <enumerator> + <name>SEEPROM_Atmel24c16</name> + <value>0x11</value> + </enumerator> + <enumerator> + <name>NVDIA_GPU</name> + <value>0x12</value> + </enumerator> + <enumerator> + <name>NXP_LPC_Microcontroller_LPC11U35</name> + <value>0x13</value> + </enumerator> + <enumerator> + <name>9550</name> + <value>0x14</value> + </enumerator> + <enumerator> + <name>TCG_I2C_TPM</name> + <value>0x15</value> + </enumerator> + <enumerator> <name>UNKNOWN</name> <value>0xFF</value> </enumerator> @@ -2782,6 +2970,81 @@ <writeable/> </attribute> + <attribute> + <id>KEY_CLEAR_REQUEST</id> + <description> + Indicates types of Key Clear Requests are being made + </description> + <persistency>volatile-zeroed</persistency> + <readable/> + <simpleType> + <enumeration> + <id>KEY_CLEAR_REQUEST</id> + <default>NONE</default> + </enumeration> + </simpleType> + <writeable/> + </attribute> + + <enumerationType> + <id>KEY_CLEAR_REQUEST</id> + <description> + Enum indicating the different possible Key Clear Request values + </description> + <enumerator> + <description> + (Default) Key clear not requested + </description> + <name>NONE</name> + <value>0x0000</value> + </enumerator> + <enumerator> + <description> + Clear/reset all sensitive data controlled by platform firmware + from the system + </description> + <name>ALL</name> + <value>0x8000</value> + </enumerator> + <enumerator> + <description> + This indicates OPAL to clear the OS platform key + </description> + <name>OS_PK</name> + <value>0x4000</value> + </enumerator> + <enumerator> + <description> + This indicates to OPAL/PEF to clear the System Security Officer + certificate + </description> + <name>PEF_SSO</name> + <value>0x2000</value> + </enumerator> + <enumerator> + <description> + This indicates to PowerVM to clear the system key to the default state + </description> + <name>POWERVM_SYSKEY</name> + <value>0x1000</value> + </enumerator> + <enumerator> + <description> + Clear all sensitive data for MFG processing + Only valid on development drivers + </description> + <name>MFG</name> + <value>0x0100</value> + </enumerator> + <enumerator> + <description> + Reserved bits + </description> + <name>RESERVED</name> + <value>0x00FF</value> + </enumerator> + </enumerationType> + <enumerationType> <id>KEY_TRANSITION_STATE</id> <description> @@ -3842,7 +4105,7 @@ <value>48</value> </enumerator> <enumerator> - <name>EXPLORER</name> + <name>OCMB</name> </enumerator> <enumerator> <name>JEDEC</name> @@ -5033,12 +5296,33 @@ <field> <bits>1</bits> <default>0</default> - <description>NVDIMM controller error detected</description> - <name>error_detected</name> + <description>Is OCC active</description> + <name>occ_active</name> <type>uint8_t</type> </field> <field> - <bits>6</bits> + <bits>1</bits> + <default>0</default> + <description>NVDIMM controller fatal error detected</description> + <name>fatal_error_detected</name> + <type>uint8_t</type> + </field> + <field> + <bits>1</bits> + <default>0</default> + <description>NVDIMM controller risky error detected</description> + <name>risky_error_detected</name> + <type>uint8_t</type> + </field> + <field> + <bits>1</bits> + <default>0</default> + <description>NVDIMM encryption error detected</description> + <name>encryption_error_detected</name> + <type>uint8_t</type> + </field> + <field> + <bits>3</bits> <default>0</default> <description>Reserved for future use</description> <name>reserved</name> @@ -5049,6 +5333,88 @@ </attribute> <attribute> + <id>NVDIMM_AUTO_ARM</id> + <description> + 0 - Do not automatically arm all NVDIMMS in the system at runtime + 1 - Automatically arm all NVDIMMS in the system at runtime + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> + <id>NVDIMM_ENCRYPTION_ENABLE</id> + <description> + 0 - Encryption is not enabled on all NVDIMMS in the system + 1 - Encryption is enabled on all NVDIMMS in the system + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> + <id>NVDIMM_ENCRYPTION_KEYS_ANCHOR</id> + <description> + NVDIMM Encryption keys + Bytes 0..31 Random String (RS) + Bytes 32..63 Erase Key (EK) + Bytes 64..95 Access Key (AK) + Set by HWSV, stored in anchor card + Should match NVDIMM_ENCRYPTION_KEYS_FW + </description> + <simpleType> + <array>96</array> + <uint8_t> + <default> + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + </default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> + <id>NVDIMM_ENCRYPTION_KEYS_FW</id> + <description> + NVDIMM Encryption keys + Bytes 0..31 Random String (RS) + Bytes 32..63 Erase Key (EK) + Bytes 64..95 Access Key (AK) + Set by Hostboot, stored in FSP flash + Should match NVDIMM_ENCRYPTION_KEYS_ANCHOR + </description> + <simpleType> + <array>96</array> + <uint8_t> + <default> + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + </default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> <id>NV_OPS_TIMEOUT_MSEC</id> <description> NVDIMM timeout value for 6 main operations @@ -5083,10 +5449,16 @@ NVDIMM status flag. This is used to record the status and later report to OPAL/PHYP. Possible values: - 0x08 - contents not preserved (genesis) - 0x04 - contents preserved - 0x02 - failed to preserve contents - 0x01 - unable to preserve future contents + 0x01: Unable to preserve future contents + 0x02: Failed to preserve contents + 0x04: Contents preserved + 0x08: Contents not preserved + 0x10: Contents are encrypted + 0x20: Secure erase verify complete + 0x40: Error detected, but save/restore might work + 0x80: Reserved + 0xFF: Memory is invalid + NOTE: set for virtual SCM devices, does not persist across reboot </description> <simpleType> <uint8_t> @@ -5149,6 +5521,48 @@ <no_export/> </attribute> + <enumerationType> + <default>DEFAULT_ALL</default> + <description>Enumeration for the various OCMB Firmware update behaviors</description> + <enumerator> + <!-- Compare actual and desired versions, update if they do not match --> + <name>CHECK_VERSIONS</name> + <value>0</value> + </enumerator> + <enumerator> + <!-- Force an update regardless of the current version in the hardware --> + <name>FORCE_UPDATE</name> + <value>1</value> + </enumerator> + <enumerator> + <!-- Do not update the firwmare, do not even check the versions --> + <name>PREVENT_UPDATE</name> + <value>2</value> + </enumerator> + <enumerator> + <!-- Compare actual and desired versions, but do not do any updates --> + <name>CHECK_BUT_NO_UPDATE</name> + <value>3</value> + </enumerator> + <id>OCMB_FW_UPDATE_BEHAVIOR</id> + </enumerationType> + + <attribute> + <description> + Force specific behavior for the OCMB Firmware update function. + </description> + <id>OCMB_FW_UPDATE_OVERRIDE</id> + <!-- @fixme-RTC:244420-Should be volatile-zero --> + <persistency>volatile</persistency> + <readable/> + <simpleType> + <uint8_t> + <!-- Cannot use enumeration directly due to override issue --> + <default>2</default> + </uint8_t> + </simpleType> + </attribute> + <attribute> <description> Physical entity path an OMI's associated OMIC parent target @@ -8131,7 +8545,7 @@ </description> <simpleType> <uint16_t> - <default>1</default> + <default>0</default> </uint16_t> </simpleType> <persistency>volatile</persistency> diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml index d5dbb659c..7d9af5904 100755 --- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2012,2019 --> +<!-- Contributors Listed Below - COPYRIGHT 2012,2020 --> <!-- [+] Google Inc. --> <!-- [+] International Business Machines Corp. --> <!-- --> @@ -175,6 +175,21 @@ </attribute> <attribute> + <id>DYNAMIC_I2C_DEVICE_ADDRESS</id> + <description> + This attribute is used when a given target could have different + i2c device addresses depending on which manufacture's device we + are using. + </description> + <simpleType> + <uint8_t/> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> <id>EARLY_TESTCASES_ISTEP</id> <description> Indicates which istep we should execute the CXX testcases after, if @@ -230,6 +245,62 @@ <readable/> </attribute> + <enumerationType> + <description> + Enumeration specifying a target's CEC degraded mode domain + </description> + <default>NO</default> + <enumerator> + <name>NO</name> + <value>0</value> + </enumerator> + <enumerator> + <name>BAR_MISMATCH</name> + <value>1</value> + </enumerator> + <id>FORCE_SBE_UPDATE</id> + </enumerationType> + + <attribute> + <id>FORCE_SBE_UPDATE</id> + <description> + Set to non-zero to force a SBE update at various places in the IPL. + </description> + <simpleType> + <enumeration> + <id>FORCE_SBE_UPDATE</id> + <default>NO</default> + </enumeration> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hbOnly/> + </attribute> + + <attribute> + <!-- Need to add this explicitly to handle the Axone case --> + <id>FREQ_MCA_MHZ</id> + <description> + The frequency of the memory controller channel. In synchronous mode, + this is equivalent to ATTR_FREQ_PB_MHZ. This may be independently set + per pair of memory channels if operating in asynchronous mode, + but this configuration is not anticipated. This clock drives the MCU queues, + and all the associated logic that drives the inputs to the DMI and reads + its outputs + </description> + <simpleType> + <uint32_t/> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_FREQ_MCA_MHZ</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> + </attribute> + <attribute> <id>FSI_MASTER_MUTEX</id> <description>Mutex for FSI Master Operations</description> @@ -254,6 +325,78 @@ <hbOnly/> </attribute> + <attribute> + <id>GPIO_INFO_PHYS_PRES</id> + <description>Information needed to address GPIO device that corresponds + to the Physical Presence Detect circuit</description> + <complexType> + <description>Structure to define the addessing for an I2C + slave device.</description> + <field> + <name>i2cMasterPath</name> + <description>Entity path to the chip that contains the I2C + master</description> + <type>EntityPath</type> + <default>physical:sys-0/node-0/proc-0</default> + </field> + <field> + <name>port</name> + <description>Port from the I2C Master device. This is a 6-bit + value.</description> + <type>uint8_t</type> + <default>0</default> + </field> + <field> + <name>devAddr</name> + <description>Device address on the I2C bus. This is a 7-bit value, + but then shifted 1 bit left.</description> + <type>uint8_t</type> + <default>0xC0</default> + </field> + <field> + <name>engine</name> + <description>I2C master engine. This is a 2-bit + value.</description> + <type>uint8_t</type> + <default>2</default> + </field> + <field> + <name>windowOpenPin</name> + <description>Logical GPIO pin number used to open or close the physcial + presence window</description> + <type>uint8_t</type> + <default>0</default> + </field> + <field> + <name>physicalPresencePin</name> + <description>Logical GPIO pin number used to determine if physical + presence was asserted</description> + <type>uint8_t</type> + <default>1</default> + </field> + <!-- i2c Mux Bus Selector Definition --> + <field> + <default>0xFF</default> + <description>Determines which of the N selectable buses the mux + will connect to. OxFF indicates no mux present + or N/A.</description> + <name>i2cMuxBusSelector</name> + <type>uint8_t</type> + </field> + <!-- i2c Mux Path Definition --> + <field> + <!-- NOTE: physical:sys-0 implies that there is no mux in + the bus path for this part. --> + <default>physical:sys-0</default> + <description>Entity path to the I2C mux for this device.</description> + <name>i2cMuxPath</name> + <type>EntityPath</type> + </field> + </complexType> + <persistency>non-volatile</persistency> + <readable/> + </attribute> + <!-- TODO RTC 122856 When support for HB only volatile attributes with non-zero default is implemented, update default value to match the description, Until that happens, code must set the appropriate default if needed. --> @@ -323,6 +466,18 @@ </enumerator> </enumerationType> + <attribute> + <id>HB_MUTEX_SERIALIZE_TEST_LOCK</id> + <description>Hostboot mutex for serializing certain tests</description> + <simpleType> + <hbmutex/> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hbOnly/> + </attribute> + <!-- For POD Testing --> <attribute> <id>HB_MUTEX_TEST_LOCK</id> @@ -932,6 +1087,40 @@ </attribute> <attribute> + <id>NVDIMM_READING_PAGE4</id> + <description> + 0 - Not reading page4 registers + 1 - Reading of page4 registers in progress + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hbOnly/> + </attribute> + + <attribute> + <id>NVDIMM_READING_VENDOR_LOG</id> + <description> + 0 - Not reading vendor log + 1 - Reading of vendor log in progress + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hbOnly/> + </attribute> + + <attribute> <id>OCC_COMMON_AREA_PHYS_ADDR</id> <description> Physical address where OCC Common Area is placed in mainstore. @@ -946,6 +1135,20 @@ </attribute> <attribute> + <id>OCMB_COUNTER_HB</id> + <description> + Tracks the sequence id for OCMB command transactions. + The platform is expected to guarantee a unique value on each read. + </description> + <simpleType> + <uint32_t/> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> <description> While in Secureboot, this value is set to 1 the first time attribute override is attempted and error logged. @@ -972,7 +1175,7 @@ <description>The part number for a particular FRU target</description> <simpleType> <uint8_t/> - <array>20</array> + <array>48</array> </simpleType> <persistency>volatile-zeroed</persistency> <readable/> @@ -1047,6 +1250,72 @@ </attribute> <attribute> + <description>Designates if the Physical Presence Window was Asserted: + 0 - Physiscal Presence was NOT Asserted + 1 - Physical Presence was Asserted + </description> + <id>PHYS_PRES_ASSERTED</id> + <simpleType> + <uint8_t> + <default>0x0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> + <description>Designates if the assertion of Physical Presence should + be faked: + 0 - Do NOT Fake Physical Presence + 1 - Fake Physical Presence + </description> + <id>PHYS_PRES_FAKE_ASSERT</id> + <simpleType> + <uint8_t> + <default>0x0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> + <description>Designates if there is a request to open the Physical Presence + Window: + 0 - No Request to Open Window (ie, do NOT open window) + 1 - Request to Open Window + </description> + <id>PHYS_PRES_REQUEST_OPEN_WINDOW</id> + <simpleType> + <uint8_t> + <default>0x0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + </attribute> + + <attribute> + <id>SBE_ARCH_DUMP_ADDR</id> + <description> + Physical address where SBE Architectued Dump Area is located (per + Hostboot Instance). Set in istep 21 it is only used during + MPIPLs to retrieve the the architected processor state (SPR/GPR) + </description> + <simpleType> + <uint64_t/> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hbOnly/> + </attribute> + + <attribute> <id>SBE_COMM_ADDR</id> <description> Virtual address where SBE Communications are placed in mainstore. diff --git a/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml b/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml index 25daef3dc..6033800d3 100644 --- a/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml +++ b/src/usr/targeting/common/xmltohb/hb_customized_attrs.xml @@ -418,6 +418,7 @@ <no_export/> </attribute> + <!-- Firmware boots rely on the hypervisor/os to enable the NPUs --> <attribute> <id>ATTR_PROC_NPU_PHY0_BAR_ENABLE</id> <default>0</default> @@ -455,6 +456,74 @@ </attribute> <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_ENABLE</id> + <default>0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU0_MMIO_BAR_ENABLE</id> + <default>0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU1_MMIO_BAR_ENABLE</id> + <default>0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU2_MMIO_BAR_ENABLE</id> + <default>0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU_MMIO_BAR_BASE_ADDR_OFFSET</id> + <default>0x0000030200000000</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU0_MMIO_BAR_BASE_ADDR_OFFSET</id> + <default>0x0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU1_MMIO_BAR_BASE_ADDR_OFFSET</id> + <default>0x0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU2_MMIO_BAR_BASE_ADDR_OFFSET</id> + <default>0x0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU0_PRI_CONFIG</id> + <default>0x0,0x0,0x0,0x0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU1_PRI_CONFIG</id> + <default>0x0,0x0,0x0,0x0</default> + <no_export/> + </attribute> + + <attribute> + <id>ATTR_PROC_NPU2_PRI_CONFIG</id> + <default>0x0,0x0,0x0,0x0</default> + <no_export/> + </attribute> + + <!-- end NPU config --> + + <attribute> <id>ATTR_PROC_NX_RNG_BAR_ENABLE</id> <default>0</default> <no_export/> @@ -763,6 +832,34 @@ <writeable/> <persistency>volatile-zeroed</persistency> </attribute> + + <!-- pSeries always runs in FULL_DIMM mode --> + <attribute> + <id>ATTR_MSS_OCMB_HALF_DIMM_MODE</id> + <no_export/> + <default>FULL_DIMM</default> + </attribute> + + <!-- OCMB Endianess attributes --> + <attribute> + <id>ATTR_MSS_OCMB_EXP_STRUCT_ENDIAN</id> + <default>0x1</default> + <no_export/> + </attribute> + <attribute> + <id>ATTR_MSS_OCMB_EXP_STRUCT_MMIO_ENDIAN_CTRL</id> + <default>0x1</default> + <no_export/> + </attribute> + <attribute> + <id>ATTR_MSS_OCMB_EXP_STRUCT_MMIO_WORD_SWAP</id> + <default>NO_SWAP</default> + <no_export/> + </attribute> + <attribute> + <id>ATTR_MSS_OCMB_EXP_OMI_CFG_ENDIAN_CTRL</id> + <no_export/> + </attribute> <!-- ===================================================================== End of customizations definitions ================================================================= --> diff --git a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml index 157582ce6..df431c210 100644 --- a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2018,2019 --> +<!-- Contributors Listed Below - COPYRIGHT 2018,2020 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -38,12 +38,12 @@ * Each Axone has has 2 MC units * Each MC unit has 2 MI units (a total of 4 per chip) * Each MI unit has 2 MCC units (a total of 8 per chip) - * Each MCC unit has 4 OMI Units (A total of 16 per chip) + * Each MCC unit has 2 OMI Units (A total of 16 per chip) * OMI Units are special as they have two parents (MI + OMIC (more description below)) * Each OMI unit connects to 1 OCMB chip * Each OCMB unit contains 1 MEM_PORT unit * Each MEM_PORT unit connects to 2 DIMMS (Only 1 dimm per mem_port in this XML) - * Each OCMB chip and its DIMMS are powered by 2 PMIC units + * Each OCMB chip and its DIMMS are powered by up to 4 PMIC units * Each MC unit has 3 OMIC units (a total of 12 per chip) * Each OMIC unit contains 2 or 3 OMI Units (OMIC0/1/3/4 contain 3 and OMIC2/5 contain 2 for a total of 16 per chip) * OMI Units are special as they have two parents (OMIC + MCC (described above)) @@ -53,13 +53,19 @@ * PEC 2 has 3 PHBs * Each Axone has 1 XBUS chiplet (1 XBUS Chiplet translates to multiple xbus units) * Each Axone has 4 OBUS (OB0 to OB3) - * Each OBUS has 3 OBUS_BRICK + * Each OBUS has up to 2 OBUS_BRICKs + * OBUS0 has 2 OBUS_BRICKs + * OBUS1 has 1 OBUS_BRICK + * OBUS2 has 1 OBUS_BRICK + * OBUS3 has 2 OBUS_BRICKs + * Each Axone has 3 NPU units, each associated with 2 OBUS_BRICKs + * NPU0 is associated with OBUS0, used for NVLINK ( 4 x4 links). + * NPU1 is associated with OBUS1/2, used for OpenCAPI ( 1 x8 link). + * NPU2 is associated with OBUS3, used for NVLINK ( 4 x4 links). * Each Axone has 21 PPE units (including the SBE): * 1 SBE, 1 Powerbus/Fabric PPE, 4 GPEs, 12 CMEs, and 3 IO PPEs. * Each chiplet existing in an Axone has 1 equivalent PERV unit - * Each Axone has 2 CAPP units ##TBD## has 2 sys0node0proc0capp0 units - * with same target ID...input MRW has capp0 and capp1...something - * wrong in the processMrw.pl (same observed for Witherspoon) + * Each Axone has 1 CAPP unit * Each Axone has 1 OCC unit - p9Proc0(axone chip) @@ -195,7 +201,7 @@ </attribute> <attribute> <id>ASYNC_NEST_FREQ_MHZ</id> - <default>0xFFFF</default> + <default>2000</default> </attribute> <attribute> <id>HB_SETTINGS</id> @@ -538,7 +544,7 @@ <default>400,400,0,0,0,0,0,0,0,0,0,0,0, 400,400,400,400,0,0,0,0,0,0,0,0,0, 400,400,0,0,0,0,0,0,0,0,0,0,0, - 400,400,400,0,0,0,0,0,0,0,0,0,0</default> + 400,400,400,400,400,400,400,400,400,0,0,0,0</default> </attribute> <attribute> <id>MRU_ID</id> @@ -631,8 +637,243 @@ <id>VPD_REC_NUM</id> <default>0</default> </attribute> + <attribute> + <id>FREQ_OMI_MHZ</id> + <default>25600</default> + </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1</id> + <type>chip-processor-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1</default> + </attribute> + <attribute> + <id>ALTFSI_MASTER_CHIP</id> + <default>physical:sys-0</default> + </attribute> + <attribute> + <id>ALTFSI_MASTER_PORT</id> + <default>0x1</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>CHIP</default> + </attribute> + <attribute> + <id>EEPROM_SBE_BACKUP_INFO</id> + <default> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x04</value></field> + <field><id>devAddr</id><value>0xA8</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>maxMemorySizeKB</id><value>0x100</value></field> + <field><id>port</id><value>3</value></field> + <field><id>writeCycleTime</id><value>0x0A</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_SBE_PRIMARY_INFO</id> + <default> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x04</value></field> + <field><id>devAddr</id><value>0xA8</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>maxMemorySizeKB</id><value>0x100</value></field> + <field><id>port</id><value>1</value></field> + <field><id>writeCycleTime</id><value>0x0A</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_BACKUP_INFO</id> + <default> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <!-- Note: that there is actually two 64KB chips associated with the MVPD SEEPROM + but Hostboot should never access the second chip --> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>maxMemorySizeKB</id><value>0x40</value></field> + <field><id>port</id><value>2</value></field> + <field><id>writeCycleTime</id><value>0x0A</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <!-- Note: that there is actually two 64KB chips associated with the MVPD SEEPROM + but Hostboot should never access the second chip --> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>maxMemorySizeKB</id><value>0x40</value></field> + <field><id>port</id><value>0</value></field> + <field><id>writeCycleTime</id><value>0x0A</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + </default> + </attribute> + <attribute> + <id>FABRIC_CHIP_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>FABRIC_GROUP_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu:k0:n0:s0:p01</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>FSI_MASTER_CHIP</id> + <default>physical:sys-0/node-0/proc-0</default> + </attribute> + <attribute> + <id>FSI_MASTER_PORT</id> + <default>0x1</default> + </attribute> + <attribute> + <id>FSI_MASTER_TYPE</id> + <default>MFSI</default> + </attribute> + <attribute> + <id>FSI_OPTION_FLAGS</id> + <default> + <field><id>flipPort</id><value>0</value></field> + <field><id>reserved</id><value>0</value></field> + </default> + </attribute> + <attribute> + <id>FSI_SLAVE_CASCADE</id> + <default>0</default> + </attribute> + <attribute> + <id>FSP_BASE_ADDR</id> + <default>0x0006070100000000</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00050001</default> + </attribute> + <attribute> + <id>I2C_BUS_SPEED_ARRAY</id> + <default>400,400,0,0,0,0,0,0,0,0,0,0,0, + 400,400,400,400,0,0,0,0,0,0,0,0,0, + 400,400,0,0,0,0,0,0,0,0,0,0,0, + 400,400,400,400,400,400,400,400,400,0,0,0,0</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00010000</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>PROC_EFF_FABRIC_CHIP_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>PROC_EFF_FABRIC_GROUP_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>PROC_MASTER_TYPE</id> + <default>NOT_MASTER</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VCS_UOHM</id> + <default>0x640</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VDD_UOHM</id> + <default>0xAA</default> + </attribute> + <attribute> + <id>PROC_R_DISTLOSS_VDN_UOHM</id> + <default>0xAA</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VCS_UOHM</id> + <default>0x1F4</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VDD_UOHM</id> + <default>0x1F4</default> + </attribute> + <attribute> + <id>PROC_R_LOADLINE_VDN_UOHM</id> + <default>0x1F4</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VCS_UV</id> + <default>0x30D4</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VDD_UV</id> + <default>0x30D4</default> + </attribute> + <attribute> + <id>PROC_VRM_VOFFSET_VDN_UV</id> + <default>0x30D4</default> + </attribute> + <attribute> + <id>SCOM_SWITCHES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>useFsiScom</id><value>0</value></field> + <field><id>useInbandScom</id><value>0</value></field> + <field><id>useSbeScom</id><value>1</value></field> + <field><id>useXscom</id><value>0</value></field> + </default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PROC</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>1</default> + </attribute> + <attribute> + <id>FREQ_OMI_MHZ</id> + <default>25600</default> + </attribute> +</targetInstance> + + <!-- ===================================================================== --> <!-- EQ Units --> <!-- ===================================================================== --> @@ -1008,6 +1249,228 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1eq0</id> + <type>unit-eq-power9</type> + <attribute><id>HUID</id><default>0x00230006</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.eq:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>6</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>6</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-16</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x10</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq1</id> + <type>unit-eq-power9</type> + <attribute><id>HUID</id><default>0x00230007</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.eq:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>7</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>7</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-17</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x11</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq2</id> + <type>unit-eq-power9</type> + <attribute><id>HUID</id><default>0x00230008</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.eq:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-2</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-2</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>8</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>8</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-18</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x12</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq3</id> + <type>unit-eq-power9</type> + <attribute><id>HUID</id><default>0x00230009</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.eq:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-3</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-3</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>9</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>9</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-19</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x13</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq4</id> + <type>unit-eq-power9</type> + <attribute><id>HUID</id><default>0x0023000A</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.eq:k0:n0:s0:p01:c4</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-4</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-4</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-20</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>4</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x14</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq5</id> + <type>unit-eq-power9</type> + <attribute><id>HUID</id><default>0x0023000B</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.eq:k0:n0:s0:p01:c5</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-5</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-5</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-21</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>5</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x15</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- EX Units --> <!-- ===================================================================== --> @@ -1755,6 +2218,402 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1eq0ex0</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x0006000C</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-0/ex-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-0/ex-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>12</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>12</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x10</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq0ex1</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x0006000D</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-0/ex-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-0/ex-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>13</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>13</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x10</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq1ex0</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x0006000E</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-1/ex-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-1/ex-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>14</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>14</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x11</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq1ex1</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x0006000F</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-1/ex-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-1/ex-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>15</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>15</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x11</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq2ex0</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060010</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c4</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-2/ex-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-2/ex-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>16</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>16</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>4</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x12</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq2ex1</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060011</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c5</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-2/ex-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-2/ex-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>17</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>17</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>5</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x12</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq3ex0</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060012</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c6</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-3/ex-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-3/ex-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>18</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>18</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>6</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x13</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq3ex1</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060013</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-3/ex-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-3/ex-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>19</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>19</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>7</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x13</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq4ex0</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060014</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-4/ex-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-4/ex-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>20</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>20</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>8</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x14</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq4ex1</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060015</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c9</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-4/ex-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-4/ex-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>21</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>21</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>9</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x14</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq5ex0</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060016</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c10</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-5/ex-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-5/ex-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>22</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>22</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>10</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x15</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq5ex1</id> + <type>unit-ex-power9</type> + <attribute><id>HUID</id><default>0x00060017</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.ex:k0:n0:s0:p01:c11</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-5/ex-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-5/ex-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>23</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>23</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>11</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x15</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- Core Units --> <!-- ===================================================================== --> @@ -3126,9 +3985,898 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1eq0ex0core0</id> + <type>unit-core-power9</type> + <attribute><id>HUID</id><default>0x00070018</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.core:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-0/ex-0/core-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-0/ex-0/core-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>24</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>24</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-32</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x20</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq0ex0core1</id> + <type>unit-core-power9</type> + <attribute><id>HUID</id><default>0x00070019</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.core:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-0/ex-0/core-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-0/ex-0/core-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>25</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>25</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-33</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x21</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq0ex1core0</id> + <type>unit-core-power9</type> + <attribute><id>HUID</id><default>0x0007001A</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.core:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-0/ex-1/core-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-0/ex-1/core-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>26</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>26</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-34</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x22</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq0ex1core1</id> + <type>unit-core-power9</type> + <attribute><id>HUID</id><default>0x0007001B</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.core:k0:n0:s0:p01:c3</default> + </attribute> + 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+ <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-5/ex-0/core-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>44</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>44</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-52</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>20</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x34</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq5ex0core1</id> + <type>unit-core-power9</type> + <attribute><id>HUID</id><default>0x0007002D</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.core:k0:n0:s0:p01:c21</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-5/ex-0/core-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-5/ex-0/core-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>45</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>45</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-53</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>21</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x35</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq5ex1core0</id> + <type>unit-core-power9</type> + <attribute><id>HUID</id><default>0x0007002E</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.core:k0:n0:s0:p01:c22</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-5/ex-1/core-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-5/ex-1/core-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>46</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>46</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-54</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>22</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x36</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1eq5ex1core1</id> + <type>unit-core-power9</type> + <attribute><id>HUID</id><default>0x0007002F</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.core:k0:n0:s0:p01:c23</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/eq-5/ex-1/core-1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/eq-5/ex-1/core-1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>47</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>47</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-55</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>23</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x37</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- OBUS Units --> <!-- ===================================================================== --> + <targetInstance> <id>sys0node0proc0obus0</id> <type>unit-obus-axone</type> @@ -3393,6 +5141,270 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1obus0</id> + <type>unit-obus-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/obus-0</default> + </attribute> + <attribute> + <id>PEER_PATH</id> + <default>physical:na</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x09</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.obus:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>4</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00280004</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>4</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-9</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/obus-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OBUS</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1obus1</id> + <type>unit-obus-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/obus-1</default> + </attribute> + <attribute> + <id>PEER_PATH</id> + <default>physical:na</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x0A</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.obus:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>5</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00280005</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>5</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-10</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/obus-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OBUS</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1obus2</id> + <type>unit-obus-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/obus-2</default> + </attribute> + <attribute> + <id>PEER_PATH</id> + <default>physical:na</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x0B</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.obus:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>6</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00280006</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>6</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-11</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/obus-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>2</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OBUS</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1obus3</id> + <type>unit-obus-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/obus-3</default> + </attribute> + <attribute> + <id>PEER_PATH</id> + <default>physical:na</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x0C</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.obus:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>7</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00280007</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>7</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-12</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/obus-3</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>3</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OBUS</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- OBUS_BRICK Units --> <!-- ===================================================================== --> @@ -3487,11 +5499,11 @@ </targetInstance> <targetInstance> - <id>sys0node0proc0obus0obus_brick2</id> + <id>sys0node0proc0obus1obus_brick0</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-0/obus_brick-2</default> + <default>affinity:sys-0/node-0/proc-0/obus-1/obus_brick-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> @@ -3499,7 +5511,7 @@ </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x09</default> + <default>0x0A</default> </attribute> <attribute> <id>FAPI_NAME</id> @@ -3519,24 +5531,24 @@ </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-9</default> + <default>physical:sys-0/node-0/proc-0/perv-10</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-0/obus_brick-2</default> + <default>physical:sys-0/node-0/proc-0/obus-1/obus_brick-0</default> </attribute> <attribute> <id>REL_POS</id> - <default>2</default> + <default>0</default> </attribute> </targetInstance> <targetInstance> - <id>sys0node0proc0obus1obus_brick0</id> + <id>sys0node0proc0obus2obus_brick0</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-1/obus_brick-0</default> + <default>affinity:sys-0/node-0/proc-0/obus-2/obus_brick-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> @@ -3544,15 +5556,15 @@ </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x0A</default> + <default>0x0B</default> </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c3</default> + <default>pu.obus_brick:k0:n0:s0:p00:c4</default> </attribute> <attribute> <id>HUID</id> - <default>0x00420003</default> + <default>0x00420004</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3564,11 +5576,11 @@ </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-10</default> + <default>physical:sys-0/node-0/proc-0/perv-11</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-1/obus_brick-0</default> + <default>physical:sys-0/node-0/proc-0/obus-2/obus_brick-0</default> </attribute> <attribute> <id>REL_POS</id> @@ -3577,11 +5589,11 @@ </targetInstance> <targetInstance> - <id>sys0node0proc0obus1obus_brick1</id> + <id>sys0node0proc0obus3obus_brick0</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-1/obus_brick-1</default> + <default>affinity:sys-0/node-0/proc-0/obus-3/obus_brick-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> @@ -3589,15 +5601,15 @@ </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x0A</default> + <default>0x0C</default> </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c4</default> + <default>pu.obus_brick:k0:n0:s0:p00:c6</default> </attribute> <attribute> <id>HUID</id> - <default>0x00420004</default> + <default>0x00420006</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3609,24 +5621,24 @@ </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-10</default> + <default>physical:sys-0/node-0/proc-0/perv-12</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-1/obus_brick-1</default> + <default>physical:sys-0/node-0/proc-0/obus-3/obus_brick-0</default> </attribute> <attribute> <id>REL_POS</id> - <default>1</default> + <default>0</default> </attribute> </targetInstance> <targetInstance> - <id>sys0node0proc0obus1obus_brick2</id> + <id>sys0node0proc0obus3obus_brick1</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-1/obus_brick-2</default> + <default>affinity:sys-0/node-0/proc-0/obus-3/obus_brick-1</default> </attribute> <attribute> <id>CHIP_UNIT</id> @@ -3634,7 +5646,7 @@ </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x0A</default> + <default>0x0C</default> </attribute> <attribute> <id>FAPI_NAME</id> @@ -3642,7 +5654,7 @@ </attribute> <attribute> <id>HUID</id> - <default>0x00420005</default> + <default>0x00420007</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3654,40 +5666,40 @@ </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-10</default> + <default>physical:sys-0/node-0/proc-0/perv-12</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-1/obus_brick-2</default> + <default>physical:sys-0/node-0/proc-0/obus-3/obus_brick-1</default> </attribute> <attribute> <id>REL_POS</id> - <default>3</default> + <default>1</default> </attribute> </targetInstance> <targetInstance> - <id>sys0node0proc0obus2obus_brick0</id> + <id>sys0node0proc1obus0obus_brick0</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-2/obus_brick-0</default> + <default>affinity:sys-0/node-0/proc-1/obus-0/obus_brick-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>6</default> + <default>0</default> </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x0B</default> + <default>0x09</default> </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c6</default> + <default>pu.obus_brick:k0:n0:s0:p01:c0</default> </attribute> <attribute> <id>HUID</id> - <default>0x00420006</default> + <default>0x00420008</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3695,15 +5707,15 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>6</default> + <default>8</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-11</default> + <default>physical:sys-0/node-0/proc-1/perv-9</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-2/obus_brick-0</default> + <default>physical:sys-0/node-0/proc-1/obus-0/obus_brick-0</default> </attribute> <attribute> <id>REL_POS</id> @@ -3712,27 +5724,27 @@ </targetInstance> <targetInstance> - <id>sys0node0proc0obus2obus_brick1</id> + <id>sys0node0proc1obus0obus_brick1</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-2/obus_brick-1</default> + <default>affinity:sys-0/node-0/proc-1/obus-0/obus_brick-1</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>7</default> + <default>1</default> </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x0B</default> + <default>0x09</default> </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c7</default> + <default>pu.obus_brick:k0:n0:s0:p01:c1</default> </attribute> <attribute> <id>HUID</id> - <default>0x00420007</default> + <default>0x00420009</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3740,15 +5752,15 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>7</default> + <default>9</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-11</default> + <default>physical:sys-0/node-0/proc-1/perv-9</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-2/obus_brick-1</default> + <default>physical:sys-0/node-0/proc-1/obus-0/obus_brick-1</default> </attribute> <attribute> <id>REL_POS</id> @@ -3757,27 +5769,27 @@ </targetInstance> <targetInstance> - <id>sys0node0proc0obus2obus_brick2</id> + <id>sys0node0proc1obus1obus_brick0</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-2/obus_brick-2</default> + <default>affinity:sys-0/node-0/proc-1/obus-1/obus_brick-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>8</default> + <default>2</default> </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x0B</default> + <default>0x0A</default> </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c8</default> + <default>pu.obus_brick:k0:n0:s0:p01:c2</default> </attribute> <attribute> <id>HUID</id> - <default>0x00420008</default> + <default>0x0042000A</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3785,44 +5797,44 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>8</default> + <default>10</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-11</default> + <default>physical:sys-0/node-0/proc-1/perv-10</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-2/obus_brick-2</default> + <default>physical:sys-0/node-0/proc-1/obus-1/obus_brick-0</default> </attribute> <attribute> <id>REL_POS</id> - <default>2</default> + <default>0</default> </attribute> </targetInstance> <targetInstance> - <id>sys0node0proc0obus3obus_brick0</id> + <id>sys0node0proc1obus2obus_brick0</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-3/obus_brick-0</default> + <default>affinity:sys-0/node-0/proc-1/obus-2/obus_brick-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>9</default> + <default>3</default> </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x0C</default> + <default>0x0B</default> </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c9</default> + <default>pu.obus_brick:k0:n0:s0:p01:c4</default> </attribute> <attribute> <id>HUID</id> - <default>0x00420009</default> + <default>0x0042000B</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3830,15 +5842,15 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>9</default> + <default>11</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-12</default> + <default>physical:sys-0/node-0/proc-1/perv-11</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-3/obus_brick-0</default> + <default>physical:sys-0/node-0/proc-1/obus-2/obus_brick-0</default> </attribute> <attribute> <id>REL_POS</id> @@ -3847,15 +5859,15 @@ </targetInstance> <targetInstance> - <id>sys0node0proc0obus3obus_brick1</id> + <id>sys0node0proc1obus3obus_brick0</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-3/obus_brick-1</default> + <default>affinity:sys-0/node-0/proc-1/obus-3/obus_brick-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>10</default> + <default>4</default> </attribute> <attribute> <id>CHIPLET_ID</id> @@ -3863,11 +5875,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c10</default> + <default>pu.obus_brick:k0:n0:s0:p01:c6</default> </attribute> <attribute> <id>HUID</id> - <default>0x0042000A</default> + <default>0x0042000C</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3875,32 +5887,32 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>10</default> + <default>12</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-12</default> + <default>physical:sys-0/node-0/proc-1/perv-12</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-3/obus_brick-1</default> + <default>physical:sys-0/node-0/proc-1/obus-3/obus_brick-0</default> </attribute> <attribute> <id>REL_POS</id> - <default>1</default> + <default>0</default> </attribute> </targetInstance> <targetInstance> - <id>sys0node0proc0obus3obus_brick2</id> + <id>sys0node0proc1obus3obus_brick1</id> <type>unit-obus-brick-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/obus-3/obus_brick-2</default> + <default>affinity:sys-0/node-0/proc-1/obus-3/obus_brick-1</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>11</default> + <default>5</default> </attribute> <attribute> <id>CHIPLET_ID</id> @@ -3908,11 +5920,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.obus_brick:k0:n0:s0:p00:c11</default> + <default>pu.obus_brick:k0:n0:s0:p01:c5</default> </attribute> <attribute> <id>HUID</id> - <default>0x0042000B</default> + <default>0x0042000D</default> </attribute> <attribute> <id>OBUS_SLOT_INDEX</id> @@ -3920,22 +5932,325 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>11</default> + <default>13</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-12</default> + <default>physical:sys-0/node-0/proc-1/perv-12</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/obus-3/obus_brick-1</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + + +<!-- ===================================================================== --> +<!-- NPU Units for node 0 --> +<!-- ===================================================================== --> +<targetInstance> + <!-- Note : NPU0 covers OBUS0 --> + <id>sys0node0proc0npu0</id> + <type>unit-npu-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/npu-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x05</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00430000</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>0</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-0/perv-5</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/npu-0</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <!-- Note : NPU1 covers OBUS1 and OBUS2, but OBUS1 isn't wired out --> + <!-- on the Swift configuration --> + <id>sys0node0proc0npu1</id> + <type>unit-npu-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/npu-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x05</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00430001</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-0/perv-5</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/npu-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>NPU</default> + </attribute> +</targetInstance> + +<targetInstance> + <!-- Note : NPU2 covers OBUS3 --> + <id>sys0node0proc0npu2</id> + <type>unit-npu-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/npu-2</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x03</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00430002</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>2</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-0/perv-3</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/obus-3/obus_brick-2</default> + <default>physical:sys-0/node-0/proc-0/npu-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> </attribute> <attribute> <id>REL_POS</id> <default>2</default> </attribute> + <attribute> + <id>TYPE</id> + <default>NPU</default> + </attribute> +</targetInstance> + +<targetInstance> + <!-- Note : NPU0 covers OBUS0 --> + <id>sys0node0proc1npu0</id> + <type>unit-npu-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/npu-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x05</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00430003</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>3</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-5</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/npu-0</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> </targetInstance> +<targetInstance> + <!-- Note : NPU1 covers OBUS1 and OBUS2, but OBUS2 isn't wired out --> + <!-- on the Swift configuration --> + <id>sys0node0proc1npu1</id> + <type>unit-npu-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/npu-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x05</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00430004</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>4</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-5</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/npu-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>NPU</default> + </attribute> +</targetInstance> + +<targetInstance> + <!-- Note : NPU2 covers OBUS3 --> + <id>sys0node0proc1npu2</id> + <type>unit-npu-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/npu-2</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x03</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00430005</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>5</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-3</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/npu-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>2</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>NPU</default> + </attribute> +</targetInstance> + + <!-- ===================================================================== --> <!-- TPM Units for node 0 --> <!-- ===================================================================== --> @@ -4041,7 +6356,7 @@ </attribute> <attribute> <id>FAPI_POS</id> - <default>1</default> + <default>0</default> </attribute> <attribute> <id>HUID</id> @@ -4070,23 +6385,23 @@ </targetInstance> <targetInstance> - <id>sys0node0proc0capp1</id> + <id>sys0node0proc1capp0</id> <type>unit-capp-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/capp-1</default> + <default>affinity:sys-0/node-0/proc-1/capp-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>1</default> + <default>0</default> </attribute> <attribute> <id>CHIPLET_ID</id> - <default>4</default> + <default>2</default> </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.capp:k0:n0:s0:p00:c1</default> + <default>pu.capp:k0:n0:s0:p01:c0</default> </attribute> <attribute> <id>FAPI_POS</id> @@ -4098,7 +6413,7 @@ </attribute> <attribute> <id>MRU_ID</id> - <default>0x02090001</default> + <default>0x02090000</default> </attribute> <attribute> <id>ORDINAL_ID</id> @@ -4106,18 +6421,19 @@ </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-2</default> + <default>physical:sys-0/node-0/proc-1/perv-2</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/capp-1</default> + <default>physical:sys-0/node-0/proc-1/capp-0</default> </attribute> <attribute> <id>REL_POS</id> - <default>1</default> + <default>0</default> </attribute> </targetInstance> + <!-- ===================================================================== --> <!-- OCC Units --> <!-- ===================================================================== --> @@ -4179,6 +6495,65 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1occ0</id> + <type>unit-occ-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>NA</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00130001</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x02010000</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>1</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OCC</default> + </attribute> +</targetInstance> + + <!-- ===================================================================== --> <!-- NX Units --> <!-- ===================================================================== --> @@ -4195,7 +6570,7 @@ </attribute> <attribute> <id>AFFINITY_PATH</id> - <default>physical:sys-0/node-0/proc-0/nx-0</default> + <default>affinity:sys-0/node-0/proc-0/nx-0</default> </attribute> <attribute> <id>ORDINAL_ID</id> @@ -4207,6 +6582,32 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1nx0</id> + <type>unit-nx-power9</type> + <attribute><id>HUID</id><default>0x001E0001</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>NA</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/nx-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/nx-0</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> +</targetInstance> + + <!-- ===================================================================== --> <!-- PEC Units --> <!-- ===================================================================== --> @@ -4468,6 +6869,264 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1pec0</id> + <type>unit-pec-power9</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-0</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xD</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.pec:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>3</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002D0003</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>3</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-13</default> + </attribute> + <attribute> + <id>PEC_PCIE_IOP_SWAP_NON_BIFURCATED</id> + <default>0</default> + </attribute> + <attribute> + <id>PEC_PCIE_LANE_MASK_NON_BIFURCATED</id> + <default>0xFFFF,0x0000,0x0000,0x0000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>PROC_PCIE_IOP_CONFIG</id> + <default>1</default> + </attribute> + <attribute> + <id>PROC_PCIE_IOP_SWAP</id> + <default>0</default> + </attribute> + <attribute> + <id>PROC_PCIE_LANE_MASK</id> + <default>,0x0000,0x0000,0x0000</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PEC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1pec1</id> + <type>unit-pec-power9</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-1</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xE</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.pec:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>4</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002D0004</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>4</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-14</default> + </attribute> + <attribute> + <id>PEC_PCIE_IOP_SWAP_NON_BIFURCATED</id> + <default>0</default> + </attribute> + <attribute> + <id>PEC_PCIE_LANE_MASK_NON_BIFURCATED</id> + <default>0xFF00,0x0000,0x00FF,0x0000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>PROC_PCIE_IOP_CONFIG</id> + <default>1</default> + </attribute> + <attribute> + <id>PROC_PCIE_IOP_SWAP</id> + <default>0</default> + </attribute> + <attribute> + <id>PROC_PCIE_LANE_MASK</id> + <default>,0x0000,0x0000,0x0000</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PEC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1pec2</id> + <type>unit-pec-power9</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-2</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xF</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.pec:k0:n0:s0:p00:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>5</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002D0005</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>5</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-15</default> + </attribute> + <attribute> + <id>PEC_PCIE_IOP_SWAP_NON_BIFURCATED</id> + <default>0</default> + </attribute> + <attribute> + <id>PEC_PCIE_LANE_MASK_NON_BIFURCATED</id> + <default>0xFFFF,0x0000,0x0000,0x0000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>PROC_PCIE_IOP_CONFIG</id> + <default>1</default> + </attribute> + <attribute> + <id>PROC_PCIE_IOP_SWAP</id> + <default>0</default> + </attribute> + <attribute> + <id>PROC_PCIE_LANE_MASK</id> + <default>,0x0000,0x0000,0x0000</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>2</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PEC</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- PHB Units --> <!-- ===================================================================== --> @@ -4891,6 +7550,426 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1pec0phb0</id> + <type>unit-phb-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-0/phb-0</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xD</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.phb:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>6</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002E0006</default> + </attribute> + <attribute> + <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> + <default>0x00000031</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>6</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-13</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-0/phb-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PHB</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1pec1phb0</id> + <type>unit-phb-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-1/phb-0</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xE</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.phb:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>7</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002E0007</default> + </attribute> + <attribute> + <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> + <default>0x00000031</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>7</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-14</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-1/phb-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PHB</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1pec1phb1</id> + <type>unit-phb-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-1/phb-1</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xE</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.phb:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>8</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002E0008</default> + </attribute> + <attribute> + <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> + <default>0x00000031</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>8</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-14</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-1/phb-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PHB</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1pec2phb0</id> + <type>unit-phb-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-2/phb-0</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xF</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.phb:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>9</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002E0009</default> + </attribute> + <attribute> + <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> + <default>0x00000031</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>9</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-15</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-2/phb-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PHB</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1pec2phb1</id> + <type>unit-phb-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-2/phb-1</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>4</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xF</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.phb:k0:n0:s0:p01:c4</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002E000A</default> + </attribute> + <attribute> + <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> + <default>0x00000031</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-15</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-2/phb-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PHB</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1pec2phb2</id> + <type>unit-phb-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/pec-2/phb-2</default> + </attribute> + <attribute> + <id>CDM_DOMAIN</id> + <default>IO</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>5</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0xF</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.phb:k0:n0:s0:p01:c5</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002E000B</default> + </attribute> + <attribute> + <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> + <default>0x00000031</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-15</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/pec-2/phb-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>5</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PHB</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- PPE Units --> <!-- ===================================================================== --> @@ -6136,6 +9215,1248 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1ppe0</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>64</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B0033</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>64</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe10</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-10</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>10</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c10</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>74</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B003D</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>74</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-10</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe11</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-11</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>11</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c11</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>75</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B003E</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>75</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-11</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe12</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-12</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>12</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c12</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>76</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B003F</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>76</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-12</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>12</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe13</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-13</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>13</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c13</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>77</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B0040</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>77</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-13</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>13</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe20</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-20</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>20</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c20</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>84</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B0047</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>84</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + 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<id>CHIP_UNIT</id> + <default>42</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c42</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>106</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B005D</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>106</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-42</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>42</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe43</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-43</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>43</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c43</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>107</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B005E</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>107</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-43</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>43</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe45</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-45</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>45</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c45</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>109</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B0060</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>109</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-45</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>45</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1ppe50</id> + <type>unit-ppe-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/ppe-50</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>50</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.ppe:k0:n0:s0:p01:c50</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>114</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002B0065</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>114</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/ppe-50</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>50</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PPE</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- SBE Units --> <!-- ===================================================================== --> @@ -6178,6 +10499,8 @@ <id>PHYS_PATH</id> <default>physical:sys-0/node-0/proc-0/sbe-0</default> </attribute> + <!--The eeprom associated w/ this target will have a valid entry in the EECACHE + that we preload in standalone simics. No cache updates should be needed --> <attribute> <id>PRIMARY_CAPABILITIES</id> <default> @@ -6253,11 +10576,11 @@ </attribute> <attribute> <id>PEER_TARGET</id> - <default>NULL</default> + <default>physical:sys-0/node-0/proc-1/xbus-2</default> </attribute> <attribute> <id>PEER_PATH</id> - <default>physical:na</default> + <default>physical:sys-0/node-0/proc-1/xbus-2</default> </attribute> <attribute> <id>PHYS_PATH</id> @@ -6364,24 +10687,27 @@ </attribute> </targetInstance> +<!-- ===================================================================== --> +<!-- MEMORY SUBSYSTEM --> +<!-- ===================================================================== --> + +<!-- ===================================================================== --> +<!-- MC Units --> +<!-- ===================================================================== --> <targetInstance> - <id>sys0node0proc0xbus2</id> - <type>unit-xbus-axone</type> + <id>sys0node0proc0mc0</id> + <type>unit-mc-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/xbus-2</default> - </attribute> - <attribute> - <id>CDM_DOMAIN</id> - <default>FABRIC</default> + <default>affinity:sys-0/node-0/proc-0/mc-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> - <default>2</default> + <default>0</default> </attribute> <attribute> <id>CHIPLET_ID</id> - <default>0x06</default> + <default>0x07</default> </attribute> <attribute> <id>CLASS</id> @@ -6389,43 +10715,94 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.xbus:k0:n0:s0:p00:c2</default> + <default>pu.mc:k0:n0:s0:p00:c0</default> </attribute> <attribute> <id>FAPI_POS</id> - <default>2</default> + <default>0</default> </attribute> <attribute> <id>HUID</id> - <default>0x000E0002</default> + <default>0x00440000</default> </attribute> <attribute> - <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> - <default>0x00000031</default> + <id>ORDINAL_ID</id> + <default>0</default> </attribute> <attribute> - <id>MRU_ID</id> - <default>0x03020002</default> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-0/perv-7</default> </attribute> <attribute> - <id>ORDINAL_ID</id> - <default>2</default> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/mc-0</default> </attribute> <attribute> - <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-6</default> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> </attribute> <attribute> - <id>PEER_TARGET</id> - <default>NULL</default> + <id>REL_POS</id> + <default>0</default> </attribute> <attribute> - <id>PEER_PATH</id> - <default>physical:na</default> + <id>TYPE</id> + <default>MC</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 16GB --> + <default>0x30400000000</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc0mc1</id> + <type>unit-mc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/mc-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mc:k0:n0:s0:p00:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00440001</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-0/perv-8</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/xbus-2</default> + <default>physical:sys-0/node-0/proc-0/mc-1</default> </attribute> <attribute> <id>PRIMARY_CAPABILITIES</id> @@ -6438,27 +10815,25 @@ </attribute> <attribute> <id>REL_POS</id> - <default>2</default> + <default>1</default> </attribute> <attribute> <id>TYPE</id> - <default>XBUS</default> + <default>MC</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 48GB --> + <default>0x30C00000000</default> </attribute> </targetInstance> -<!-- ===================================================================== --> -<!-- MEMORY SUBSYSTEM --> -<!-- ===================================================================== --> - -<!-- ===================================================================== --> -<!-- MC Units --> -<!-- ===================================================================== --> <targetInstance> - <id>sys0node0proc0mc0</id> + <id>sys0node0proc1mc0</id> <type>unit-mc-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/mc-0</default> + <default>affinity:sys-0/node-0/proc-1/mc-0</default> </attribute> <attribute> <id>CHIP_UNIT</id> @@ -6474,27 +10849,27 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.mc:k0:n0:s0:p00:c0</default> + <default>pu.mc:k0:n0:s0:p01:c0</default> </attribute> <attribute> <id>FAPI_POS</id> - <default>0</default> + <default>2</default> </attribute> <attribute> <id>HUID</id> - <default>0x00440000</default> + <default>0x00440002</default> </attribute> <attribute> <id>ORDINAL_ID</id> - <default>0</default> + <default>2</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-7</default> + <default>physical:sys-0/node-0/proc-1/perv-7</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/mc-0</default> + <default>physical:sys-0/node-0/proc-1/mc-0</default> </attribute> <attribute> <id>PRIMARY_CAPABILITIES</id> @@ -6521,11 +10896,11 @@ </targetInstance> <targetInstance> - <id>sys0node0proc0mc1</id> + <id>sys0node0proc1mc1</id> <type>unit-mc-axone</type> <attribute> <id>AFFINITY_PATH</id> - <default>affinity:sys-0/node-0/proc-0/mc-1</default> + <default>affinity:sys-0/node-0/proc-1/mc-1</default> </attribute> <attribute> <id>CHIP_UNIT</id> @@ -6541,27 +10916,27 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pu.mc:k0:n0:s0:p00:c1</default> + <default>pu.mc:k0:n0:s0:p01:c1</default> </attribute> <attribute> <id>FAPI_POS</id> - <default>1</default> + <default>3</default> </attribute> <attribute> <id>HUID</id> - <default>0x00440001</default> + <default>0x00440003</default> </attribute> <attribute> <id>ORDINAL_ID</id> - <default>1</default> + <default>3</default> </attribute> <attribute> <id>PARENT_PERVASIVE</id> - <default>physical:sys-0/node-0/proc-0/perv-8</default> + <default>physical:sys-0/node-0/proc-1/perv-8</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/mc-1</default> + <default>physical:sys-0/node-0/proc-1/mc-1</default> </attribute> <attribute> <id>PRIMARY_CAPABILITIES</id> @@ -6838,6 +11213,255 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1mc0mi0</id> + <type>unit-mi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mi:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>4</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00260004</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>4</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MI</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi1</id> + <type>unit-mi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mi:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>5</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00260005</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>5</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MI</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi0</id> + <type>unit-mi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mi:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>6</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00260006</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>6</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MI</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi1</id> + <type>unit-mi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mi:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>7</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00260007</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>7</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MI</default> + </attribute> +</targetInstance> + + <!-- ===================================================================== --> <!-- MCC Units --> <!-- ===================================================================== --> @@ -7337,6 +11961,502 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1mc0mi0mcc0</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>16</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490010</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>16</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi0mcc1</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>17</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490011</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>17</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi1mcc0</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>18</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490012</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>18</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi1mcc1</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>19</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490013</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>19</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi0mcc0</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>4</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c4</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>20</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490014</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>20</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi0mcc1</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>5</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c5</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>21</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490015</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>21</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi1mcc0</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>6</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c6</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>22</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490016</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>22</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi1mcc1</id> + <type>unit-mcc-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>7</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.mcc:k0:n0:s0:p01:c7</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>23</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00490017</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>23</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>MCC</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- OMI Units --> <!-- ===================================================================== --> @@ -7416,6 +12536,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>0</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -7491,6 +12615,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>1</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -7566,6 +12694,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>2</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -7641,6 +12773,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>3</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> </targetInstance> <targetInstance> @@ -7716,6 +12852,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>4</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -7791,6 +12931,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>5</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -7866,6 +13010,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>6</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> </targetInstance> <targetInstance> @@ -7941,6 +13089,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>7</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -8016,6 +13168,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>8</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -8091,6 +13247,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>9</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -8166,6 +13326,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>10</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -8213,7 +13377,7 @@ </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/proc-0/mc-1/mi-0/mcc-1/omi-11</default> + <default>physical:sys-0/node-0/proc-0/mc-1/mi-0/mcc-1/omi-1</default> </attribute> <attribute> <id>PRIMARY_CAPABILITIES</id> @@ -8241,6 +13405,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>11</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> </targetInstance> <targetInstance> @@ -8316,6 +13484,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>12</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> </targetInstance> <targetInstance> @@ -8391,6 +13563,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>13</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> </targetInstance> <targetInstance> @@ -8466,6 +13642,10 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>14</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> </targetInstance> <targetInstance> @@ -8541,14 +13721,1286 @@ <id>OMI_REFCLOCK_SWIZZLE</id> <default>15</default> </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi0mcc0omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>16</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480010</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>16</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <!-- TODO RTC 201493 - Need to remove these sets (all 16 of them) of + OMI_INBAND_BAR_BASE_ADDR_OFFSET once p9a_omi_setup_bars + is working --> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 16GB --> + <default>0x30400000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>0</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi0mcc0omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>17</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480011</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>17</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 18GB --> + <default>0x30480000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>1</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi0mcc1omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>18</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480012</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>18</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 24GB --> + <default>0x30600000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>2</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi0mcc1omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>19</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480013</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>19</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 26GB --> + <default>0x30680000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>3</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi1mcc0omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>4</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c4</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>20</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480014</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>20</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 32GB --> + <default>0x30800000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>4</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi1mcc0omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>5</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c5</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>21</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480015</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>21</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 34GB --> + <default>0x30880000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>5</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi1mcc1omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>6</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c6</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>22</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480016</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>22</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 40GB --> + <default>0x30A00000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>6</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0mi1mcc1omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>7</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c7</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>23</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480017</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>23</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 42GB --> + <default>0x30A80000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>7</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi0mcc0omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>8</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c8</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>24</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480018</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>24</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 48GB --> + <default>0x30C00000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>8</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1mc1mi0mcc0omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>9</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c9</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>25</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x00480019</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>25</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 50GB --> + <default>0x30C80000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>9</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi0mcc1omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>10</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c10</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>26</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0048001A</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>26</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 56GB --> + <default>0x30E00000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>10</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi0mcc1omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>11</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c11</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>27</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0048001B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>27</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 58GB --> + <default>0x30E80000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>11</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi1mcc0omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>12</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c12</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>28</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0048001C</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>28</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0/omi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 64GB --> + <default>0x31000000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>12</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi1mcc0omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>13</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c13</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>29</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0048001D</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>13</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 66GB --> + <default>0x31080000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>13</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi1mcc1omi0</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>14</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c14</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>30</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0048001E</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>30</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1/omi-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 72GB --> + <default>0x31200000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>14</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>2</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1mi1mcc1omi1</id> + <type>unit-omi-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>15</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omi:k0:n0:s0:p01:c15</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>31</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0048001F</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>31</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>OMIC_PARENT</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-1</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1/omi-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMI</default> + </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + <!-- 3TB + 74GB --> + <default>0x31280000000</default> + </attribute> + <attribute> + <id>OMI_REFCLOCK_SWIZZLE</id> + <default>15</default> + </attribute> + <attribute> + <id>OMI_DL_GROUP_POS</id> + <default>0</default> + </attribute> +</targetInstance> + + <!-- ===================================================================== --> <!-- OCMB_CHIP Units --> <!-- ===================================================================== --> <targetInstance> <id>sys0node0ocmb0</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0</default> @@ -8586,9 +15038,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x08</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x00</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8600,13 +15053,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x08</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x00</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8614,7 +15067,7 @@ <targetInstance> <id>sys0node0ocmb1</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0</default> @@ -8652,9 +15105,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x09</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x01</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8666,13 +15120,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x09</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x01</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8680,7 +15134,7 @@ <targetInstance> <id>sys0node0ocmb2</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0</default> @@ -8718,9 +15172,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x0A</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x02</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8732,13 +15187,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0A</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x02</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8746,7 +15201,7 @@ <targetInstance> <id>sys0node0ocmb3</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0</default> @@ -8784,9 +15239,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x0B</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x03</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8798,13 +15254,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0B</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x03</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8812,7 +15268,7 @@ <targetInstance> <id>sys0node0ocmb4</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0</default> @@ -8850,9 +15306,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x0C</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x04</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8864,13 +15321,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0C</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x04</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8878,7 +15335,7 @@ <targetInstance> <id>sys0node0ocmb5</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0</default> @@ -8916,9 +15373,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x0D</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x05</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8930,13 +15388,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0D</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x05</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8944,7 +15402,7 @@ <targetInstance> <id>sys0node0ocmb6</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0</default> @@ -8982,9 +15440,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x0E</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x06</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -8996,13 +15455,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0E</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x06</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -9010,7 +15469,7 @@ <targetInstance> <id>sys0node0ocmb7</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0</default> @@ -9048,9 +15507,10 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xD0</value></field> - <field><id>i2cMuxBusSelector</id><value>0x0F</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x07</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -9062,13 +15522,13 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0F</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x07</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -9076,7 +15536,7 @@ <targetInstance> <id>sys0node0ocmb8</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0</default> @@ -9114,8 +15574,9 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>1</value></field> - <field><id>devAddr</id><value>0xD0</value></field> + <!-- Engine 3 Port 0 is directly attached to DDIMM8 in the simics axone model --> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x40</value></field> <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> @@ -9127,8 +15588,8 @@ <field><id>chipCount</id><value>0x01</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>1</value></field> + <!-- Engine 3 Port 0 is directly attached to DDIMM8 in the simics axone model --> + <field><id>port</id><value>0</value></field> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>20</value></field> @@ -9141,7 +15602,7 @@ <targetInstance> <id>sys0node0ocmb9</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-0/mcc-0/omi-1/ocmb_chip-0</default> @@ -9174,13 +15635,18 @@ <id>FAPI_POS</id> <default>9</default> </attribute> + <!-- Note that EEPROM_VPD_PRIMARY_INFO/FAPI_I2C_CONTROL_INFO attrs for OCMB 9-15 and DIMM 9-15 + are invalid. The engine value is set to be engine 1 (C) which has 12 + valid ports according to the simics axone model. Only the first 4 ports + are actually used so we will use 5-12 as dummy ports for the unused dimm targets. + We cannot use the ports on engine 3 (E) becuase simics only has 2 ports marked as valid--> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> - <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>1</value></field> - <field><id>devAddr</id><value>0xD2</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>port</id><value>5</value></field> + <field><id>devAddr</id><value>0xD0</value></field> <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> @@ -9188,25 +15654,22 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>port</id><value>5</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>chipCount</id><value>0x01</value></field> - <field><id>devAddr</id><value>0xA2</value></field> - <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>1</value></field> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> - <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>20</value></field> - <field><id>writePageSize</id><value>32</value></field> - <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> - <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0ocmb10</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-0/mcc-1/omi-0/ocmb_chip-0</default> @@ -9239,13 +15702,18 @@ <id>FAPI_POS</id> <default>10</default> </attribute> + <!-- Note that EEPROM_VPD_PRIMARY_INFO/FAPI_I2C_CONTROL_INFO attrs for OCMB 9-15 and DIMM 9-15 + are invalid. The engine value is set to be engine 1 (C) which has 12 + valid ports according to the simics axone model. Only the first 4 ports + are actually used so we will use 5-12 as dummy ports for the unused dimm targets. + We cannot use the ports on engine 3 (E) becuase simics only has 2 ports marked as valid--> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> - <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>1</value></field> - <field><id>devAddr</id><value>0xD4</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>port</id><value>6</value></field> + <field><id>devAddr</id><value>0xD0</value></field> <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> @@ -9253,25 +15721,22 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>port</id><value>6</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>chipCount</id><value>0x01</value></field> - <field><id>devAddr</id><value>0xA4</value></field> - <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>1</value></field> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> - <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>20</value></field> - <field><id>writePageSize</id><value>32</value></field> - <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> - <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0ocmb11</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-0/mcc-1/omi-1/ocmb_chip-0</default> @@ -9304,13 +15769,16 @@ <id>FAPI_POS</id> <default>11</default> </attribute> + <!-- Note that EEPROM_VPD_PRIMARY_INFO/FAPI_I2C_CONTROL_INFO attrs for OCMB 9-15 and DIMM 9-15 + are invalid. The port and devAddr values are invalid, info is just here to fully test + the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>1</value></field> - <field><id>devAddr</id><value>0xD6</value></field> + <field><id>port</id><value>4</value></field> + <field><id>devAddr</id><value>0xD4</value></field> <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> @@ -9318,25 +15786,24 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>chipCount</id><value>0x01</value></field> - <field><id>devAddr</id><value>0xA6</value></field> + <field><id>devAddr</id><value>0xA4</value></field> <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>1</value></field> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>4</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>20</value></field> - <field><id>writePageSize</id><value>32</value></field> - <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0ocmb12</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-1/mcc-0/omi-0/ocmb_chip-0</default> @@ -9369,13 +15836,16 @@ <id>FAPI_POS</id> <default>12</default> </attribute> + <!-- Note that EEPROM_VPD_PRIMARY_INFO/FAPI_I2C_CONTROL_INFO attrs for OCMB 9-15 and DIMM 9-15 + are invalid. The port and devAddr values are invalid, info is just here to fully test + the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>2</value></field> - <field><id>devAddr</id><value>0xD2</value></field> + <field><id>port</id><value>5</value></field> + <field><id>devAddr</id><value>0xD5</value></field> <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> @@ -9383,25 +15853,24 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>chipCount</id><value>0x01</value></field> - <field><id>devAddr</id><value>0xA2</value></field> + <field><id>devAddr</id><value>0xA5</value></field> <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>2</value></field> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>5</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>20</value></field> - <field><id>writePageSize</id><value>32</value></field> - <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0ocmb13</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-1/mcc-0/omi-1/ocmb_chip-0</default> @@ -9434,13 +15903,16 @@ <id>FAPI_POS</id> <default>13</default> </attribute> + <!-- Note that EEPROM_VPD_PRIMARY_INFO/FAPI_I2C_CONTROL_INFO attrs for OCMB 9-15 and DIMM 9-15 + are invalid. The port and devAddr values are invalid, info is just here to fully test + the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>2</value></field> - <field><id>devAddr</id><value>0xD4</value></field> + <field><id>port</id><value>6</value></field> + <field><id>devAddr</id><value>0xD6</value></field> <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> @@ -9448,25 +15920,24 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>chipCount</id><value>0x01</value></field> - <field><id>devAddr</id><value>0xA4</value></field> + <field><id>devAddr</id><value>0xA6</value></field> <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>2</value></field> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>6</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>20</value></field> - <field><id>writePageSize</id><value>32</value></field> - <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0ocmb14</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-1/mcc-1/omi-0/ocmb_chip-0</default> @@ -9499,13 +15970,16 @@ <id>FAPI_POS</id> <default>14</default> </attribute> + <!-- Note that EEPROM_VPD_PRIMARY_INFO/FAPI_I2C_CONTROL_INFO attrs for OCMB 9-15 and DIMM 9-15 + are invalid. The port and devAddr values are invalid, info is just here to fully test + the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>2</value></field> - <field><id>devAddr</id><value>0xD6</value></field> + <field><id>port</id><value>7</value></field> + <field><id>devAddr</id><value>0xD7</value></field> <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> @@ -9513,25 +15987,24 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>chipCount</id><value>0x01</value></field> - <field><id>devAddr</id><value>0xA6</value></field> + <field><id>devAddr</id><value>0xA7</value></field> <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>2</value></field> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>7</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>20</value></field> - <field><id>writePageSize</id><value>32</value></field> - <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0ocmb15</id> - <type>chip-ocmb-explorer</type> + <type>chip-ocmb</type> <attribute> <id>AFFINITY_PATH</id> <default>affinity:sys-0/node-0/proc-0/mc-1/mi-1/mcc-1/omi-1/ocmb_chip-0</default> @@ -9564,6 +16037,9 @@ <id>FAPI_POS</id> <default>15</default> </attribute> + <!-- Note that EEPROM_VPD_PRIMARY_INFO/FAPI_I2C_CONTROL_INFO attrs for OCMB 9-15 and DIMM 9-15 + are invalid. The port and devAddr values are invalid, info is just here to fully test + the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> @@ -9578,13 +16054,614 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>chipCount</id><value>0x01</value></field> <field><id>devAddr</id><value>0xA8</value></field> <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> - <field><id>port</id><value>2</value></field> + <field><id>port</id><value>8</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb16</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p16</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0010</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-16</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>16</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>16</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>16</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x00</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x00</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb17</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p17</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0011</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-17</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>17</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>17</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x01</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x01</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb18</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p18</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0012</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-18</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>18</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>18</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>18</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x02</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x02</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb19</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p19</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0013</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-19</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>19</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>19</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>19</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x03</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x03</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb20</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p20</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0014</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-20</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>20</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>20</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>20</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x04</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x04</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb21</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p21</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0015</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-21</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>21</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>21</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>21</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x05</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x05</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb22</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p22</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0016</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-22</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>22</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>22</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>22</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x06</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x06</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb23</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p23</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0017</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-23</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>23</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>23</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>23</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0x07</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <!-- Valid Mux Bus Selections are 0x00-0x07 --> + <field><id>i2cMuxBusSelector</id><value>0x07</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb24</id> + <type>chip-ocmb</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>ocmb:k0:n0:s0:p24</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x0004B0018</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>0x00060000</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-24</default> + </attribute> + <attribute> + <id>POSITION</id> + <default>24</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>24</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>24</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 0 is directly attached to DDIMM8 in the simics axone model --> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x40</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 0 is directly attached to DDIMM8 in the simics axone model --> + <field><id>port</id><value>0</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>20</value></field> <field><id>writePageSize</id><value>32</value></field> @@ -9613,6 +16690,10 @@ <default>pmic:k0:n0:s0:p00</default> </attribute> <attribute> + <id>FAPI_POS</id> + <default>0</default> + </attribute> + <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> @@ -9653,6 +16734,10 @@ <default>pmic:k0:n0:s0:p01</default> </attribute> <attribute> + <id>FAPI_POS</id> + <default>1</default> + </attribute> + <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> @@ -9678,11 +16763,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic2</id> + <id>sys0node0pmic4</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360002</default> + <default>0x00360004</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9690,7 +16775,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p02</default> + <default>pmic:k0:n0:s0:p04</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>4</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9705,11 +16794,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>2</default> + <default>4</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-2</default> + <default>physical:sys-0/node-0/pmic-4</default> </attribute> <attribute> <id>REL_POS</id> @@ -9718,11 +16807,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic3</id> + <id>sys0node0pmic5</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360003</default> + <default>0x00360005</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9730,7 +16819,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p03</default> + <default>pmic:k0:n0:s0:p05</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>5</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9745,11 +16838,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>3</default> + <default>5</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-3</default> + <default>physical:sys-0/node-0/pmic-5</default> </attribute> <attribute> <id>REL_POS</id> @@ -9758,11 +16851,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic4</id> + <id>sys0node0pmic8</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360004</default> + <default>0x00360008</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9770,7 +16863,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p04</default> + <default>pmic:k0:n0:s0:p08</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>8</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9785,11 +16882,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>4</default> + <default>8</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-4</default> + <default>physical:sys-0/node-0/pmic-8</default> </attribute> <attribute> <id>REL_POS</id> @@ -9798,11 +16895,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic5</id> + <id>sys0node0pmic9</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360005</default> + <default>0x00360009</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9810,7 +16907,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p05</default> + <default>pmic:k0:n0:s0:p09</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>9</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9825,11 +16926,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>5</default> + <default>9</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-5</default> + <default>physical:sys-0/node-0/pmic-9</default> </attribute> <attribute> <id>REL_POS</id> @@ -9838,11 +16939,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic6</id> + <id>sys0node0pmic12</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360006</default> + <default>0x0036000C</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9850,7 +16951,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p06</default> + <default>pmic:k0:n0:s0:p12</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>12</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9865,11 +16970,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>6</default> + <default>12</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-6</default> + <default>physical:sys-0/node-0/pmic-12</default> </attribute> <attribute> <id>REL_POS</id> @@ -9878,11 +16983,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic7</id> + <id>sys0node0pmic13</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360007</default> + <default>0x0036000D</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9890,7 +16995,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p07</default> + <default>pmic:k0:n0:s0:p13</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>13</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9905,11 +17014,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>7</default> + <default>13</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-7</default> + <default>physical:sys-0/node-0/pmic-13</default> </attribute> <attribute> <id>REL_POS</id> @@ -9918,11 +17027,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic8</id> + <id>sys0node0pmic16</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360008</default> + <default>0x00360010</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9930,7 +17039,7 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p08</default> + <default>pmic:k0:n0:s0:p16</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9945,11 +17054,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>8</default> + <default>16</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-8</default> + <default>physical:sys-0/node-0/pmic-16</default> </attribute> <attribute> <id>REL_POS</id> @@ -9958,11 +17067,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic9</id> + <id>sys0node0pmic17</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360009</default> + <default>0x00360011</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -9970,7 +17079,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p09</default> + <default>pmic:k0:n0:s0:p17</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>17</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -9985,11 +17098,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>9</default> + <default>17</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-9</default> + <default>physical:sys-0/node-0/pmic-17</default> </attribute> <attribute> <id>REL_POS</id> @@ -9998,11 +17111,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic10</id> + <id>sys0node0pmic20</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x0036000A</default> + <default>0x00360014</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10010,7 +17123,7 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p10</default> + <default>pmic:k0:n0:s0:p20</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10025,11 +17138,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>10</default> + <default>20</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-0</default> + <default>physical:sys-0/node-0/pmic-20</default> </attribute> <attribute> <id>REL_POS</id> @@ -10038,11 +17151,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic11</id> + <id>sys0node0pmic21</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x0036000B</default> + <default>0x00360015</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10050,7 +17163,7 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p11</default> + <default>pmic:k0:n0:s0:p21</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10065,11 +17178,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>11</default> + <default>21</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-1</default> + <default>physical:sys-0/node-0/pmic-21</default> </attribute> <attribute> <id>REL_POS</id> @@ -10078,11 +17191,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic12</id> + <id>sys0node0pmic24</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x0036000C</default> + <default>0x00360018</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10090,7 +17203,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p12</default> + <default>pmic:k0:n0:s0:p24</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>24</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10105,11 +17222,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>12</default> + <default>24</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-0</default> + <default>physical:sys-0/node-0/pmic-24</default> </attribute> <attribute> <id>REL_POS</id> @@ -10118,11 +17235,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic13</id> + <id>sys0node0pmic25</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x0036000D</default> + <default>0x00360019</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10130,7 +17247,7 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p13</default> + <default>pmic:k0:n0:s0:p25</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10145,11 +17262,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>13</default> + <default>25</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-1</default> + <default>physical:sys-0/node-0/pmic-25</default> </attribute> <attribute> <id>REL_POS</id> @@ -10158,11 +17275,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic14</id> + <id>sys0node0pmic28</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x0036000E</default> + <default>0x0036001C</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10170,7 +17287,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p14</default> + <default>pmic:k0:n0:s0:p28</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>28</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10185,11 +17306,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>14</default> + <default>28</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-0</default> + <default>physical:sys-0/node-0/pmic-28</default> </attribute> <attribute> <id>REL_POS</id> @@ -10198,11 +17319,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic15</id> + <id>sys0node0pmic29</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x0036000F</default> + <default>0x0036001D</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10210,7 +17331,7 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p15</default> + <default>pmic:k0:n0:s0:p29</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10225,11 +17346,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>15</default> + <default>29</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-1</default> + <default>physical:sys-0/node-0/pmic-29</default> </attribute> <attribute> <id>REL_POS</id> @@ -10238,11 +17359,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic16</id> + <id>sys0node0pmic32</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360010</default> + <default>0x00360020</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10250,7 +17371,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p16</default> + <default>pmic:k0:n0:s0:p32</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>32</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10265,11 +17390,11 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>16</default> + <default>32</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-0</default> + <default>physical:sys-0/node-0/pmic-32</default> </attribute> <attribute> <id>REL_POS</id> @@ -10278,11 +17403,11 @@ </targetInstance> <targetInstance> - <id>sys0node0pmic17</id> + <id>sys0node0pmic33</id> <type>pmic</type> <attribute> <id>HUID</id> - <default>0x00360011</default> + <default>0x00360021</default> </attribute> <attribute> <id>AFFINITY_PATH</id> @@ -10290,7 +17415,11 @@ </attribute> <attribute> <id>FAPI_NAME</id> - <default>pmic:k0:n0:s0:p17</default> + <default>pmic:k0:n0:s0:p33</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>33</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> @@ -10305,11 +17434,783 @@ </attribute> <attribute> <id>ORDINAL_ID</id> - <default>17</default> + <default>33</default> </attribute> <attribute> <id>PHYS_PATH</id> - <default>physical:sys-0/node-0/pmic-1</default> + <default>physical:sys-0/node-0/pmic-33</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic34</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360022</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p34</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>34</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x08</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>34</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-34</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic35</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360023</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p35</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>35</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x08</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>35</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-35</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic38</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360026</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p38</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>38</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x09</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>38</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-38</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic39</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360027</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p39</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>39</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x09</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>39</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-39</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic42</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036002A</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p42</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>42</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0A</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>42</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-42</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic43</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036002B</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p43</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>43</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0A</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>43</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-43</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic46</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036002E</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p46</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>46</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0B</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>46</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-46</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic47</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036002F</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p47</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>47</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0B</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>47</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-47</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic48</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360032</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p48</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0C</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>48</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-48</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic51</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360033</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p51</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>51</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0C</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>51</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-51</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic54</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360036</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p54</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0D</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>54</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-54</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic55</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360037</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p55</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0D</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>55</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-55</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic58</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036003A</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p58</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>58</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0E</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>58</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-58</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic59</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036003B</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p59</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0E</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>59</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-59</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic62</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036003E</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p62</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>62</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0F</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>62</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-62</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic63</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x0036003F</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p63</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0x0F</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>63</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-63</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic66</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360042</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p66</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>66</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0x90</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>66</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-66</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0pmic67</id> + <type>pmic</type> + <attribute> + <id>HUID</id> + <default>0x00360043</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0/pmic-1</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pmic:k0:n0:s0:p67</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>67</default> + </attribute> + <attribute> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0xC0</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>67</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/pmic-67</default> </attribute> <attribute> <id>REL_POS</id> @@ -10720,12 +18621,412 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0ocmb16memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0010</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-16/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c00</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb17memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0011</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-17/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c01</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb18memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0012</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-18/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c02</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb19memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0013</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-19/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c03</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb20memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0014</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-20/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c04</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb21memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0015</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-21/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c05</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb22memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0016</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-22/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c06</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb23memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0017</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-23/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c07</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb24memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0018</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-24/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c08</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb25memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C0019</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-25/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c09</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb26memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C001A</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-26/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c10</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb27memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C001B</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-27/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-1/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c11</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb28memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C001C</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-28/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c12</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb29memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C001D</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-29/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-0/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c13</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb30memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C001E</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-30/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1/omi-0/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c14</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0ocmb31memport0</id> + <type>unit-mem_port</type> + <attribute><id>HUID</id><default>0x004C001F</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/ocmb_chip-31/mem_port-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-1/mcc-1/omi-1/ocmb_chip-0/mem_port-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>FAPI_NAME</id><default>ocmb.mp:k0:n0:s0:p01:c15</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- DIMM Units --> <!-- ===================================================================== --> <targetInstance> <id>sys0node0dimm0</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030000</default></attribute> <attribute><id>POSITION</id><default>0</default></attribute> <attribute> @@ -10758,25 +19059,25 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>engine</id><value>3</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>chipCount</id><value>0x01</value></field> <field><id>devAddr</id><value>0xA0</value></field> - <field><id>engine</id><value>3</value></field> - <!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model --> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> <field><id>port</id><value>1</value></field> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>20</value></field> - <field><id>writePageSize</id><value>32</value></field> - <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> - <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x00</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm1</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030001</default></attribute> <attribute><id>POSITION</id><default>1</default></attribute> <attribute> @@ -10814,13 +19115,12 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x08</value></field> + <field><id>i2cMuxBusSelector</id><value>0x01</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -10828,7 +19128,7 @@ <targetInstance> <id>sys0node0dimm2</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030002</default></attribute> <attribute><id>POSITION</id><default>2</default></attribute> <attribute> @@ -10866,13 +19166,12 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x09</value></field> + <field><id>i2cMuxBusSelector</id><value>0x02</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -10880,7 +19179,7 @@ <targetInstance> <id>sys0node0dimm3</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030003</default></attribute> <attribute><id>POSITION</id><default>3</default></attribute> <attribute> @@ -10918,13 +19217,12 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0A</value></field> + <field><id>i2cMuxBusSelector</id><value>0x03</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -10932,7 +19230,7 @@ <targetInstance> <id>sys0node0dimm4</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030004</default></attribute> <attribute><id>POSITION</id><default>4</default></attribute> <attribute> @@ -10970,13 +19268,12 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0B</value></field> + <field><id>i2cMuxBusSelector</id><value>0x04</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -10984,7 +19281,7 @@ <targetInstance> <id>sys0node0dimm5</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030005</default></attribute> <attribute><id>POSITION</id><default>5</default></attribute> <attribute> @@ -11022,13 +19319,12 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0C</value></field> + <field><id>i2cMuxBusSelector</id><value>0x05</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -11036,7 +19332,7 @@ <targetInstance> <id>sys0node0dimm6</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030006</default></attribute> <attribute><id>POSITION</id><default>6</default></attribute> <attribute> @@ -11074,13 +19370,12 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0D</value></field> + <field><id>i2cMuxBusSelector</id><value>0x06</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -11088,7 +19383,7 @@ <targetInstance> <id>sys0node0dimm7</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030007</default></attribute> <attribute><id>POSITION</id><default>7</default></attribute> <attribute> @@ -11126,13 +19421,12 @@ <field><id>byteAddrOffset</id><value>0x02</value></field> <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> - <field><id>port</id><value>0</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> <field><id>writeCycleTime</id><value>05</value></field> <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0E</value></field> + <field><id>i2cMuxBusSelector</id><value>0x07</value></field> <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> </default> </attribute> @@ -11140,7 +19434,7 @@ <targetInstance> <id>sys0node0dimm8</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030008</default></attribute> <attribute><id>POSITION</id><default>8</default></attribute> <attribute> @@ -11173,26 +19467,25 @@ <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> - <field><id>engine</id><value>3</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>devAddr</id><value>0xA0</value></field> <field><id>chipCount</id><value>0x01</value></field> - <!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model --> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 0 is directly attached to DDIMM8 in the simics axone model --> <field><id>port</id><value>0</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> - <field><id>writeCycleTime</id><value>05</value></field> - <field><id>writePageSize</id><value>0x20</value></field> - <!-- Valid Mux Bus Selections are 0x08-0x0F --> - <field><id>i2cMuxBusSelector</id><value>0x0F</value></field> - <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field> + <field><id>writeCycleTime</id><value>20</value></field> + <field><id>writePageSize</id><value>32</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm9</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x00030009</default></attribute> <attribute><id>POSITION</id><default>9</default></attribute> <attribute> @@ -11223,22 +19516,29 @@ <default>9</default> </attribute> <!-- Note that EEPROM_VPD_PRIMARY_INFO attrs for OCMB 9-15 and DIMM 9-15 - are invalid. The port value is invalid, info is just here to fully test - the EEPROM caching code (DIMM X should match OCMB X) --> + are invalid. The engine value is set to be engine 1 (C) which has 12 + valid ports according to the simics axone model. Only the first 4 ports + are actually used so we will use 5-12 as dummy ports for the unused dimm targets. + We cannot use the ports on engine 3 (E) becuase simics only has 2 ports marked as valid--> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> <field><id>devAddr</id><value>0xA0</value></field> - <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>2</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>port</id><value>5</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm10</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x0003000A</default></attribute> <attribute><id>POSITION</id><default>10</default></attribute> <attribute> @@ -11269,22 +19569,29 @@ <default>10</default> </attribute> <!-- Note that EEPROM_VPD_PRIMARY_INFO attrs for OCMB 9-15 and DIMM 9-15 - are invalid. The port value is invalid, info is just here to fully test - the EEPROM caching code (DIMM X should match OCMB X) --> + are invalid. The engine value is set to be engine 1 (C) which has 12 + valid ports according to the simics axone model. Only the first 4 ports + are actually used so we will use 5-12 as dummy ports for the unused dimm targets. + We cannot use the ports on engine 3 (E) becuase simics only has 2 ports marked as valid--> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> <field><id>devAddr</id><value>0xA0</value></field> - <field><id>engine</id><value>3</value></field> - <field><id>port</id><value>3</value></field> + <field><id>engine</id><value>1</value></field> + <field><id>port</id><value>6</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm11</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x0003000B</default></attribute> <attribute><id>POSITION</id><default>11</default></attribute> <attribute> @@ -11315,22 +19622,27 @@ <default>11</default> </attribute> <!-- Note that EEPROM_VPD_PRIMARY_INFO attrs for OCMB 9-15 and DIMM 9-15 - are invalid. The port value is invalid, info is just here to fully test + are invalid. The port and devAddr values are invalid, info is just here to fully test the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>devAddr</id><value>0xA0</value></field> + <field><id>devAddr</id><value>0xA4</value></field> <field><id>engine</id><value>3</value></field> <field><id>port</id><value>4</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm12</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x0003000C</default></attribute> <attribute><id>POSITION</id><default>12</default></attribute> <attribute> @@ -11361,22 +19673,27 @@ <default>12</default> </attribute> <!-- Note that EEPROM_VPD_PRIMARY_INFO attrs for OCMB 9-15 and DIMM 9-15 - are invalid. The port value is invalid, info is just here to fully test + are invalid. The port and devAddr values are invalid, info is just here to fully test the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>devAddr</id><value>0xA0</value></field> + <field><id>devAddr</id><value>0xA5</value></field> <field><id>engine</id><value>3</value></field> <field><id>port</id><value>5</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm13</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x0003000D</default></attribute> <attribute><id>POSITION</id><default>13</default></attribute> <attribute> @@ -11407,22 +19724,27 @@ <default>13</default> </attribute> <!-- Note that EEPROM_VPD_PRIMARY_INFO attrs for OCMB 9-15 and DIMM 9-15 - are invalid. The port value is invalid, info is just here to fully test + are invalid. The port and devAddr values are invalid, info is just here to fully test the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>devAddr</id><value>0xA0</value></field> + <field><id>devAddr</id><value>0xA6</value></field> <field><id>engine</id><value>3</value></field> <field><id>port</id><value>6</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm14</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x0003000E</default></attribute> <attribute><id>POSITION</id><default>14</default></attribute> <attribute> @@ -11453,22 +19775,27 @@ <default>14</default> </attribute> <!-- Note that EEPROM_VPD_PRIMARY_INFO attrs for OCMB 9-15 and DIMM 9-15 - are invalid. The port value is invalid, info is just here to fully test + are invalid. The port and devAddr values are invalid, info is just here to fully test the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>devAddr</id><value>0xA0</value></field> + <field><id>devAddr</id><value>0xA7</value></field> <field><id>engine</id><value>3</value></field> <field><id>port</id><value>7</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> </default> </attribute> </targetInstance> <targetInstance> <id>sys0node0dimm15</id> - <type>lcard-dimm-jedec</type> + <type>lcard-dimm-ddimm</type> <attribute><id>HUID</id><default>0x0003000F</default></attribute> <attribute><id>POSITION</id><default>15</default></attribute> <attribute> @@ -11499,15 +19826,479 @@ <default>15</default> </attribute> <!-- Note that EEPROM_VPD_PRIMARY_INFO attrs for OCMB 9-15 and DIMM 9-15 - are invalid. The port value is invalid, info is just here to fully test + are invalid. The port and devAddr values are invalid, info is just here to fully test the EEPROM caching code (DIMM X should match OCMB X) --> <attribute> <id>EEPROM_VPD_PRIMARY_INFO</id> <default> - <field><id>devAddr</id><value>0xA0</value></field> + <field><id>devAddr</id><value>0xA8</value></field> <field><id>engine</id><value>3</value></field> <field><id>port</id><value>8</value></field> <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm16</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030010</default></attribute> + <attribute><id>POSITION</id><default>16</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p16</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-16</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>16</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>16</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>16</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x00</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm17</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030011</default></attribute> + <attribute><id>POSITION</id><default>17</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p17</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-17</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-0/omi-1/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>17</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>17</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x01</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm18</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030012</default></attribute> + <attribute><id>POSITION</id><default>18</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p18</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-18</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>18</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-0/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>18</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>18</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x02</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm19</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030013</default></attribute> + <attribute><id>POSITION</id><default>19</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p19</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-19</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>19</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-0/mcc-1/omi-1/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>19</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>19</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x03</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm20</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030014</default></attribute> + <attribute><id>POSITION</id><default>20</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p20</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-20</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>20</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-0/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>20</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>20</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x04</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm21</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030015</default></attribute> + <attribute><id>POSITION</id><default>21</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p21</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-21</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>21</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-0/omi-1/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>21</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>21</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x05</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm22</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030016</default></attribute> + <attribute><id>POSITION</id><default>22</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p22</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-22</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>22</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-0/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>22</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>22</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x06</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm23</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030017</default></attribute> + <attribute><id>POSITION</id><default>23</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p23</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-23</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>23</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/mi-1/mcc-1/omi-1/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>23</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>23</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>engine</id><value>3</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <!-- Engine 3 Port 1 connects to a 3 to 8 MUX attached to DDIMM0-7 in the simics axone model --> + <field><id>port</id><value>1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>05</value></field> + <field><id>writePageSize</id><value>0x20</value></field> + <field><id>i2cMuxBusSelector</id><value>0x07</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-2</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0dimm24</id> + <type>lcard-dimm-ddimm</type> + <attribute><id>HUID</id><default>0x00030018</default></attribute> + <attribute><id>POSITION</id><default>24</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>dimm:k0:n0:s0:p24</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/dimm-24</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>24</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/mi-0/mcc-0/omi-0/ocmb_chip-0/mem_port-0/dimm-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>24</default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + <default>24</default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>chipCount</id><value>0x01</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>3</value></field> + <!-- Engine 3 Port 0 is directly attached to DDIMM8 in the simics axone model --> + <field><id>port</id><value>0</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> + <field><id>maxMemorySizeKB</id><value>0x4</value></field> + <field><id>writeCycleTime</id><value>20</value></field> + <field><id>writePageSize</id><value>32</value></field> + <field><id>i2cMuxBusSelector</id><value>0xFF</value></field> + <field><id>i2cMuxPath</id><value>physical:sys-0</value></field> </default> </attribute> </targetInstance> @@ -11887,6 +20678,378 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1mc0omic0</id> + <type>unit-omic-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/omic-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omic:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>6</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x004A0006</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>6</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMIC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0omic1</id> + <type>unit-omic-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/omic-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omic:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>7</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x004A0007</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>7</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMIC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc0omic2</id> + <type>unit-omic-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-0/omic-2</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x07</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omic:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>8</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x004A0008</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>8</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-0/omic-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>2</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMIC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1omic0</id> + <type>unit-omic-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/omic-0</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omic:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>9</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x004A0009</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>9</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMIC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1omic1</id> + <type>unit-omic-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/omic-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>4</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omic:k0:n0:s0:p01:c4</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x004A000A</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMIC</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1mc1omic2</id> + <type>unit-omic-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/mc-1/omic-2</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>5</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x08</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.omic:k0:n0:s0:p01:c5</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x004A000B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-8</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/mc-1/omic-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>2</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>OMIC</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- END MEMORY SUBSYSTEM --> <!-- ===================================================================== --> @@ -12417,6 +21580,122 @@ </targetInstance> <targetInstance> + <id>sys0node0proc0perv10</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/perv-10</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>10</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p00:c10</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C000A</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/perv-10</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc0perv11</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/perv-11</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>11</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p00:c11</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C000B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/perv-11</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> <id>sys0node0proc0perv12</id> <type>unit-perv-axone</type> <attribute> @@ -14396,6 +23675,2450 @@ </attribute> </targetInstance> +<targetInstance> + <id>sys0node0proc1perv1</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-1</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>1</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>1</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c1</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>57</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C0039</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>57</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-1</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>1</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv2</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-2</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>2</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>58</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C003A</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>58</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-2</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>2</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv3</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-3</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>3</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c3</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>59</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C003B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>59</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-3</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>3</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv4</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-4</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>4</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>4</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c4</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>60</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C003C</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>60</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-4</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>4</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv5</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-5</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>5</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>5</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c5</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>61</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C003D</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>61</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-5</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>5</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv6</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-6</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>6</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>6</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c6</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>62</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C003E</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>62</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-6</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>6</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv7</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>7</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>7</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c7</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>63</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C003F</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>63</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-7</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>7</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv8</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + 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<default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv45</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-45</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>45</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>45</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c45</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>101</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C0065</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>101</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-45</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>45</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv46</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-46</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>46</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>46</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c46</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>102</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C0066</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>102</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-46</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>46</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv47</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-47</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>47</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>47</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c47</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>103</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C0067</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>103</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-47</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>47</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv48</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-48</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>48</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>48</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c48</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>104</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C0068</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>104</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-48</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>48</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv49</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-49</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>49</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>49</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c49</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>105</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C0069</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>105</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-49</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>49</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv50</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-50</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>50</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>50</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c50</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>106</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C006A</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>106</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-50</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>50</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv51</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-51</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>51</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>51</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c51</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>107</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C006B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>107</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-51</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>51</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1perv52</id> + <type>unit-perv-axone</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/perv-52</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>52</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>52</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p01:c52</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>108</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C006B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>108</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/perv-52</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>52</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + <!-- ===================================================================== --> <!-- I2C_MUX --> <!-- ===================================================================== --> @@ -14428,13 +26151,48 @@ <default>0</default> </attribute> <attribute> - <id>FAPI_NAME</id> - <default>NA</default> + <id>FAPI_I2C_CONTROL_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0xE0</value></field> + <field><id>engine</id><value>3</value></field> + </default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0i2cmux2</id> + <type>i2c_mux_pca9847</type> + <attribute> + <id>HUID</id> + <default>0x004D0002</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/i2c_mux-2</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/i2c_mux-0</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>0</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>0</value></field> + </default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>2</default> </attribute> <attribute> <id>FAPI_I2C_CONTROL_INFO</id> <default> - <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> <field><id>port</id><value>1</value></field> <field><id>devAddr</id><value>0xE0</value></field> <field><id>engine</id><value>3</value></field> @@ -14442,4 +26200,97 @@ </attribute> </targetInstance> +<!-- ===================================================================== --> +<!-- XBUS --> +<!-- ===================================================================== --> +<targetInstance> + <id>sys0node0proc0xbus2</id> + <type>unit-xbus-axone</type> + <attribute><id>HUID</id><default>0x000E0002</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.xbus:k0:n0:s0:p00:c2</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/xbus-2</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/xbus-2</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>2</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>2</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x06</default> + </attribute> + <attribute> + <id>PEER_TARGET</id> + <default>physical:sys-0/node-0/proc-1/xbus-0</default> + </attribute> + <attribute> + <id>PEER_PATH</id> + <default>physical:sys-0/node-0/proc-1/xbus-0</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-0/perv-6</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc1xbus0</id> + <type>unit-xbus-axone</type> + <attribute><id>HUID</id><default>0x000E0003</default></attribute> + <attribute> + <id>FAPI_NAME</id><default>pu.xbus:k0:n0:s0:p01:c0</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/xbus-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/xbus-0</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>3</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>3</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>0</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>0x06</default> + </attribute> + <attribute> + <id>PEER_TARGET</id> + <default>physical:sys-0/node-0/proc-0/xbus-2</default> + </attribute> + <attribute> + <id>PEER_PATH</id> + <default>physical:sys-0/node-0/proc-0/xbus-2</default> + </attribute> + <attribute> + <id>PARENT_PERVASIVE</id> + <default>physical:sys-0/node-0/proc-1/perv-6</default> + </attribute> +</targetInstance> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/simics_CUMULUS.system.xml b/src/usr/targeting/common/xmltohb/simics_CUMULUS.system.xml index e82b9e38a..17aee231d 100644 --- a/src/usr/targeting/common/xmltohb/simics_CUMULUS.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_CUMULUS.system.xml @@ -7958,7 +7958,7 @@ </attribute> <attribute> <id>AFFINITY_PATH</id> - <default>physical:sys-0/node-0/proc-0/nx-0</default> + <default>affinity:sys-0/node-0/proc-0/nx-0</default> </attribute> <attribute> <id>ORDINAL_ID</id> @@ -8955,6 +8955,138 @@ <default>PERV</default> </attribute> </targetInstance> + +<targetInstance> + <id>sys0node0proc0perv10</id> + <type>unit-perv-cumulus</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/perv-10</default> + </attribute> + + + <attribute> + <id>CHIP_UNIT</id> + <default>10</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p00:c10</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C000A</default> + </attribute> + + + + + + <attribute> + <id>ORDINAL_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/perv-10</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>RESOURCE_IS_CRITICAL</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc0perv11</id> + <type>unit-perv-cumulus</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/perv-11</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>11</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p00:c11</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C000B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/perv-11</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>RESOURCE_IS_CRITICAL</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + <targetInstance> <id>sys0node0proc0perv12</id> <type>unit-perv-cumulus</type> diff --git a/src/usr/targeting/common/xmltohb/simics_CUMULUS_CDIMM.system.xml b/src/usr/targeting/common/xmltohb/simics_CUMULUS_CDIMM.system.xml index fe3bea78c..6e0177ea2 100644 --- a/src/usr/targeting/common/xmltohb/simics_CUMULUS_CDIMM.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_CUMULUS_CDIMM.system.xml @@ -7950,7 +7950,7 @@ </attribute> <attribute> <id>AFFINITY_PATH</id> - <default>physical:sys-0/node-0/proc-0/nx-0</default> + <default>affinity:sys-0/node-0/proc-0/nx-0</default> </attribute> <attribute> <id>ORDINAL_ID</id> @@ -8947,6 +8947,134 @@ <default>PERV</default> </attribute> </targetInstance> + + +<targetInstance> + <id>sys0node0proc0perv10</id> + <type>unit-perv-cumulus</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/perv-10</default> + </attribute> + + + <attribute> + <id>CHIP_UNIT</id> + <default>10</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p00:c10</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C000A</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>10</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/perv-10</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>10</default> + </attribute> + <attribute> + <id>RESOURCE_IS_CRITICAL</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + +<targetInstance> + <id>sys0node0proc0perv11</id> + <type>unit-perv-cumulus</type> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/perv-11</default> + </attribute> + <attribute> + <id>CHIP_UNIT</id> + <default>11</default> + </attribute> + <attribute> + <id>CHIPLET_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>CLASS</id> + <default>UNIT</default> + </attribute> + <attribute> + <id>FAPI_NAME</id> + <default>pu.perv:k0:n0:s0:p00:c11</default> + </attribute> + <attribute> + <id>FAPI_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>HUID</id> + <default>0x002C000B</default> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + <default>11</default> + </attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/perv-11</default> + </attribute> + <attribute> + <id>PRIMARY_CAPABILITIES</id> + <default> + <field><id>reserved</id><value>0</value></field> + <field><id>supportsFsiScom</id><value>1</value></field> + <field><id>supportsInbandScom</id><value>0</value></field> + <field><id>supportsXscom</id><value>1</value></field> + </default> + </attribute> + <attribute> + <id>REL_POS</id> + <default>11</default> + </attribute> + <attribute> + <id>RESOURCE_IS_CRITICAL</id> + <default>0</default> + </attribute> + <attribute> + <id>TYPE</id> + <default>PERV</default> + </attribute> +</targetInstance> + <targetInstance> <id>sys0node0proc0perv12</id> <type>unit-perv-cumulus</type> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 1b5b615a9..f87b8fa6e 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -159,6 +159,13 @@ <parent>chip-tpm-cectpm</parent> </targetType> + <!-- This special I2C_MUX target adapts the MRW to Hostboot's specific I2C_MUX + target. All attributes should be declared against the parent target --> + <targetType> + <id>chip-PCA9847</id> + <parent>i2c_mux_pca9847</parent> + </targetType> + <!-- This special UCD target adapts the MRW to Hostboot's specific UCD target. All attributes should be declared against the parent target. --> @@ -404,7 +411,7 @@ </attribute> </targetType> - <!-- Generic OCMB --> + <!-- Generic OCMB, used for Explorer, Gemini, etc --> <targetType> <id>chip-ocmb</id> <parent>chip</parent> @@ -413,6 +420,60 @@ <id>DECONFIG_GARDABLE</id> </attribute> <attribute> + <default> + <field> + <value>0xFF</value> + <id>byteAddrOffset</id> + </field> + <field> + <value>0xFF</value> + <id>chipCount</id> + </field> + <field> + <value>0xFF</value> + <id>devAddr</id> + </field> + <field> + <!--Since enum values cannot be used as default values in + a complexType, this is a workaround to set the value to the + corresponding enum value.--> + <!--value>DDIMM</value--> + <value>0x4</value> + <id>eepromContentType</id> + </field> + <field> + <value>0xFF</value> + <id>engine</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMasterPath</id> + </field> + <field> + <value>0xFF</value> + <id>i2cMuxBusSelector</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMuxPath</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>maxMemorySizeKB</id> + </field> + <field> + <value>0xFF</value> + <id>port</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writeCycleTime</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writePageSize</id> + </field> + </default> <id>EEPROM_VPD_PRIMARY_INFO</id> </attribute> <attribute> @@ -426,6 +487,10 @@ <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> </attribute> <attribute> + <default>OCMB</default> + <id>MODEL</id> + </attribute> + <attribute> <default> <field> <id>childRollupAllowed</id> @@ -443,23 +508,6 @@ <id>PARENT_DECONFIG_RULES</id> </attribute> <attribute> - <default>OCMB_CHIP</default> - <id>TYPE</id> - </attribute> - <attribute> - <id>VPD_REC_NUM</id> - </attribute> - </targetType> - - <!-- Explorer OCMB --> - <targetType> - <id>chip-ocmb-explorer</id> - <parent>chip-ocmb</parent> - <attribute> - <default>EXPLORER</default> - <id>MODEL</id> - </attribute> - <attribute> <default> <field> <id>reserved</id> @@ -509,6 +557,13 @@ </default> <id>SCOM_SWITCHES</id> </attribute> + <attribute> + <default>OCMB_CHIP</default> + <id>TYPE</id> + </attribute> + <attribute> + <id>VPD_REC_NUM</id> + </attribute> </targetType> <targetType> @@ -601,9 +656,6 @@ <id>LOCATION_CODE</id> </attribute> <attribute> - <id>NVDIMM_ARMED</id> - </attribute> - <attribute> <default> <field> <id>childRollupAllowed</id> @@ -753,9 +805,117 @@ <id>EEPROM_SBE_PRIMARY_INFO</id> </attribute> <attribute> + <default> + <field> + <value>0xFF</value> + <id>byteAddrOffset</id> + </field> + <field> + <value>0xFF</value> + <id>chipCount</id> + </field> + <field> + <value>0xFF</value> + <id>devAddr</id> + </field> + <field> + <!--Since enum values cannot be used as default values in + a complexType, this is a workaround to set the value to the + corresponding enum value.--> + <!--value>IBM_MVPD</value--> + <value>0x3</value> + <id>eepromContentType</id> + </field> + <field> + <value>0xFF</value> + <id>engine</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMasterPath</id> + </field> + <field> + <value>0xFF</value> + <id>i2cMuxBusSelector</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMuxPath</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>maxMemorySizeKB</id> + </field> + <field> + <value>0xFF</value> + <id>port</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writeCycleTime</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writePageSize</id> + </field> + </default> <id>EEPROM_VPD_BACKUP_INFO</id> </attribute> <attribute> + <default> + <field> + <value>0xFF</value> + <id>byteAddrOffset</id> + </field> + <field> + <value>0xFF</value> + <id>chipCount</id> + </field> + <field> + <value>0xFF</value> + <id>devAddr</id> + </field> + <field> + <!--Since enum values cannot be used as default values in + a complexType, this is a workaround to set the value to the + corresponding enum value.--> + <!--value>IBM_MVPD</value--> + <value>0x3</value> + <id>eepromContentType</id> + </field> + <field> + <value>0xFF</value> + <id>engine</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMasterPath</id> + </field> + <field> + <value>0xFF</value> + <id>i2cMuxBusSelector</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMuxPath</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>maxMemorySizeKB</id> + </field> + <field> + <value>0xFF</value> + <id>port</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writeCycleTime</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writePageSize</id> + </field> + </default> <id>EEPROM_VPD_PRIMARY_INFO</id> </attribute> <attribute> @@ -990,6 +1150,60 @@ <id>DECONFIG_GARDABLE</id> </attribute> <attribute> + <default> + <field> + <value>0xFF</value> + <id>byteAddrOffset</id> + </field> + <field> + <value>0xFF</value> + <id>chipCount</id> + </field> + <field> + <value>0xFF</value> + <id>devAddr</id> + </field> + <field> + <!--Since enum values cannot be used as default values in + a complexType, this is a workaround to set the value to the + corresponding enum value.--> + <!--value>IBM_FRUVPD</value--> + <value>0x2</value> + <id>eepromContentType</id> + </field> + <field> + <value>0xFF</value> + <id>engine</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMasterPath</id> + </field> + <field> + <value>0xFF</value> + <id>i2cMuxBusSelector</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMuxPath</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>maxMemorySizeKB</id> + </field> + <field> + <value>0xFF</value> + <id>port</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writeCycleTime</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writePageSize</id> + </field> + </default> <id>EEPROM_VPD_PRIMARY_INFO</id> </attribute> <attribute> @@ -1153,6 +1367,7 @@ </attribute> </targetType> + <!-- Represents a I2C Mux device that is compatible with the PCA9847 spec --> <targetType> <id>i2c_mux_pca9847</id> <parent>chip</parent> @@ -1205,6 +1420,60 @@ <id>EEPROM_NV_INFO</id> </attribute> <attribute> + <default> + <field> + <value>0xFF</value> + <id>byteAddrOffset</id> + </field> + <field> + <value>0xFF</value> + <id>chipCount</id> + </field> + <field> + <value>0xFF</value> + <id>devAddr</id> + </field> + <field> + <!--Since enum values cannot be used as default values in + a complexType, this is a workaround to set the value to the + corresponding enum value.--> + <!--value>ISDIMM</value--> + <value>0x1</value> + <id>eepromContentType</id> + </field> + <field> + <value>0xFF</value> + <id>engine</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMasterPath</id> + </field> + <field> + <value>0xFF</value> + <id>i2cMuxBusSelector</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMuxPath</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>maxMemorySizeKB</id> + </field> + <field> + <value>0xFF</value> + <id>port</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writeCycleTime</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writePageSize</id> + </field> + </default> <id>EEPROM_VPD_PRIMARY_INFO</id> </attribute> <attribute> @@ -1226,6 +1495,9 @@ <id>MEM_PORT</id> </attribute> <attribute> + <id>NVDIMM_ARMED</id> + </attribute> + <attribute> <id>NV_OPS_TIMEOUT_MSEC</id> </attribute> <attribute> @@ -1279,6 +1551,68 @@ </targetType> <targetType> + <id>lcard-dimm-ddimm</id> + <parent>lcard-dimm</parent> + <attribute> + <default> + <field> + <value>0xFF</value> + <id>byteAddrOffset</id> + </field> + <field> + <value>0xFF</value> + <id>chipCount</id> + </field> + <field> + <value>0xFF</value> + <id>devAddr</id> + </field> + <field> + <!--Since enum values cannot be used as default values in + a complexType, this is a workaround to set the value to the + corresponding enum value.--> + <!--value>DDIMM</value--> + <value>0x4</value> + <id>eepromContentType</id> + </field> + <field> + <value>0xFF</value> + <id>engine</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMasterPath</id> + </field> + <field> + <value>0xFF</value> + <id>i2cMuxBusSelector</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMuxPath</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>maxMemorySizeKB</id> + </field> + <field> + <value>0xFF</value> + <id>port</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writeCycleTime</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writePageSize</id> + </field> + </default> + <id>EEPROM_VPD_PRIMARY_INFO</id> + </attribute> + </targetType> + + <targetType> <id>lcard-dimm-ddr4</id> <parent>lcard-dimm</parent> </targetType> @@ -1465,6 +1799,9 @@ <id>BOOT_FREQ_MHZ</id> </attribute> <attribute> + <id>BPM_UPDATE_OVERRIDE</id> + </attribute> + <attribute> <id>BRAZOS_RX_FIFO_OVERRIDE</id> </attribute> <attribute> @@ -1520,6 +1857,12 @@ <id>FIELD_TH_P8EX_L3_LINE_DELETES</id> </attribute> <attribute> + <id>FORCE_NVDIMM_RESET</id> + </attribute> + <attribute> + <id>FORCE_SRAM_MMIO_OVER_I2C</id> + </attribute> + <attribute> <id>FREQ_CORE_CEILING_MHZ</id> </attribute> <attribute> @@ -1578,6 +1921,9 @@ <id>ISTEP_PAUSE_ENABLE</id> </attribute> <attribute> + <id>KEY_CLEAR_REQUEST</id> + </attribute> + <attribute> <default>0x0006030000000000</default> <id>LPC_BUS_ADDR</id> </attribute> @@ -1613,6 +1959,9 @@ <id>MAX_SBE_SEEPROM_SIZE</id> </attribute> <attribute> + <id>MC_PLL_BUCKET</id> + </attribute> + <attribute> <id>MFG_TRACE_ENABLE</id> </attribute> <attribute> @@ -1767,6 +2116,21 @@ <id>NUMERIC_POD_TYPE_TEST</id> </attribute> <attribute> + <id>NVDIMM_AUTO_ARM</id> + </attribute> + <attribute> + <id>NVDIMM_ENCRYPTION_ENABLE</id> + </attribute> + <attribute> + <id>NVDIMM_ENCRYPTION_KEYS_ANCHOR</id> + </attribute> + <attribute> + <id>NVDIMM_ENCRYPTION_KEYS_FW</id> + </attribute> + <attribute> + <id>OCMB_FW_UPDATE_OVERRIDE</id> + </attribute> + <attribute> <id>O_EREPAIR_THRESHOLD_FIELD</id> </attribute> <attribute> @@ -2356,6 +2720,9 @@ <id>MODEL</id> <default>AXONE</default> </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + </attribute> </targetType> <targetType> @@ -2640,6 +3007,60 @@ <id>DECONFIG_GARDABLE</id> </attribute> <attribute> + <default> + <field> + <value>0xFF</value> + <id>byteAddrOffset</id> + </field> + <field> + <value>0xFF</value> + <id>chipCount</id> + </field> + <field> + <value>0xFF</value> + <id>devAddr</id> + </field> + <field> + <!--Since enum values cannot be used as default values in + a complexType, this is a workaround to set the value to the + corresponding enum value.--> + <!--value>IBM_FRUVPD</value--> + <value>0x2</value> + <id>eepromContentType</id> + </field> + <field> + <value>0xFF</value> + <id>engine</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMasterPath</id> + </field> + <field> + <value>0xFF</value> + <id>i2cMuxBusSelector</id> + </field> + <field> + <value>physical:sys-0</value> + <id>i2cMuxPath</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>maxMemorySizeKB</id> + </field> + <field> + <value>0xFF</value> + <id>port</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writeCycleTime</id> + </field> + <field> + <value>0xFFFFFFFFFFFFFFFF</value> + <id>writePageSize</id> + </field> + </default> <id>EEPROM_VPD_PRIMARY_INFO</id> </attribute> <!--fsp requirement--> @@ -2784,6 +3205,7 @@ </attribute> </targetType> + <!-- Three NPUs per proc --> <targetType> <id>unit-npu-axone</id> <parent>unit-npu-power9</parent> @@ -2791,8 +3213,26 @@ <id>MODEL</id> <default>AXONE</default> </attribute> + <attribute> + <default> + <field> + <id>childRollupAllowed</id> + <value>1</value> + </field> + <field> + <id>deconfigureParent</id> + <value>1</value> + </field> + <field> + <id>valid</id> + <value>1</value> + </field> + </default> + <id>PARENT_DECONFIG_RULES</id> + </attribute> </targetType> + <!-- One NPU per proc --> <targetType> <id>unit-npu-cumulus</id> <parent>unit-npu-power9</parent> @@ -2802,6 +3242,7 @@ </attribute> </targetType> + <!-- One NPU per proc --> <targetType> <id>unit-npu-nimbus</id> <parent>unit-npu-power9</parent> @@ -2811,7 +3252,6 @@ </attribute> </targetType> - <!-- One NPU per proc --> <targetType> <id>unit-npu-power9</id> <parent>unit</parent> @@ -3165,6 +3605,12 @@ <default>AXONE</default> <id>MODEL</id> </attribute> + <attribute> + <id>OMI_INBAND_BAR_BASE_ADDR_OFFSET</id> + </attribute> + <attribute> + <id>ORDINAL_ID</id> + </attribute> </targetType> <!-- OMI (Special has two parents) diff --git a/src/usr/targeting/common/xmltohb/target_types_hb.xml b/src/usr/targeting/common/xmltohb/target_types_hb.xml index ff955cf28..e2be5b6f8 100644 --- a/src/usr/targeting/common/xmltohb/target_types_hb.xml +++ b/src/usr/targeting/common/xmltohb/target_types_hb.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2012,2019 --> +<!-- Contributors Listed Below - COPYRIGHT 2012,2020 --> <!-- [+] Google Inc. --> <!-- [+] International Business Machines Corp. --> <!-- --> @@ -87,10 +87,19 @@ <targetTypeExtension> <id>chip-ocmb</id> <attribute> + <id>HBRT_HYP_ID</id> + </attribute> + <attribute> + <id>IBSCOM_MUTEX</id> + </attribute> + <attribute> <default>0</default> <id>MMIO_VM_ADDR</id> </attribute> <attribute> + <id>OCMB_COUNTER_HB</id> + </attribute> + <attribute> <id>VPD_SWITCHES</id> </attribute> </targetTypeExtension> @@ -107,6 +116,9 @@ <id>FSI_SCOM_MUTEX</id> </attribute> <attribute> + <id>GPIO_INFO_PHYS_PRES</id> + </attribute> + <attribute> <id>HBRT_HYP_ID</id> </attribute> <attribute> @@ -240,6 +252,12 @@ <id>DIMM_SPD_BYTE_SIZE</id> </attribute> <attribute> + <id>NVDIMM_READING_PAGE4</id> + </attribute> + <attribute> + <id>NVDIMM_READING_VENDOR_LOG</id> + </attribute> + <attribute> <id>PART_NUMBER</id> </attribute> <attribute> @@ -251,6 +269,14 @@ </targetTypeExtension> <targetTypeExtension> + <id>pmic</id> + <attribute> + <id>DYNAMIC_I2C_DEVICE_ADDRESS</id> + <default>0</default> + </attribute> + </targetTypeExtension> + + <targetTypeExtension> <id>sys-sys-power9</id> <attribute> <id>ALLOW_ATTR_OVERRIDES_IN_SECURE_MODE</id> @@ -274,9 +300,19 @@ <id>FORCE_PRE_PAYLOAD_DRTM</id> </attribute> <attribute> + <id>FORCE_SBE_UPDATE</id> + </attribute> + <!-- Need to add this explicitly to handle the Axone case --> + <attribute> + <id>FREQ_MCA_MHZ</id> + </attribute> + <attribute> <id>HB_EXISTING_IMAGE</id> </attribute> <attribute> + <id>HB_MUTEX_SERIALIZE_TEST_LOCK</id> + </attribute> + <attribute> <id>HB_MUTEX_TEST_LOCK</id> </attribute> <attribute> @@ -311,7 +347,7 @@ </attribute> <attribute> <id>OVERRIDES_ATTEMPTED_FLAG</id> - </attribute> + </attribute> <attribute> <id>PDA_CAPTURED_THREAD_REG_ARRAY_ADDR</id> </attribute> @@ -324,6 +360,18 @@ <attribute> <id>PDA_THREAD_REG_STATE_ENTRY_FORMAT</id> </attribute> + <attribute> + <id>PHYS_PRES_ASSERTED</id> + </attribute> + <attribute> + <id>PHYS_PRES_FAKE_ASSERT</id> + </attribute> + <attribute> + <id>PHYS_PRES_REQUEST_OPEN_WINDOW</id> + </attribute> + <attribute> + <id>SBE_ARCH_DUMP_ADDR</id> + </attribute> </targetTypeExtension> <targetTypeExtension> diff --git a/src/usr/targeting/common/xmltohb/xmltohb.pl b/src/usr/targeting/common/xmltohb/xmltohb.pl index b3370906e..339c26960 100755 --- a/src/usr/targeting/common/xmltohb/xmltohb.pl +++ b/src/usr/targeting/common/xmltohb/xmltohb.pl @@ -8,6 +8,7 @@ # # Contributors Listed Below - COPYRIGHT 2012,2019 # [+] International Business Machines Corp. +# [+] YADRO # # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -26,10 +27,7 @@ # # Purpose: -# Author: Nick Bofferding -# Last Updated: 09/09/2011 -# -# Version: 1.0 +# Process the attribute xml files, generate code, create binaries, etc # # Change Log ********************************************************** # @@ -363,17 +361,17 @@ if( !($cfgSrcOutputDir =~ "none") ) writeFapi2PlatAttrMacrosHeaderFileFooter ($fapi2PlatAttrMacrosHeaderFile); close $fapi2PlatAttrMacrosHeaderFile; - open(ATTR_ATTRERRL_C_FILE,">$cfgSrcOutputDir"."errludattribute.C") + open(ATTR_ATTRERRL_C_FILE,">$cfgSrcOutputDir"."errludattribute_gen.C") or croak ("Attribute errlog C file: \"$cfgSrcOutputDir" - . "errludattribute.C\" could not be opened."); + . "errludattribute_gen.C\" could not be opened."); my $attrErrlCFile = *ATTR_ATTRERRL_C_FILE; writeAttrErrlCFile($attributes,$attrErrlCFile); close $attrErrlCFile; mkdir("$cfgSrcOutputDir/errl"); - open(ATTR_ATTRERRL_H_FILE,">$cfgSrcOutputDir"."errl/errludattribute.H") + open(ATTR_ATTRERRL_H_FILE,">$cfgSrcOutputDir"."errl/errludattributeP_gen.H") or croak ("Attribute errlog H file: \"$cfgSrcOutputDir" - . "errl/errludattribute.H\" could not be opened."); + . "errl/errludattributeP_gen.H\" could not be opened."); my $attrErrlHFile = *ATTR_ATTRERRL_H_FILE; writeAttrErrlHFile($attributes,$attrErrlHFile); close $attrErrlHFile; @@ -1018,32 +1016,30 @@ sub validateAttributes { my($attributes) = @_; my %elements = ( ); - $elements{"id"} = { required => 1, isscalar => 1}; - $elements{"description"} = { required => 1, isscalar => 1}; - $elements{"persistency"} = { required => 1, isscalar => 1}; - $elements{"fspOnly"} = { required => 0, isscalar => 0}; - $elements{"hbOnly"} = { required => 0, isscalar => 0}; - $elements{"readable"} = { required => 0, isscalar => 0}; - $elements{"simpleType"} = { required => 0, isscalar => 0}; - $elements{"complexType"} = { required => 0, isscalar => 0}; - $elements{"nativeType"} = { required => 0, isscalar => 0}; - $elements{"writeable"} = { required => 0, isscalar => 0}; - $elements{"hasStringConversion"} - = { required => 0, isscalar => 0}; - $elements{"hwpfToHbAttrMap"} - = { required => 0, isscalar => 0}; - $elements{"display-name"} = { required => 0, isscalar => 1}; - $elements{"virtual"} = { required => 0, isscalar => 0}; - $elements{"tempAttribute"} = { required => 0, isscalar => 0}; - $elements{"serverwizReadonly"} = { required => 0, isscalar => 0}; - $elements{"serverwizShow"} = { required => 0, isscalar => 1}; - $elements{"global"} = { required => 0, isscalar => 0}; - $elements{"range"} = { required => 0, isscalar => 0}; - $elements{"ignoreEkb"} = { required => 0, isscalar => 0}; - $elements{"mrwRequired"} = { required => 0, isscalar => 0}; + $elements{"id"} = { required => 1, isscalar => 1}; + $elements{"description"} = { required => 1, isscalar => 1}; + $elements{"persistency"} = { required => 1, isscalar => 1}; + $elements{"fspOnly"} = { required => 0, isscalar => 0}; + $elements{"hbOnly"} = { required => 0, isscalar => 0}; + $elements{"readable"} = { required => 0, isscalar => 0}; + $elements{"simpleType"} = { required => 0, isscalar => 0}; + $elements{"complexType"} = { required => 0, isscalar => 0}; + $elements{"nativeType"} = { required => 0, isscalar => 0}; + $elements{"writeable"} = { required => 0, isscalar => 0}; + $elements{"hasStringConversion"} = { required => 0, isscalar => 0}; + $elements{"hwpfToHbAttrMap"} = { required => 0, isscalar => 0}; + $elements{"display-name"} = { required => 0, isscalar => 1}; + $elements{"virtual"} = { required => 0, isscalar => 0}; + $elements{"tempAttribute"} = { required => 0, isscalar => 0}; + $elements{"serverwizReadonly"} = { required => 0, isscalar => 0}; + $elements{"serverwizShow"} = { required => 0, isscalar => 1}; + $elements{"global"} = { required => 0, isscalar => 0}; + $elements{"range"} = { required => 0, isscalar => 0}; + $elements{"ignoreEkb"} = { required => 0, isscalar => 0}; + $elements{"mrwRequired"} = { required => 0, isscalar => 0}; # do NOT export attribute & its associated enum to serverwiz - $elements{"no_export"} = { required => 0, isscalar => 0}; + $elements{"no_export"} = { required => 0, isscalar => 0}; foreach my $attribute (@{$attributes->{attribute}}) { @@ -2438,6 +2434,9 @@ print $outFile <<VERBATIM; // STD #include <stdint.h> #include <stdlib.h> +#ifdef __HOSTBOOT_MODULE +#include <array> +#endif VERBATIM foreach my $attribute (@{$attributes->{attribute}}) @@ -2541,12 +2540,11 @@ sub writeTraitFileTraits { $traits .= " fspAccessible,"; } - chop($traits); - # Build value type my $type = ""; my $dimensions = ""; + my $stdArrAddOn = ""; # Only used if attr holds array type if(exists $attribute->{simpleType}) { my $simpleType = $attribute->{simpleType}; @@ -2569,11 +2567,26 @@ sub writeTraitFileTraits { if( (exists $simpleType->{array}) && ($simpleTypeProperties->{$typeName}{supportsArray}) ) { - my @bounds = split(/,/,$simpleType->{array}); - foreach my $bound (@bounds) + + my @revBounds = reverse split(/,/,$simpleType->{array}); + + for my $idx (0 .. $#revBounds) { - $dimensions .= "[$bound]"; + $dimensions = "[@revBounds[$idx]]$dimensions"; + + # Creating std::array, even if multi-dimensional + if ($idx == 0) + { + $stdArrAddOn = "std::array<$type, " + ."@revBounds[$idx]>"; + } + else + { + $stdArrAddOn = "std::array<$stdArrAddOn, " + ."@revBounds[$idx]>"; + } } + } if(exists $simpleType->{string}) @@ -2611,6 +2624,8 @@ sub writeTraitFileTraits { . "$attribute->{id}."); } + chop($traits); + # if it already exists skip it if( !exists($attrValHash{$attribute->{id}})) { @@ -2625,6 +2640,13 @@ sub writeTraitFileTraits { print $outFile " public:\n"; print $outFile " enum {",$traits," };\n"; print $outFile " typedef ", $type, " Type$dimensions;\n"; + if ($stdArrAddOn ne "") + { + # Append typedef for std::array if attr holds array value + print $outFile "#ifdef __HOSTBOOT_MODULE\n"; + print $outFile " typedef $stdArrAddOn TypeStdArr;\n"; + print $outFile "#endif\n"; + } print $outFile "};\n\n"; $typedefs .= "// Type aliases and/or sizes for ATTR_" @@ -2637,6 +2659,14 @@ sub writeTraitFileTraits { $typedefs .= "typedef " . $type . " ATTR_" . "$attribute->{id}" . "_type" . $dimensions . ";\n"; + if ($stdArrAddOn ne "") + { + $typedefs .= "#ifdef __HOSTBOOT_MODULE\n"; + $typedefs .= "typedef $stdArrAddOn " + ."ATTR_$attribute->{id}_typeStdArr;\n"; + $typedefs .= "#endif\n"; + } + # If a string, append max # of characters for the string if( (exists $attribute->{simpleType}) && (exists $attribute->{simpleType}->{string})) @@ -2718,14 +2748,6 @@ VERBATIM sub writeAttrErrlCFile { my($attributes,$outFile) = @_; - #First setup the includes and function definition - print $outFile "#include <stdint.h>\n"; - print $outFile "#include <stdio.h>\n"; - print $outFile "#include <string.h>\n"; - print $outFile "#include <errl/errludattribute.H>\n"; - print $outFile "#include <errl/errlreasoncodes.H>\n"; - print $outFile "#include <targeting/common/targetservice.H>\n"; - print $outFile "#include <targeting/common/trace.H>\n"; print $outFile "\n"; print $outFile "namespace ERRORLOG\n"; print $outFile "{\n"; @@ -2742,52 +2764,38 @@ sub writeAttrErrlCFile { print $outFile "\n"; print $outFile " switch (i_attr) {\n"; - print $outFile " case (ATTR_SERIAL_NUMBER): { //simpleType:uint, :int...\n"; - print $outFile " //TRACDCOMP( g_trac_errl, \"ErrlUserDetailsAttribute: SERIAL_NUMBER entry\");\n"; - print $outFile " AttributeTraits<ATTR_SERIAL_NUMBER>::Type tmp;\n"; - print $outFile " if( iv_pTarget->tryGetAttr<ATTR_SERIAL_NUMBER>(tmp) ) {\n"; - print $outFile " tmpBuffer = new char[sizeof(tmp)];\n"; - print $outFile " memcpy(tmpBuffer, &tmp, sizeof(tmp));\n"; - print $outFile " attrSize = sizeof(tmp);\n"; - print $outFile " }\n"; - print $outFile " break;\n"; - print $outFile " }\n"; - print $outFile " case (ATTR_PART_NUMBER): { //simpleType:uint, :int...\n"; - print $outFile " //TRACDCOMP( g_trac_errl, \"ErrlUserDetailsAttribute: PART_NUMBER entry\");\n"; - print $outFile " AttributeTraits<ATTR_PART_NUMBER>::Type tmp;\n"; - print $outFile " if( iv_pTarget->tryGetAttr<ATTR_PART_NUMBER>(tmp) ) {\n"; - print $outFile " tmpBuffer = new char[sizeof(tmp)];\n"; - print $outFile " memcpy(tmpBuffer, &tmp, sizeof(tmp));\n"; - print $outFile " attrSize = sizeof(tmp);\n"; - print $outFile " }\n"; - print $outFile " break;\n"; - print $outFile " }\n"; - print $outFile " case (ATTR_PEC_PCIE_HX_KEYWORD_DATA): { //simpleType:uint, :int...\n"; - print $outFile " //TRACDCOMP( g_trac_errl, \"ErrlUserDetailsAttribute: PEC_PCIE_HX_KEYWORD_DATA entry\");\n"; - print $outFile " AttributeTraits<ATTR_PEC_PCIE_HX_KEYWORD_DATA>::Type tmp;\n"; - print $outFile " if( iv_pTarget->tryGetAttr<ATTR_PEC_PCIE_HX_KEYWORD_DATA>(tmp) ) {\n"; - print $outFile " tmpBuffer = new char[sizeof(tmp)];\n"; - print $outFile " memcpy(tmpBuffer, &tmp, sizeof(tmp));\n"; - print $outFile " attrSize = sizeof(tmp);\n"; - print $outFile " }\n"; - print $outFile " break;\n"; - print $outFile " }\n"; - print $outFile "#if 0 //\@fixme-RTC:152874\n"; + # List of attributes we want to explicitly support + my @allowed_attributes = ( + "SERIAL_NUMBER", + "PART_NUMBER", + "PEC_PCIE_HX_KEYWORD_DATA", + "ECID", + "HUID", + ); - # loop through every attribute to make the swith/case + # loop through every attribute to make the switch/case foreach my $attribute (@{$attributes->{attribute}}) { + my $skippedattr = 0; + if( grep { $_ eq $attribute->{id} } @allowed_attributes ) + { + print "Allowing $attribute->{id}\n"; + } + else + { + print $outFile "#if 0 //\@fixme-RTC:152874\n"; + $skippedattr = 1; + } + # things we'll skip: if(!(exists $attribute->{readable}) || # write-only attributes - !(exists $attribute->{writeable}) || # read-only attributes (exists $attribute->{simpleType} && ( (exists $attribute->{simpleType}->{hbmutex}) || (exists $attribute->{simpleType}->{hbrecrusivemutex}) || (exists $attribute->{simpleType}->{fspmutex}))) # mutex attributes ) { print $outFile " case (ATTR_",$attribute->{id},"): { break; }\n"; - next; } # any complicated types just get dumped as raw hex binary elsif(exists $attribute->{complexType}) { @@ -2872,6 +2880,11 @@ sub writeAttrErrlCFile { print $outFile " break;\n"; print $outFile " }\n"; } + + if( $skippedattr ) + { + print $outFile "#endif //\@fixme-RTC:152874\n"; + } } print $outFile " default: { //Shouldn't be anything here!!\n"; @@ -2879,7 +2892,6 @@ sub writeAttrErrlCFile { print $outFile " break;\n"; print $outFile " }\n"; - print $outFile "#endif //\@fixme-RTC:152874\n"; print $outFile " } //switch\n"; print $outFile "\n"; @@ -2898,45 +2910,6 @@ sub writeAttrErrlCFile { print $outFile "}\n"; print $outFile "\n"; - # build constructor that dumps 1 attribute - print $outFile "\n"; - print $outFile "//------------------------------------------------------------------------------\n"; - print $outFile "ErrlUserDetailsAttribute::ErrlUserDetailsAttribute(\n"; - print $outFile " const Target * i_pTarget, uint32_t i_attr)\n"; - print $outFile " : iv_pTarget(i_pTarget), iv_dataSize(0)\n"; - print $outFile "{\n"; - print $outFile " // Set up ErrlUserDetails instance variables\n"; - print $outFile " iv_CompId = ERRL_COMP_ID;\n"; - print $outFile " iv_Version = 1;\n"; - print $outFile " iv_SubSection = ERRL_UDT_ATTRIBUTE;\n"; - print $outFile " // override the default of false\n"; - print $outFile " iv_merge = true;\n"; - print $outFile "\n"; - print $outFile " // first, write out the HUID\n"; - print $outFile " addData(ATTR_HUID);\n"; - print $outFile " if (i_attr != ATTR_HUID) {\n"; - print $outFile " addData(i_attr);\n"; - print $outFile " }\n"; - print $outFile "}\n"; - print $outFile "\n"; - - # build constructor that dumps all attributes - print $outFile "//------------------------------------------------------------------------------\n"; - print $outFile "ErrlUserDetailsAttribute::ErrlUserDetailsAttribute(\n"; - print $outFile " const Target * i_pTarget)\n"; - print $outFile " : iv_pTarget(i_pTarget), iv_dataSize(0)\n"; - print $outFile "{\n"; - print $outFile " // Set up ErrlUserDetails instance variables\n"; - print $outFile " iv_CompId = ERRL_COMP_ID;\n"; - print $outFile " iv_Version = 1;\n"; - print $outFile " iv_SubSection = ERRL_UDT_ATTRIBUTE;\n"; - print $outFile " // override the default of false\n"; - print $outFile " iv_merge = true;\n"; - print $outFile "\n"; - print $outFile " dumpAll();\n"; - print $outFile "}\n"; - print $outFile "\n"; - # build internal function that dumps all attributes print $outFile "//------------------------------------------------------------------------------\n"; print $outFile "void ErrlUserDetailsAttribute::dumpAll()\n"; @@ -2967,10 +2940,7 @@ sub writeAttrErrlCFile { print $outFile "\n"; - print $outFile "//------------------------------------------------------------------------------\n"; - print $outFile "ErrlUserDetailsAttribute::~ErrlUserDetailsAttribute()\n"; - print $outFile "{ }\n"; - print $outFile "} // namespace\n"; + print $outFile "} // namespace\n\n"; } # sub writeAttrErrlCFile @@ -2980,44 +2950,7 @@ sub writeAttrErrlCFile { sub writeAttrErrlHFile { my($attributes,$outFile) = @_; - #First setup the includes and function definition - print $outFile "\n"; - print $outFile "#ifndef ERRL_UDATTRIBUTE_H\n"; - print $outFile "#define ERRL_UDATTRIBUTE_H\n"; - print $outFile "\n"; - print $outFile "#if !defined(PARSER) && !defined(LOGPARSER)\n"; - print $outFile "\n"; - print $outFile "#include <errl/errluserdetails.H>\n"; - print $outFile "\n"; - print $outFile "namespace TARGETING // Forward reference\n"; - print $outFile "{ class Target; }\n"; - print $outFile "\n"; - print $outFile "namespace ERRORLOG\n"; - print $outFile "{\n"; - print $outFile "class ErrlUserDetailsAttribute : public ErrlUserDetails {\n"; - print $outFile "public:\n"; - print $outFile "\n"; - print $outFile " ErrlUserDetailsAttribute(const TARGETING::Target * i_pTarget, uint32_t i_attr);\n"; - print $outFile " ErrlUserDetailsAttribute(const TARGETING::Target * i_pTarget);\n"; - print $outFile " void addData(uint32_t i_attr);\n"; - print $outFile " virtual ~ErrlUserDetailsAttribute();\n"; - print $outFile "\n"; - print $outFile "private:\n"; - print $outFile "\n"; - print $outFile " // Disabled\n"; - print $outFile " ErrlUserDetailsAttribute(const ErrlUserDetailsAttribute &);\n"; - print $outFile " ErrlUserDetailsAttribute & operator=(const ErrlUserDetailsAttribute &);\n"; - print $outFile "\n"; - print $outFile " // internal function\n"; - print $outFile " void dumpAll();\n"; - print $outFile "\n"; - print $outFile " const TARGETING::Target * iv_pTarget;\n"; - print $outFile " uint32_t iv_dataSize;\n"; - print $outFile "};\n"; - print $outFile "}\n"; - print $outFile "#else // if LOGPARSER defined\n"; - print $outFile "\n"; - print $outFile "#include \"errluserdetails.H\"\n"; + # Included by errludattributeP.H print $outFile "\n"; print $outFile "namespace ERRORLOG\n"; print $outFile "{\n"; @@ -3048,8 +2981,9 @@ sub writeAttrErrlHFile { print $outFile " for (; (l_ptr + sizeof(uint32_t)) <= ((uint8_t*)i_pBuffer + i_buflen); )\n"; print $outFile " {\n"; print $outFile " // first 4 bytes is the attr enum\n"; - print $outFile " uint32_t attrEnum = ntohl(*(uint32_t *)l_ptr);\n"; + print $outFile " uint32_t attrEnum = ntohl(UINT32_FROM_PTR(l_ptr));\n"; print $outFile " l_ptr += sizeof(attrEnum);\n"; + print $outFile " char* tmplabel = NULL;\n"; print $outFile "\n"; print $outFile " switch (attrEnum) {\n"; @@ -3179,21 +3113,21 @@ sub writeAttrErrlHFile { elsif (exists $attribute->{simpleType}->{uint16_t}) { print $outFile " l_traceEntry.resize(10+offset + $total_count * 7);\n"; print $outFile " for (uint32_t i = 0;i<$total_count;i++) {\n"; - print $outFile " sprintf(&(l_traceEntry[offset+i*7]), \"0x%.4X \", ntohs(*(((uint16_t *)l_ptr)+i)));\n"; + print $outFile " sprintf(&(l_traceEntry[offset+i*7]), \"0x%.4X \", ntohs(UINT16_FROM_PTR(reinterpret_cast<const uint16_t*>(l_ptr) + i)));\n"; print $outFile " }\n"; print $outFile " l_ptr += $total_count * sizeof(uint16_t);\n"; } elsif (exists $attribute->{simpleType}->{uint32_t}) { print $outFile " l_traceEntry.resize(10+offset + $total_count * 11);\n"; print $outFile " for (uint32_t i = 0;i<$total_count;i++) {\n"; - print $outFile " sprintf(&(l_traceEntry[offset+i*11]), \"0x%.8X \", ntohl(*(((uint32_t *)l_ptr)+i)));\n"; + print $outFile " sprintf(&(l_traceEntry[offset+i*11]), \"0x%.8X \", ntohl(UINT32_FROM_PTR(reinterpret_cast<const uint32_t*>(l_ptr)+i)));\n"; print $outFile " }\n"; print $outFile " l_ptr += $total_count * sizeof(uint32_t);\n"; } elsif (exists $attribute->{simpleType}->{uint64_t}) { print $outFile " l_traceEntry.resize(10+offset + $total_count * 19);\n"; print $outFile " for (uint32_t i = 0;i<$total_count;i++) {\n"; - print $outFile " sprintf(&(l_traceEntry[offset+i*19]), \"0x%.16llX \", ntohll(*(((uint64_t *)l_ptr)+i)));\n"; + print $outFile " sprintf(&(l_traceEntry[offset+i*19]), \"0x%.16llX \", ntohll(UINT64_FROM_PTR(reinterpret_cast<const uint64_t*>(l_ptr)+i)));\n"; print $outFile " }\n"; print $outFile " l_ptr += $total_count * sizeof(uint64_t);\n"; } @@ -3207,21 +3141,21 @@ sub writeAttrErrlHFile { elsif (exists $attribute->{simpleType}->{int16_t}) { print $outFile " l_traceEntry.resize(10+offset + $total_count * 7);\n"; print $outFile " for (uint32_t i = 0;i<$total_count;i++) {\n"; - print $outFile " sprintf(&(l_traceEntry[offset+i*7]), \"0x%.4X \", ntohs(*(((int16_t *)l_ptr)+i)));\n"; + print $outFile " sprintf(&(l_traceEntry[offset+i*7]), \"0x%.4X \", ntohs(INT16_FROM_PTR(reinterpret_cast<const int16_t*>(l_ptr)+i)));\n"; print $outFile " }\n"; print $outFile " l_ptr += $total_count * sizeof(int16_t);\n"; } elsif (exists $attribute->{simpleType}->{int32_t}) { print $outFile " l_traceEntry.resize(10+offset + $total_count * 11);\n"; print $outFile " for (uint32_t i = 0;i<$total_count;i++) {\n"; - print $outFile " sprintf(&(l_traceEntry[offset+i*11]), \"0x%.8X \", ntohl(*(((int32_t *)l_ptr)+i)));\n"; + print $outFile " sprintf(&(l_traceEntry[offset+i*11]), \"0x%.8X \", ntohl(INT32_FROM_PTR(reinterpret_cast<const int32_t*>(l_ptr)+i)));\n"; print $outFile " }\n"; print $outFile " l_ptr += $total_count * sizeof(int32_t);\n"; } elsif (exists $attribute->{simpleType}->{int64_t}) { print $outFile " l_traceEntry.resize(10+offset + $total_count * 19);\n"; print $outFile " for (uint32_t i = 0;i<$total_count;i++) {\n"; - print $outFile " sprintf(&(l_traceEntry[offset+i*19]), \"0x%.16llX \", ntohll(*(((int64_t *)l_ptr)+i)));\n"; + print $outFile " sprintf(&(l_traceEntry[offset+i*19]), \"0x%.16llX \", ntohll(INT64_FROM_PTR(reinterpret_cast<const int64_t*>(l_ptr)+i)));\n"; print $outFile " }\n"; print $outFile " l_ptr += $total_count * sizeof(int64_t);\n"; } @@ -3296,7 +3230,9 @@ sub writeAttrErrlHFile { print $outFile " }\n"; } print $outFile " default: {\n"; - print $outFile " pLabel = \"unknown Attribute\";\n"; + print $outFile " tmplabel = new char[30];\n"; + print $outFile " sprintf( tmplabel, \"Unknown [0x%x]\", attrEnum );\n"; + print $outFile " pLabel = tmplabel;\n"; print $outFile " break;\n"; print $outFile " }\n"; print $outFile " } // switch\n"; @@ -3305,6 +3241,7 @@ sub writeAttrErrlHFile { print $outFile " if (pLabel != NULL) {\n"; print $outFile " i_parser.PrintString(pLabel, &(l_traceEntry[0]));\n"; print $outFile " }\n"; + print $outFile " if( tmplabel != NULL ) { delete[] tmplabel; }\n"; print $outFile " } // for\n"; print $outFile " } // parse\n\n"; print $outFile "private:\n"; @@ -3313,9 +3250,7 @@ sub writeAttrErrlHFile { print $outFile "ErrlUserDetailsParserAttribute(const ErrlUserDetailsParserAttribute &);\n"; print $outFile "ErrlUserDetailsParserAttribute & operator=(const ErrlUserDetailsParserAttribute &);\n"; print $outFile "};\n"; - print $outFile "} // namespace\n"; - print $outFile "#endif\n"; - print $outFile "#endif\n"; + print $outFile "} // namespace\n\n"; } # sub writeAttrErrlHFile ###### @@ -4016,11 +3951,11 @@ sub writeTargetErrlHFile { print $outFile " // first 4 are always the same\n"; print $outFile " if ((l_ptr32 + 4) <= (uint32_t *)((uint8_t*)i_pBuffer + i_buflen)) {\n"; - print $outFile " i_parser.PrintNumber( l_label, \"HUID = 0x%08X\", ntohl(*l_ptr32) );\n"; + print $outFile " i_parser.PrintNumber( l_label, \"HUID = 0x%08X\", ntohl(UINT32_FROM_PTR(l_ptr32)) );\n"; print $outFile " l_ptr32++;\n"; # find CLASS - print $outFile " switch (ntohl(*l_ptr32)) { // CLASS\n"; + print $outFile " switch (ntohl(UINT32_FROM_PTR(l_ptr32))) { // CLASS\n"; foreach my $enumerationType (@{$attributes->{enumerationType}}) { if( $enumerationType->{id} eq "CLASS" ) { @@ -4039,7 +3974,7 @@ sub writeTargetErrlHFile { print $outFile " l_ptr32++;\n"; # find TYPE - print $outFile " switch (ntohl(*l_ptr32)) { // TYPE\n"; + print $outFile " switch (ntohl(UINT32_FROM_PTR(l_ptr32))) { // TYPE\n"; foreach my $enumerationType (@{$attributes->{enumerationType}}) { if( $enumerationType->{id} eq "TYPE" ) { @@ -4058,7 +3993,7 @@ sub writeTargetErrlHFile { print $outFile " l_ptr32++;\n"; # find MODEL - print $outFile " switch (ntohl(*l_ptr32)) { // MODEL\n"; + print $outFile " switch (ntohl(UINT32_FROM_PTR(l_ptr32))) { // MODEL\n"; foreach my $enumerationType (@{$attributes->{enumerationType}}) { if( $enumerationType->{id} eq "MODEL" ) { @@ -4096,7 +4031,7 @@ sub writeTargetErrlHFile { } } - print $outFile " uint32_t l_pathType = ntohl(*l_ptr32);\n"; + print $outFile " uint32_t l_pathType = ntohl(UINT32_FROM_PTR(l_ptr32));\n"; print $outFile " if ((l_pathType == $attrPhysPath) || // ATTR_PHYS_PATH\n"; print $outFile " (l_pathType == $attrAffinityPath)) // ATTR_AFFINITY_PATH\n"; print $outFile " {\n"; |
