1 files changed, 123 insertions, 1 deletions

diff --git a/src/usr/isteps/nvdimm/nvdimmdd.H b/src/usr/isteps/nvdimm/nvdimmdd.H
index 4d599b38a..88bc388c0 100755
--- a/src/usr/isteps/nvdimm/nvdimmdd.H
+++ b/src/usr/isteps/nvdimm/nvdimmdd.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2019                             */
+/* Contributors Listed Below - COPYRIGHT 2019,2020                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -69,6 +69,7 @@ struct nvdimm_addr_t
     uint64_t devSize_KB;     // in kilobytes
     uint64_t chipCount;      // number of chips making up nvdimm device
     uint64_t writeCycleTime;  // in milliseconds
+    uint8_t  blockSize;  // size of write block supported for this nvdimm
     uint8_t  i2cMuxBusSelector;
     TARGETING::EntityPath i2cMuxPath;
 
@@ -86,12 +87,90 @@ struct nvdimm_addr_t
           devSize_KB(0),
           chipCount(0),
           writeCycleTime(0),
+          blockSize(0),
           i2cMuxBusSelector(I2C_MUX::NOT_APPLICABLE),
           i2cMuxPath()
     {
     }
 };
 
+/**
+ * @brief Structure of registers for error log traces
+ */
+struct nvdimm_reg_t
+{
+    uint8_t Module_Health;
+    uint8_t Module_Health_Status0;
+    uint8_t Module_Health_Status1;
+    uint8_t CSave_Status;
+    uint8_t CSave_Info;
+    uint8_t CSave_Fail_Info0;
+    uint8_t CSave_Fail_Info1;
+    uint8_t CSave_Timeout0;
+    uint8_t CSave_Timeout1;
+    uint8_t Error_Threshold_Status;
+    uint8_t NVDimm_Ready;
+    uint8_t NVDimm_CMD_Status0;
+    uint8_t Erase_Status;
+    uint8_t Erase_Fail_Info;
+    uint8_t Erase_Timeout0;
+    uint8_t Erase_Timeout1;
+    uint8_t Abort_CMD_Timeout;
+    uint8_t Set_ES_Policy_Status;
+    uint8_t Restore_Status;
+    uint8_t Restore_Fail_Info;
+    uint8_t Restore_Timeout0;
+    uint8_t Restore_Timeout1;
+    uint8_t Arm_Status;
+    uint8_t Arm_Fail_Info;
+    uint8_t Arm_Timeout0;
+    uint8_t Arm_Timeout1;
+    uint8_t Set_Event_Notification_Status;
+    uint8_t Encryption_Config_Status;
+
+    /**
+     *  @brief Construct a default nvdimm_reg_t
+     */
+    nvdimm_reg_t()
+        : Module_Health(0),
+          Module_Health_Status0(0),
+          Module_Health_Status1(0),
+          CSave_Status(0),
+          CSave_Info(0),
+          CSave_Fail_Info0(0),
+          CSave_Fail_Info1(0),
+          CSave_Timeout0(0),
+          CSave_Timeout1(0),
+          Error_Threshold_Status(0),
+          NVDimm_Ready(0),
+          NVDimm_CMD_Status0(0),
+          Erase_Status(0),
+          Erase_Fail_Info(0),
+          Erase_Timeout0(0),
+          Erase_Timeout1(0),
+          Abort_CMD_Timeout(0),
+          Set_ES_Policy_Status(0),
+          Restore_Status(0),
+          Restore_Fail_Info(0),
+          Restore_Timeout0(0),
+          Restore_Timeout1(0),
+          Arm_Status(0),
+          Arm_Fail_Info(0),
+          Arm_Timeout0(0),
+          Arm_Timeout1(0),
+          Set_Event_Notification_Status(0),
+          Encryption_Config_Status(0)
+    {
+    }
+
+    /**
+     *  @brief Default deconstructor of nvdimm_reg_t
+     */
+    ~nvdimm_reg_t() = default;
+
+};
+
+
 /*
  * @brief Miscellaneous enums for NVDIMM
  */
@@ -138,6 +217,49 @@ errlHndl_t nvdimmPerformOp( DeviceFW::OperationType i_opType,
                             int64_t i_accessType,
                             va_list i_args );
 
+/**
+*
+* @brief Route the read/write operator (i_opType) to the correct
+*        nvdimmReadReg/nvdimmWriteReg call.
+*
+* @details This is essentially a wrapper around the nvdimmPerformOp method
+*          which is called via the nvdimmReadReg/nvdimmWriteReg call. This
+*          ensures that the page is set correctly whenever a NVDIMM register
+*          is accessed.
+*
+* @param[in] i_opType - Operation Type - See DeviceFW::OperationType in
+*       driververif.H
+*
+* @param[in] i_target - Target device.
+*
+* @param[in/out] io_buffer
+*       INPUT: Pointer to the data that will be  written to the target
+*           device.
+*       OUTPUT: Pointer to the data that was read from the target device.
+*
+* @param[in/out] io_buflen
+*       INPUT: Length of the buffer to be written to target device.
+*       OUTPUT: Length of buffer that was written, or length of buffer
+*           to be read from target device.
+*
+* @param [in] i_accessType - Access Type - See DeviceFW::AccessType in
+*       usrif.H
+*
+* @param [in] i_args - This is an argument list for the device driver
+*       framework.  This argument list consists of the internal offset
+*       to use on the slave I2C device.
+*
+* @return errlHndl_t - NULL if successful, otherwise a pointer to the
+*       error log.
+*
+*/
+errlHndl_t nvdimmPerformOpRouter( DeviceFW::OperationType i_opType,
+                                  TARGETING::Target * i_target,
+                                  void * io_buffer,
+                                  size_t & io_buflen,
+                                  int64_t i_accessType,
+                                  va_list i_args );
+
 /*
  * @brief On the NV Controller, the page is selected by writing to offset
  *        0x00 with the page you would like to switch too. e.g. to activate