diff options
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training')
7 files changed, 303 insertions, 141 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C index c28ab4349..48529a4f4 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit_training_advanced.C,v 1.43 2014/03/10 16:30:18 jdsloat Exp $ +// $Id: mss_draminit_training_advanced.C,v 1.45 2015/02/09 15:54:37 sglancy Exp $ /* File is created by SARAVANAN SETHURAMAN on Thur 29 Sept 2011. */ //------------------------------------------------------------------------------ @@ -85,6 +85,8 @@ // 1.41 | abhijsau |16-JAN-14| removed EFF_DIMM_TYPE attribute // 1.42 | mjjones |17-Jan-14| Fixed layout and error handling for RAS Review // 1.43 | jdsloat |10-MAR-14| Edited comments +// 1.44 |preeragh |06-NOV-14| Added Sanity checks for wr_vref and rd_vref only at nominal and disabled any other +// 1.45 |sglancy |09-FEB-14| Responded to FW comments // This procedure Schmoo's DRV_IMP, SLEW, VREF (DDR, CEN), RCV_IMP based on attribute from effective config procedure // DQ & DQS Driver impedance, Slew rate, WR_Vref shmoo would call only write_eye shmoo for margin calculation @@ -646,11 +648,11 @@ fapi::ReturnCode wr_vref_shmoo(const fapi::Target & i_target_mba, uint32_t l_wr_dram_vref_schmoo[MAX_PORT] = {0}; uint32_t l_wr_dram_vref_nom_fc = 0; uint32_t l_wr_dram_vref_in = 0; - i_shmoo_type_valid = WR_EYE; // Hard coded - Temporary + i_shmoo_type_valid = MCBIST; uint8_t index = 0; uint8_t count = 0; - uint8_t shmoo_param_count = 0; + //uint8_t shmoo_param_count = 0; uint32_t l_left_margin = 0; uint32_t l_right_margin = 0; uint32_t l_left_margin_wr_vref_array[MAX_WR_VREF]= {0}; @@ -661,6 +663,19 @@ fapi::ReturnCode wr_vref_shmoo(const fapi::Target & i_target_mba, if (rc) return rc; rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WR_VREF_SCHMOO, &i_target_mba, l_wr_dram_vref_schmoo); if (rc) return rc; + + FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - WR_VREF - Check Sanity only at 500 +++++++++++++++++++++++++++"); + rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid, + &l_left_margin, &l_right_margin, + l_wr_dram_vref_in); + if(rc) return rc; + rc = set_attribute(i_target_mba); + if (rc) return rc; + + + + i_shmoo_type_valid = WR_EYE; + FAPI_INF("+++++++++++++++++WRITE DRAM VREF Shmoo Attributes Values+++++++++++++++"); FAPI_INF("DRAM_WR_VREF[0] = %d , DRAM_WR_VREF[1] = %d on %s", l_wr_dram_vref_nom[0], @@ -691,18 +706,14 @@ fapi::ReturnCode wr_vref_shmoo(const fapi::Target & i_target_mba, if (rc) return rc; l_wr_dram_vref_in = l_wr_dram_vref[i_port]; //FAPI_INF(" Calling Shmoo for finding Timing Margin:"); - if (shmoo_param_count) - { - rc = set_attribute(i_target_mba); - if (rc) return rc; - } + rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid, &l_left_margin, &l_right_margin, l_wr_dram_vref_in); if (rc) return rc; l_left_margin_wr_vref_array[index] = l_left_margin; l_right_margin_wr_vref_array[index] = l_right_margin; - shmoo_param_count++; + FAPI_INF("Wr Vref = %d ; Min Setup time = %d; Min Hold time = %d", wr_vref_array[index], l_left_margin_wr_vref_array[index], @@ -772,8 +783,8 @@ fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba, uint32_t l_rd_cen_vref_schmoo[MAX_PORT] = {0}; uint8_t index = 0; uint8_t count = 0; - uint8_t shmoo_param_count = 0; - i_shmoo_type_valid = RD_EYE; // Hard coded - Temporary + //uint8_t shmoo_param_count = 0; + //i_shmoo_type_valid = RD_EYE; // Hard coded - Temporary uint32_t l_left_margin = 0; uint32_t l_right_margin = 0; @@ -784,7 +795,19 @@ fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba, if (rc) return rc; rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RD_VREF_SCHMOO, &i_target_mba, l_rd_cen_vref_schmoo); if (rc) return rc; - + i_shmoo_type_valid = MCBIST; + + + FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - RD_VREF - Check Sanity only at 500000 +++++++++++++++++++++++++++"); + rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid, + &l_left_margin, &l_right_margin, + l_rd_cen_vref_in); + if(rc) return rc; + FAPI_INF(" Setup and Sanity - Check disabled from now on..... Continuing ....."); + rc = set_attribute(i_target_mba); + if (rc) return rc; + + i_shmoo_type_valid = RD_EYE; FAPI_INF("+++++++++++++++++CENTAUR VREF Read Shmoo Attributes values+++++++++++++++"); FAPI_INF("CEN_RD_VREF[0] = %d CEN_RD_VREF[1] = %d on %s", l_rd_cen_vref_nom[0], @@ -794,7 +817,7 @@ fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba, l_rd_cen_vref_schmoo[0], l_rd_cen_vref_schmoo[1], i_target_mba.toEcmdString()); - FAPI_INF("++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"); + FAPI_INF("+++++++++++++++++++++++++++++++++++++++++++++ Patch - Preet - RD_VREF +++++++++++++++++++++++++++"); if (l_rd_cen_vref_schmoo[i_port] == 0) { @@ -815,18 +838,14 @@ fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba, if (rc) return rc; l_rd_cen_vref_in = l_rd_cen_vref[i_port]; //FAPI_INF(" Calling Shmoo function to find out Timing Margin:"); - if (shmoo_param_count) - { - rc = set_attribute(i_target_mba); - if (rc) return rc; - } + rc = delay_shmoo(i_target_mba, i_port, i_shmoo_type_valid, &l_left_margin, &l_right_margin, l_rd_cen_vref_in); if (rc) return rc; l_left_margin_rd_vref_array[index] = l_left_margin; l_right_margin_rd_vref_array[index] = l_right_margin; - shmoo_param_count++; + FAPI_INF("Read Vref = %d ; Min Setup time = %d; Min Hold time = %d", rd_cen_vref_array[index], l_left_margin_rd_vref_array[index], @@ -863,12 +882,12 @@ fapi::ReturnCode rd_vref_shmoo(const fapi::Target & i_target_mba, l_rd_cen_vref_nom[i_port]); if (rc) return rc; } - FAPI_INF("Restoring mcbist setup attribute..."); - rc = reset_attribute(i_target_mba); - if (rc) return rc; - FAPI_INF("++++ Centaur Read Vref Shmoo function executed successfully ++++"); + + FAPI_INF("++++ Centaur Read Vref Shmoo function executed successfully ++++"); } - return rc; + FAPI_INF("Restoring mcbist setup attribute..."); + rc = reset_attribute(i_target_mba);if (rc) return rc; + return rc; } //------------------------------------------------------------------------------ diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C index 12eb74a82..580c1ef1b 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_generic_shmoo.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -23,7 +23,7 @@ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_generic_shmoo.C,v 1.87 2014/02/07 16:54:14 sasethur Exp $ +// $Id: mss_generic_shmoo.C,v 1.92 2014/12/16 11:36:15 sasethur Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM @@ -42,6 +42,8 @@ //------------------------------------------------------------------------------ // Version:|Author: | Date: | Comment: // --------|--------|---------|-------------------------------------------------- +// 1.92 |preeragh|15-Dec-14| Reverted Changes to v.1.87 +// 1.88 |rwheeler|10-Nov-14| Updated setup_mcbist for added variable. // 1.87 |abhijsau|7-Feb-14| added sanity check and error call out for schmoo's , removed printing of disconnected DQS. // 1.86 |abhijsau|24-Jan-14| Fixed code as per changes in access delay error check // 1.85 |mjjones |24-Jan-14| Fixed layout and error handling for RAS Review diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C index 718636c98..663b603e9 100755 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_mcbist.C,v 1.46 2014/01/23 19:35:58 sasethur Exp $ +// $Id: mss_mcbist.C,v 1.51 2015/02/09 15:54:47 sglancy Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM @@ -33,13 +33,18 @@ // *! DESCRIPTION : MCBIST Procedures // *! CONTEXT : // *! -// *! OWNER NAME : Devashikamani, Aditya Email: adityamd@in.ibm.com +// *! OWNER NAME : Hosmane, Preetham Email: preeragh@in.ibm.com // *! BACKUP : Sethuraman, Saravanan Email: saravanans@in.ibm.com // *!*************************************************************************** // CHANGE HISTORY: //------------------------------------------------------------------------------ // Version:|Author: | Date: | Comment: // --------|--------|--------|-------------------------------------------------- +// 1.51 |sglancy |02/09/15| Fixed FW comments and adjusted whitespace +// 1.50 |preeragh|01/16/15| Fixed FW comments +// 1.48 |preeragh|01/05/15| Added FW workaround for drand +// 1.48 |preeragh|12/16/14| Revert back changes. v.1.46 +// 1.47 |rwheeler|11/19/14|option to pass in rotate data seed // 1.46 |mjjones |01/20/14|RAS Review Updates // 1.45 |aditya |12/17/13|Added Simple_fix_rf // 1.43 |aditya |10/05/13|Updated fw comments @@ -739,7 +744,7 @@ fapi::ReturnCode cfg_mcb_dgen(const fapi::Target & i_target_mba, } } else if (i_datamode == MCBIST_2D_CUP_PAT8) - { + { //FAPI_DBG(" Inside MCBIST_2D_CUP_PAT8 !"); l_var = 0xFFFFFFFFFFFFFFFFull; l_var1 = 0x0000000000000000ull; l_spare = 0xFFFF0000FFFF0000ull; @@ -944,7 +949,7 @@ fapi::ReturnCode cfg_mcb_dgen(const fapi::Target & i_target_mba, } if (l_random_flag == 1) - { + { //FAPI_DBG("Inside l_rand_flag !"); for (l_index = 0; l_index < MAX_BYTE; l_index++) { @@ -976,39 +981,104 @@ fapi::ReturnCode cfg_mcb_dgen(const fapi::Target & i_target_mba, } } } + + //struct drand48_data randBuffer; + //double l_rand_D = 0; + uint8_t l_rand_l = 0; + uint8_t l_rand_array[8] = {48,52,56,60,64,68,72,76}; + //uint64_t l_data_buffer_64_value = 0; - if (i_mcbrotate == 0) + // get the rotate value loaded into reg, if rotate value 0 / not defined the default to rotate =13 + if(i_mcbrotate == 0) { - l_rotnum = 13; // for random data generation - basic setup + FAPI_DBG("%s:i_mcbrotate == 0 , the l_rotnum is set to 13",i_target_mba.toEcmdString()); + l_rotnum = 13; // for random data generation - basic setup } else { l_rotnum = i_mcbrotate; } + rc_num = rc_num | l_data_buffer_64.flushTo0(); + // get the rotate data seed loaded into reg, if rotate data value = 0 / not defined the default rotate pttern is randomlly generated. - rc_num |= l_data_buffer_4.insert(l_rotnum, 0, 4, 0); - rc_num |= l_data_buffer_64.insert(l_data_buffer_4, 0, 4, 0); - rc_num |= l_data_buffer_16.insert(l_data_buffer1_4, 0, 4); - rc_num |= l_data_buffer_16.insert(l_data_buffer1_4, 4, 4); - rc_num |= l_data_buffer_16.insert(l_data_buffer1_4, 8, 4); - rc_num |= l_data_buffer_16.insert(l_data_buffer1_4, 12, 4); - rc_num |= l_data_buffer_64.insert(l_data_buffer_16, 4, 16, 0); - if (l_print == 0) + // generate the random number + FAPI_DBG("FW workaround for drand !"); + for(l_index1 = 0; l_index1 < 8; l_index1++) + { + //l_rand_8 = drand48_r(); + + //drand48_r(&randBuffer, &l_rand_D); + //l_rand_l = (uint8_t)l_rand_D; + //l_rand_l = static_cast<unsigned int>((l_rand_D * 100) + 0.5); + /*if(l_rand_l == 0x00) + { + l_rand_l = 0xFF; + } + */ + l_rand_l = l_rand_array[l_index1]; + FAPI_DBG("%s:Value of seed drand48_r : %02X",i_target_mba.toEcmdString(), l_rand_l ); + rc_num = rc_num | l_data_buffer_64.insert(l_rand_l,8*l_index1,8); // Source start in sn is given as 24 -- need to ask + + } + + if (rc_num) { - FAPI_INF("Clearing bit 20 of MBA01_MCBIST_MCBDRCRQ_0x030106bd to avoid inversion of data to the write data flow"); + FAPI_ERR( "cfg_mcb_dgen:"); // Error setting up buffers + rc.setEcmdError(rc_num); + return rc; } - rc_num |= l_data_buffer_64.clearBit(20); - if (rc_num) + + // load the mcbist and mba with rotnum and rotdata. + rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBDRSRQ_0x030106bc , l_data_buffer_64); if(rc) return rc;//added + if(l_mbaPosition == 0) { - FAPI_ERR("cfg_mcb_dgen:"); - rc.setEcmdError(rc_num); - return rc; + rc = fapiPutScom(i_target_centaur, 0x0201167F , l_data_buffer_64); if(rc) return rc; + //l_data_buffer_64_value = l_data_buffer_64.getDoubleWord (0); + //FAPI_INF("%s:Value of Rotate data seed %016llX for reg %08X",i_target_mba.toEcmdString(), l_data_buffer_64_value, l_mbs01_mcb_random[l_index] ); + + rc_num = l_data_buffer_16.insert(l_data_buffer_64,0,16); + rc = fapiGetScom(i_target_centaur, 0x02011680 , l_data_buffer_64); if(rc) return rc; + rc_num = rc_num | l_data_buffer_64.insert(l_rotnum,0,4,4); + rc_num = rc_num | l_data_buffer_64.insert(l_data_buffer_16,4,16); + if (rc_num) + { + FAPI_ERR( "cfg_mcb_dgen:"); // Error setting up buffers + rc.setEcmdError(rc_num); + return rc; + } + rc = fapiPutScom(i_target_centaur, 0x02011680 , l_data_buffer_64); if(rc) return rc; + + } + else + { + rc = fapiPutScom(i_target_centaur, 0x0201177F , l_data_buffer_64); if(rc) return rc;//added + //l_data_buffer_64_value = l_data_buffer_64.getDoubleWord (0); + //FAPI_INF("%s:Value of Rotate data seed %016llX for reg %08X",i_target_mba.toEcmdString(), l_data_buffer_64_value, l_mbs23_mcb_random[l_index] ); + + rc_num = rc_num | l_data_buffer_16.insert(l_data_buffer_64,0,16); + rc = fapiGetScom(i_target_centaur, 0x02011780 , l_data_buffer_64); if(rc) return rc; + rc_num = rc_num | l_data_buffer_64.insert(l_rotnum,0,4,4); + rc_num = rc_num | l_data_buffer_64.insert(l_data_buffer_16,4,16); + if (rc_num) + { + FAPI_ERR( "cfg_mcb_dgen:"); // Error setting up buffers + rc.setEcmdError(rc_num); + return rc; + } + rc = fapiPutScom(i_target_centaur, 0x02011780 , l_data_buffer_64); if(rc) return rc; + } - rc = fapiPutScom(i_target_mba, MBA01_MCBIST_MCBDRCRQ_0x030106bd, l_data_buffer_64); - if (rc) return rc; - //if(l_print == 0)FAPI_INF("Function Name: cfg_mcb_dgen"); - //if(l_print == 0)FAPI_INF("Stop Time"); + FAPI_DBG("%s: Preet Clearing bit 20 of MBA01_MCBIST_MCBDRCRQ_0x030106bd to avoid inversion of data to the write data flow",i_target_mba.toEcmdString()); + rc_num = rc_num | l_data_buffer_64.clearBit(20,2); + if (rc_num) + { + FAPI_ERR( "cfg_mcb_dgen:"); // Error setting up buffers + rc.setEcmdError(rc_num); + return rc; + } + rc = fapiPutScom(i_target_mba,MBA01_MCBIST_MCBDRCRQ_0x030106bd,l_data_buffer_64); + return rc; } diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H index dc21c2cd1..d921ce3ca 100755 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_mcbist.H,v 1.42 2014/01/23 19:35:51 sasethur Exp $ +// $Id: mss_mcbist.H,v 1.46 2014/12/16 11:34:58 sasethur Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM @@ -33,13 +33,15 @@ // *! DESCRIPTION : MCBIST procedures // *! CONTEXT : // *! -// *! OWNER NAME : Devashikamani, Aditya Email: adityamd@in.ibm.com +// *! OWNER NAME : Preetham Hosmane Email: preeragh@in.ibm.com // *! BACKUP : Sethuraman, Saravanan Email: saravanans@in.ibm.com // *!*************************************************************************** // CHANGE HISTORY: //------------------------------------------------------------------------------- // Version:|Author: | Date: | Comment: // --------|--------|---------|-------------------------------------------------- +// 1.46 |preeragh|12/15/14| Revert back, removed rwheeler changes +// 1.43 |rwheeler|11/19/14|option to pass in rotate data seed // 1.42 |mjjones |01/20/14 |RAS Review Updates // 1.41 |aditya |12/17/13 |Updated mcb_error_map function parameters // 1.40 |rwheeler|10/29/13 |added W_ONLY_INFINITE_RAND test @@ -138,7 +140,11 @@ enum mcbist_test_mem SIMPLE_FIX_RF_RA, TEST_RR, TEST_RF, - W_ONLY_INFINITE_RAND + W_ONLY_INFINITE_RAND, + MCB_2D_CUP_SEQ, + MCB_2D_CUP_RAND, + SHMOO_STRESS_INFINITE, + HYNIX_1_COL }; enum mcbist_data_gen @@ -331,7 +337,7 @@ fapi::ReturnCode start_mcb(const fapi::Target & i_target_mba); fapi::ReturnCode setup_mcbist(const fapi::Target & i_target_mba, mcbist_byte_mask i_mcbbytemask, uint8_t i_mcbrotate, - struct Subtest_info l_sub_info[30]); + struct Subtest_info l_sub_info[30]); fapi::ReturnCode mcb_error_map_print(const fapi::Target & i_target_mba, ecmdDataBufferBase & l_mcb_fail_160, diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C index 562d6c4dc..af2d9648f 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_mcbist_address.C,v 1.14 2014/01/24 06:59:19 sasethur Exp $ +// $Id: mss_mcbist_address.C,v 1.17 2014/12/16 11:35:38 sasethur Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998, 2013 // *! All Rights Reserved -- Property of IBM @@ -33,13 +33,16 @@ // *! DESCRIPTION : MCBIST procedures // *! CONTEXT : // *! -// *! OWNER NAME : preeragh@in.ibm.com -// *! BACKUP : +// *! OWNER NAME : Preetham Hosmane | preeragh@in.ibm.com +// *! BACKUP : Saravanan Sethuraman // *!*************************************************************************** // CHANGE HISTORY: //------------------------------------------------------------------------------- // Version:|Author: | Date: | Comment: // --------|--------|---------|-------------------------------------------------- +// 1.17 |preeragh|15-Dec-14| Fix FW Review Comments +// 1.16 |rwheeler|10-Nov-14| Update to address_generation for custom address string +// 1.15 |preeragh|03-Nov-14| Fix for 128GB Schmoo // 1.14 |mjjones |20-Jan-13| RAS Review Updates // 1.13 |preet |18-Dec-13| Added 64K default for few addr_mode // 1.12 |preet |17-Dec-13| Added Addr modes @@ -120,16 +123,16 @@ fapi::ReturnCode address_generation(const fapi::Target & i_target_mba, if (rc) return rc; //------------------------------ Debug Stuff ------------------------------- - //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[0][0]); - //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[0][1]); - //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[1][0]); - //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[1][1]); - //------------------------------ Debug Stuff ------------------------------- - //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p0_dim0 is %d ",l_num_master_ranks[0][0]); - //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p0_dim1 is %d ",l_num_master_ranks[0][1]); - //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p1_dim0 is %d ",l_num_master_ranks[1][0]); - //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p1_dim1 is %d ",l_num_master_ranks[1][1]); - //------------------------------------------------------------------------------- + //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[0][0]); + //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[0][1]); + //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[1][0]); + //FAPI_INF("ATTR_EFF_NUM_RANKS_PER_DIMM is %d ",l_num_ranks_per_dimm[1][1]); + //------------------------------ Debug Stuff ------------------------------- + //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p0_dim0 is %d ",l_num_master_ranks[0][0]); + //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p0_dim1 is %d ",l_num_master_ranks[0][1]); + //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p1_dim0 is %d ",l_num_master_ranks[1][0]); + //FAPI_INF("ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM l_num_master_p1_dim1 is %d ",l_num_master_ranks[1][1]); + //------------------------------------------------------------------------------- l_num_ranks_p0_dim0 = l_num_ranks_per_dimm[0][0]; l_num_ranks_p0_dim1 = l_num_ranks_per_dimm[0][1]; @@ -319,7 +322,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, } rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; - i++; + ////FAPI_INF("Inside strcmp mr3"); l_sbit = 18; @@ -351,7 +354,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; //FAPI_INF("mr3 Invalid"); - i++; + } ////FAPI_INF("Inside strcmp mr2"); @@ -385,7 +388,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; //FAPI_INF("mr2 Invalid"); - i++; + } ////FAPI_INF("Inside strcmp mr1"); @@ -419,7 +422,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; //FAPI_INF("mr1 Invalid"); - i++; + } ////FAPI_INF("Inside strcmp mr0"); @@ -437,7 +440,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, } rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; - i++; + ////FAPI_INF("Value of i = %d",i); //FAPI_INF("mr0 Invalid\n"); @@ -455,7 +458,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, } rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; - i++; + //FAPI_INF("col2 Invalid"); ////FAPI_INF("Value of i = %d",i); ////FAPI_INF("Inside strcmp cl3"); @@ -488,7 +491,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 3 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp cl4"); @@ -522,7 +525,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 4 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp cl5"); @@ -555,7 +558,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 5 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp cl6"); @@ -589,7 +592,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 6 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp cl7"); @@ -623,7 +626,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 7 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp cl8"); @@ -657,7 +660,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 8 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp cl9"); @@ -691,7 +694,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106cb, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 9 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp cl11"); @@ -727,7 +730,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; FAPI_DBG("%s:Col 11 -- Invalid", i_target_mba.toEcmdString()); - i++; + } } else @@ -742,7 +745,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 11 -- Invalid"); - i++; + } ////FAPI_INF("Value of i = %d",i); @@ -776,7 +779,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("Col 13 Invalid"); - i++; + } ////FAPI_INF("Value of i = %d",i); ////FAPI_INF("Inside strcmp r0"); @@ -810,7 +813,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 0 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r1"); @@ -844,7 +847,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 1 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r2"); @@ -878,7 +881,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 2 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r3"); @@ -912,7 +915,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 3 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r4"); @@ -946,7 +949,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 4 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r5"); @@ -980,7 +983,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 5 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r6"); @@ -1014,7 +1017,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 6 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r7"); @@ -1048,7 +1051,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106ca, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 7 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r8"); @@ -1082,7 +1085,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 8 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r9"); @@ -1116,7 +1119,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 9 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r10"); @@ -1150,7 +1153,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 10 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r11"); @@ -1184,7 +1187,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 11 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r12"); @@ -1218,7 +1221,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 12 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r13"); @@ -1252,7 +1255,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 13 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r14"); @@ -1286,7 +1289,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 14 -- Invalid"); - i++; + } ////FAPI_INF("Inside strcmp r15"); @@ -1319,7 +1322,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; //FAPI_INF("row 15 -- Invalid"); - i++; + } ////FAPI_INF("Value of i = %d",i); ////FAPI_INF("Inside strcmp r16 and l_dram_rows = %d",l_dram_rows); @@ -1353,7 +1356,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, //FAPI_INF("Row 16 Invalid"); rc = fapiPutScom(i_target_mba, 0x030106c9, l_data_buffer_64); if (rc) return rc; - i++; + } ////FAPI_INF("Value of i = %d",i); @@ -1378,7 +1381,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; //FAPI_INF("sl2 Invalid"); - i++; + ////FAPI_INF("Value of i = %d",i); ////FAPI_INF("Inside strcmp sl1"); l_sbit = 30; @@ -1399,10 +1402,10 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, } rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; - i++; + //FAPI_INF("sl1 Invalid"); ////FAPI_INF("Value of i = %d",i); - ////FAPI_INF("Inside strcmp sl0"); + FAPI_INF("Inside strcmp sl0"); l_sbit = 24; l_value = i; rc = fapiGetScom(i_target_mba, 0x030106c8, l_data_buffer_64); @@ -1422,12 +1425,12 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106c8, l_data_buffer_64); if (rc) return rc; //FAPI_INF("sl0 Invalid"); - i++; + ////FAPI_INF("Value of i = %d",i); //------ Setting Start and end addr counters - //FAPI_INF("Debug - --------------- Setting Start and End Counters -----------\n"); + FAPI_INF("Debug - --------------- Setting Start and End Counters -----------\n"); rc_num = l_data_buffer_rd64.flushTo0(); if (rc_num) { @@ -1438,7 +1441,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, rc = fapiPutScom(i_target_mba, 0x030106d0, l_data_buffer_rd64); if (rc) return rc; l_value = i + 1; - //FAPI_INF("Setting end_addr Value of i = %d",i); + FAPI_INF("Setting end_addr Value of i = %d",i); rc_num = l_data_buffer_rd64.flushTo0(); //Calculate and set Valid bits for end_addr @@ -1498,7 +1501,7 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, { if (l_attr_addr_mode == 0) { - //FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- Few Address Mode --------",l_attr_addr_mode); + FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- Few Address Mode --------",l_attr_addr_mode); l_sbit = 32; rc_num = l_data_buffer_rd64.flushTo0(); l_start = 24; @@ -1523,9 +1526,9 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, } else if (l_attr_addr_mode == 1) { - //FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- QUARTER ADDRESSING Mode --------",l_attr_addr_mode); + FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- QUARTER ADDRESSING Mode --------",l_attr_addr_mode); l_readscom_value = l_readscom_value >> 2; - //FAPI_INF("Debug - Final End addr for 0x030106d2 = %016llX",l_readscom_value); + FAPI_INF("Debug - Final End addr for 0x030106d2 = %016llX",l_readscom_value); rc_num = l_data_buffer_rd64.setDoubleWord(0, l_readscom_value); if (rc_num) { @@ -1540,9 +1543,9 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, } else if (l_attr_addr_mode == 2) { - //FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- HALF ADDRESSING Mode --------",l_attr_addr_mode); + FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- HALF ADDRESSING Mode --------",l_attr_addr_mode); l_readscom_value = l_readscom_value >> 1; - //FAPI_INF("Debug - Final End addr for 0x030106d2 = %016llX",l_readscom_value); + FAPI_INF("Debug - Final End addr for 0x030106d2 = %016llX",l_readscom_value); rc_num = l_data_buffer_rd64.setDoubleWord(0, l_readscom_value); if (rc_num) { @@ -1557,8 +1560,8 @@ fapi::ReturnCode parse_addr(const fapi::Target & i_target_mba, } else { - //FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- FULL Address Mode --------",l_attr_addr_mode); - //FAPI_INF("Debug - Final End addr for 0x030106d2 = %016llX",l_readscom_value); + FAPI_INF("ATTR_EFF_SCHMOO_ADDR_MODE - %d ---- FULL Address Mode --------",l_attr_addr_mode); + FAPI_INF("Debug - Final End addr for 0x030106d2 = %016llX",l_readscom_value); rc = fapiPutScom(i_target_mba, 0x030106d2, l_data_buffer_rd64); if (rc) return rc; rc = fapiPutScom(i_target_mba, 0x030106d3, l_data_buffer_rd64); diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.H b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.H index df245c655..e4682f8b0 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.H +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_address.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_mcbist_address.H,v 1.5 2014/01/24 06:59:30 sasethur Exp $ +// $Id: mss_mcbist_address.H,v 1.7 2014/12/16 11:35:52 sasethur Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998, 2013 // *! All Rights Reserved -- Property of IBM @@ -42,6 +42,7 @@ // 1.3 |bellows |03-Apr-13| Added Id for firmware // 1.4 |preeragh|17-Dec-14| Removed unwanted header includes // 1.5 |mjjones |20-Jan-14| RAS Review Updates +// 1.7 |preeragh|15-Dec-14| Fix FW review comments // --------|--------|---------|-------------------------------------------------- //------------------------------------------------------------------------------ #ifndef MSS_MCBIST_ADDRESS_H diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C index f63046f33..9f6fddeea 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_mcbist_common.C,v 1.63 2014/02/07 17:17:46 sasethur Exp $ +// $Id: mss_mcbist_common.C,v 1.72 2015/02/09 15:54:57 sglancy Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM @@ -33,13 +33,21 @@ // *! DESCRIPTION : MCBIST Procedures // *! CONTEXT : // *! -// *! OWNER NAME : Devashikamani, Aditya Email: adityamd@in.ibm.com +// *! OWNER NAME : Preetham Hosmane Email: preeragh@in.ibm.com // *! BACKUP : Sethuraman, Saravanan Email: saravanans@in.ibm.com // *!*************************************************************************** // CHANGE HISTORY: //------------------------------------------------------------------------------ // Version:|Author: | Date: | Comment: // --------|--------|--------|-------------------------------------------------- +// 1.72 |sglancy |02/09/15|Fixed FW comments and addressed bugs +// 1.71 |preeragh|01/16/15|Fixed FW comments +// 1.70 |preeragh|12/16/14|Revert to FW build v.1.66 +// 1.68 |rwheeler|11/19/14|option to pass in rotate data seed +// 1.67 |sglancy |11/03/14|Fixed MCBIST to allow for a custom user generated address - removed forcing of l_new_addr=1 +// 1.66 |preeragh|11/03/14|Fix Addressing Map and enable Refresh +// 1.65 | | - | - +// 1.64 |rwheeler|10/24/14|Added thermal sensor data // 1.63 |adityamd|02/07/14|RAS Review Updates // 1.62 |mjjones |01/17/14|RAS Review Updates // 1.61 |aditya |01/15/14|Updated attr ATTR_EFF_CUSTOM_DIMM @@ -104,6 +112,7 @@ #include <fapiTestHwpDq.H> #include <dimmBadDqBitmapFuncs.H> + extern "C" { using namespace fapi; @@ -366,9 +375,10 @@ fapi::ReturnCode setup_mcbist(const fapi::Target & i_target_mba, uint8_t i_port = 0; uint8_t i_rank = 0; - //FAPI_DBG("%s:DEBUG-----Print----Address Gen ",i_target_mba.toEcmdString()); - rc = FAPI_ATTR_GET(ATTR_MCBIST_ADDR_MODES, &i_target_mba, l_new_addr); - if (rc) return rc; + FAPI_DBG("%s:DEBUG-----Print----Address Gen ",i_target_mba.toEcmdString()); + rc = FAPI_ATTR_GET(ATTR_MCBIST_ADDR_MODES, &i_target_mba, l_new_addr); + if (rc) return rc; + FAPI_DBG("DEBUG----- l_new_addr = %d ",l_new_addr); if (l_new_addr != 0) { @@ -380,7 +390,21 @@ fapi::ReturnCode setup_mcbist(const fapi::Target & i_target_mba, return rc; } } - + + FAPI_INF( "+++ Enabling Refresh +++"); + + rc = fapiGetScom(i_target_mba, 0x03010432, l_data_buffer_64); + if(rc) return rc; + //Bit 0 is enable + rc_num = rc_num | l_data_buffer_64.setBit(0); + if(rc_num) + { + rc.setEcmdError(rc_num); + return rc; + } + rc = fapiPutScom(i_target_mba, 0x03010432, l_data_buffer_64); + if(rc)return rc; + if (i_mcbbytemask != NONE) { rc = cfg_byte_mask(i_target_mba); @@ -585,9 +609,12 @@ fapi::ReturnCode poll_mcb(const fapi::Target & i_target_mba, uint32_t l_time_count = 0; uint8_t l_index = 0; uint8_t l_Subtest_no = 0; + uint64_t l_counter = 0x0ll; uint32_t i_mcbtest = 0; uint32_t l_st_ln = 0; uint32_t l_len = 0; + uint32_t l_dts_0 = 0; + uint32_t l_dts_1 = 0; uint8_t l_mcb_stop_on_fail = 0; mcbist_test_mem i_mcbtest1; Target i_target_centaur; @@ -628,12 +655,35 @@ fapi::ReturnCode poll_mcb(const fapi::Target & i_target_mba, l_time_count = 0; FAPI_DBG("%s:POLLING STATUS:POLLING IN PROGRESS...........", i_target_mba.toEcmdString()); + //rc = mss_cen_dimm_temp_sensor(i_target_centaur);if (rc) return rc; + rc = fapiGetScom(i_target_centaur, 0x02050000, l_data_buffer_64);if (rc) return rc; + rc_num = l_data_buffer_64.extractToRight(&l_dts_0, 0, 12); + rc_num = rc_num | l_data_buffer_64.extractToRight(&l_dts_1, 16, 12); + if (rc_num) + { + FAPI_ERR("Buffer error in function poll_mcb"); + rc.setEcmdError(rc_num); + return rc; + } + + FAPI_DBG("%s:DTS Thermal Sensor 0 Results %d", i_target_centaur.toEcmdString(), l_dts_0); + FAPI_DBG("%s:DTS Thermal Sensor 1 Results %d", i_target_centaur.toEcmdString(), l_dts_1); + if (i_flag == 0) { + // Read Counter Reg + + rc = fapiGetScom(i_target_mba, 0x030106b0, l_data_buffer_64); + if (rc) return rc; + l_counter = l_data_buffer_64.getDoubleWord (0); + + FAPI_DBG("%s:MCBCounter %016llX ", i_target_mba.toEcmdString(), l_counter); + + //Read Sub-Test number rc = fapiGetScom(i_target_centaur, 0x02011670, l_data_buffer_64); if (rc) return rc; l_st_ln = 3; - l_len = 4; + l_len = 5; rc_num = l_data_buffer_64.extract(&l_Subtest_no, l_st_ln, l_len); if (rc_num) { @@ -641,8 +691,8 @@ fapi::ReturnCode poll_mcb(const fapi::Target & i_target_mba, rc.setEcmdError(rc_num); return rc; } - - FAPI_DBG("%s:SUBTEST No %d ", i_target_mba.toEcmdString(), l_Subtest_no); + + //FAPI_DBG("%s:SUBTEST No %08x ", i_target_mba.toEcmdString(), l_Subtest_no); rc = FAPI_ATTR_GET(ATTR_MCBIST_TEST_TYPE, &i_target_mba, i_mcbtest); if (rc) return rc;//---------i_mcbtest------->run rc = mss_conversion_testtype(i_target_mba, i_mcbtest, i_mcbtest1); @@ -880,12 +930,10 @@ fapi::ReturnCode poll_mcb(const fapi::Target & i_target_mba, if (*o_mcb_status == 1) { - FAPI_ERR("poll_mcb:MCBIST failed"); - const fapi::Target & MBA_CHIPLET = i_target_mba; - FAPI_SET_HWP_ERROR(rc, RC_MSS_MCBIST_TIMEOUT_ERROR);//We decided to use TIMEOUT ERROR INSTEAD Of RC_MSS_MCBIST_FAILED - //FAPI_SET_HWP_ERROR(rc, RC_MSS_MCBIST_FAILED); - return rc; + FAPI_DBG("poll_mcb:MCBIST failed"); + return rc; } + return rc; } fapi::ReturnCode mcb_error_map_print(const fapi::Target & i_target_mba, @@ -1001,13 +1049,13 @@ fapi::ReturnCode mcb_error_map_print(const fapi::Target & i_target_mba, rc_num |= l_data_buffer1_64.flushTo0(); //FAPI_ERR("Buffer error in function mcb_error_map_print"); - - if (rc_num) //The check for if bad rc_num was misplaced - { - FAPI_ERR("Error in function mcb_error_map_print:"); - rc.setEcmdError(rc_num); - return rc; - } + + if (rc_num) //The check for if bad rc_num was misplaced + { + FAPI_ERR("Error in function mcb_error_map_print:"); + rc.setEcmdError(rc_num); + return rc; + } uint8_t l_num, io_num, l_inter, l_num2, l_index2; l_num = 0; @@ -2736,6 +2784,19 @@ fapi::ReturnCode mss_conversion_testtype(const fapi::Target & i_target_mba, i_mcbtest = W_ONLY_INFINITE_RAND; FAPI_INF("%s:TESTTYPE :W_ONLY_INFINITE_RAND", i_target_mba.toEcmdString()); break; + case 45: + i_mcbtest = MCB_2D_CUP_SEQ; + FAPI_INF("%s:TESTTYPE :MCB_2D_CUP_SEQ", i_target_mba.toEcmdString()); + break; + case 46: + i_mcbtest = MCB_2D_CUP_RAND; + FAPI_INF("%s:TESTTYPE :MCB_2D_CUP_RAND", i_target_mba.toEcmdString()); + break; + case 47: + i_mcbtest = SHMOO_STRESS_INFINITE; + FAPI_INF("%s:TESTTYPE :SHMOO_STRESS_INFINITE", i_target_mba.toEcmdString()); + break; + default: FAPI_INF("%s:Wrong Test_type,so using default test_type", i_target_mba.toEcmdString()); |
