diff options
Diffstat (limited to 'src/usr/dump/dumpCollect.C')
| -rw-r--r-- | src/usr/dump/dumpCollect.C | 233 |
1 files changed, 220 insertions, 13 deletions
diff --git a/src/usr/dump/dumpCollect.C b/src/usr/dump/dumpCollect.C index 6b95a2c2d..b85bcd28b 100644 --- a/src/usr/dump/dumpCollect.C +++ b/src/usr/dump/dumpCollect.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2019 */ +/* Contributors Listed Below - COPYRIGHT 2012,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -41,6 +41,8 @@ #include <dump/dumpif.H> #include <util/utiltce.H> #include <isteps/mem_utils.H> +#include <string.h> +#include <stdio.h> #include <sys/msg.h> // message Q's #include <mbox/mbox_queues.H> // @@ -54,7 +56,163 @@ TRAC_INIT(&g_trac_dump, "DUMP", 4*KILOBYTE); namespace DUMP { - +//////////// +// Define an SPR number to name str map. Note that this inverse of how +// the HWP uses it... so use the same mechanism/data - just inverse +std::map<uint32_t, const char*> SPRNUM_MAP; +typedef std::map<uint32_t, const char*>::iterator SPRNUM_MAP_IT; + +#define LIST_SPR_NAME_REG(_op_)\ + _op_(XER ,1 )\ + _op_(DSCR_RU ,3 )\ + _op_(LR ,8 )\ + _op_(CTR ,9 )\ + _op_(UAMR ,13 )\ + _op_(DSCR ,17 )\ + _op_(DSISR ,18 )\ + _op_(DAR ,19 )\ + _op_(DEC ,22 )\ + _op_(SDR1 ,25 )\ + _op_(SRR0 ,26 )\ + _op_(SRR1 ,27 )\ + _op_(CFAR ,28 )\ + _op_(AMR ,29 )\ + _op_(PIDR ,48 )\ + _op_(IAMR ,61 )\ + _op_(TFHAR ,128 )\ + _op_(TFIAR ,129 )\ + _op_(TEXASR ,130 )\ + _op_(TEXASRU ,131 )\ + _op_(CTRL_RU ,136 )\ + _op_(TIDR ,144 )\ + _op_(CTRL ,152 )\ + _op_(FSCR ,153 )\ + _op_(UAMOR ,157 )\ + _op_(GSR ,158 )\ + _op_(PSPB ,159 )\ + _op_(DPDES ,176 )\ + _op_(DAWR0 ,180 )\ + _op_(RPR ,186 )\ + _op_(CIABR ,187 )\ + _op_(DAWRX0 ,188 )\ + _op_(HFSCR ,190 )\ + _op_(VRSAVE ,256 )\ + _op_(SPRG3_RU ,259 )\ + _op_(TB ,268 )\ + _op_(TBU_RU ,269 )\ + _op_(SPRG0 ,272 )\ + _op_(SPRG1 ,273 )\ + _op_(SPRG2 ,274 )\ + _op_(SPRG3 ,275 )\ + _op_(SPRC ,276 )\ + _op_(SPRD ,277 )\ + _op_(CIR ,283 )\ + _op_(TBL ,284 )\ + _op_(TBU ,285 )\ + _op_(TBU40 ,286 )\ + _op_(PVR ,287 )\ + _op_(HSPRG0 ,304 )\ + _op_(HSPRG1 ,305 )\ + _op_(HDSISR ,306 )\ + _op_(HDAR ,307 )\ + _op_(SPURR ,308 )\ + _op_(PURR ,309 )\ + _op_(HDEC ,310 )\ + _op_(HRMOR ,313 )\ + _op_(HSRR0 ,314 )\ + _op_(HSRR1 ,315 )\ + _op_(TFMR ,317 )\ + _op_(LPCR ,318 )\ + _op_(LPIDR ,319 )\ + _op_(HMER ,336 )\ + _op_(HMEER ,337 )\ + _op_(PCR ,338 )\ + _op_(HEIR ,339 )\ + _op_(AMOR ,349 )\ + _op_(TIR ,446 )\ + _op_(PTCR ,464 )\ + _op_(USPRG0 ,496 )\ + _op_(USPRG1 ,497 )\ + _op_(UDAR ,499 )\ + _op_(SEIDR ,504 )\ + _op_(URMOR ,505 )\ + _op_(USRR0 ,506 )\ + _op_(USRR1 ,507 )\ + _op_(UEIR ,509 )\ + _op_(ACMCR ,510 )\ + _op_(SMFCTRL ,511 )\ + _op_(SIER_RU ,768 )\ + _op_(MMCR2_RU ,769 )\ + _op_(MMCRA_RU ,770 )\ + _op_(PMC1_RU ,771 )\ + _op_(PMC2_RU ,772 )\ + _op_(PMC3_RU ,773 )\ + _op_(PMC4_RU ,774 )\ + _op_(PMC5_RU ,775 )\ + _op_(PMC6_RU ,776 )\ + _op_(MMCR0_RU ,779 )\ + _op_(SIAR_RU ,780 )\ + _op_(SDAR_RU ,781 )\ + _op_(MMCR1_RU ,782 )\ + _op_(SIER ,784 )\ + _op_(MMCR2 ,785 )\ + _op_(MMCRA ,786 )\ + _op_(PMC1 ,787 )\ + _op_(PMC2 ,788 )\ + _op_(PMC3 ,789 )\ + _op_(PMC4 ,790 )\ + _op_(PMC5 ,791 )\ + _op_(PMC6 ,792 )\ + _op_(MMCR0 ,795 )\ + _op_(SIAR ,796 )\ + _op_(SDAR ,797 )\ + _op_(MMCR1 ,798 )\ + _op_(IMC ,799 )\ + _op_(BESCRS ,800 )\ + _op_(BESCRSU ,801 )\ + _op_(BESCRR ,802 )\ + _op_(BESCRRU ,803 )\ + _op_(EBBHR ,804 )\ + _op_(EBBRR ,805 )\ + _op_(BESCR ,806 )\ + _op_(LMRR ,813 )\ + _op_(LMSER ,814 )\ + _op_(TAR ,815 )\ + _op_(ASDR ,816 )\ + _op_(PSSCR_SU ,823 )\ + _op_(IC ,848 )\ + _op_(VTB ,849 )\ + _op_(LDBAR ,850 )\ + _op_(MMCRC ,851 )\ + _op_(PMSR ,853 )\ + _op_(PMMAR ,854 )\ + _op_(PSSCR ,855 )\ + _op_(L2QOSR ,861 )\ + _op_(WORC ,863 )\ + _op_(TRIG0 ,880 )\ + _op_(TRIG1 ,881 )\ + _op_(TRIG2 ,882 )\ + _op_(PMCR ,884 )\ + _op_(RWMR ,885 )\ + _op_(WORT ,895 )\ + _op_(PPR ,896 )\ + _op_(PPR32 ,898 )\ + _op_(TSCR ,921 )\ + _op_(TTR ,922 )\ + _op_(TRACE ,1006)\ + _op_(HID ,1008)\ + _op_(PIR ,1023)\ + _op_(NIA ,2000)\ + _op_(MSR ,2001)\ + _op_(CR ,2002)\ + _op_(FPSCR ,2003)\ + _op_(VSCR ,2004)\ + _op_(SLBE ,2005)\ + _op_(SLBV ,2006) + + +#define DO_SPRNUM_MAP(in_name, in_number)\ + SPRNUM_MAP[in_number] = #in_name; /////////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////////// @@ -107,6 +265,31 @@ errlHndl_t doDumpCollect(void) /////////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////////// +// Replace reg num with name +void replaceRegNumWithName( hostArchRegDataEntry *hostRegData ) +{ + char str[sizeof(reg_t)]; + + if(hostRegData->reg.type == DUMP_ARCH_REG_TYPE_GPR) + { + snprintf(str,sizeof(reg_t), "GPR%d\0", hostRegData->reg.num); + strncpy(hostRegData->reg.name, str, sizeof(reg_t)); + } + else if (hostRegData->reg.type == DUMP_ARCH_REG_TYPE_SPR) + { + if(SPRNUM_MAP.find(hostRegData->reg.num) != SPRNUM_MAP.end()) + { + strncpy(hostRegData->reg.name, SPRNUM_MAP[hostRegData->reg.num], sizeof(reg_t)); + } + //else unknown... leave as number for debug + } + //else unknown type... leave as number for debug + +} + + +/////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////////// // Returns the physical address corresponding to a PHYP MDST/MDRT entry void* getPhysAddr( uint64_t i_phypAddr ) { @@ -153,6 +336,9 @@ errlHndl_t copyArchitectedRegs(void) // Architected Reg Dump table struct pointers procDumpAreaEntry *procTableEntry = nullptr; + //Setup SPR num to string mapping + LIST_SPR_NAME_REG(DO_SPRNUM_MAP) + do { // Get the PROC_DUMP_AREA_TBL address from SPIRAH @@ -196,16 +382,30 @@ errlHndl_t copyArchitectedRegs(void) procTableEntry = reinterpret_cast<procDumpAreaEntry *>(procTableAddr); pDstAddrBase = getPhysAddr(procTableEntry->dstArrayAddr); vMapDstAddrBase = mm_block_map(pDstAddrBase, - procTableEntry->dstArraySize); + (ALIGN_PAGE(procTableEntry->dstArraySize) + PAGESIZE)); + + //Need to adjust actual virtual address due to mm_block_map only + //mapping on page boundary to account for non page aligned addresses + //from PHYP/OPAL + uint64_t tmpAddr = reinterpret_cast<uint64_t>(vMapDstAddrBase); + vMapDstAddrBase = reinterpret_cast<void*>(tmpAddr + + (procTableEntry->dstArrayAddr & (PAGESIZE-1))); // Map architected register reserved memory to VA addresses - uint64_t srcAddr = ISTEP::get_top_homer_mem_addr() - - VMM_ARCH_REG_DATA_SIZE_ALL_PROC - - VMM_ALL_HOMER_OCC_MEMORY_SIZE; + TARGETING::Target * l_sys = NULL; + TARGETING::targetService().getTopLevelTarget( l_sys ); + assert(l_sys != NULL); + auto srcAddr = + l_sys->getAttr<TARGETING::ATTR_SBE_ARCH_DUMP_ADDR>(); + pSrcAddrBase = reinterpret_cast<void * const>(srcAddr); vMapSrcAddrBase = mm_block_map(pSrcAddrBase, VMM_ARCH_REG_DATA_SIZE_ALL_PROC); + TRACDCOMP(g_trac_dump, "src address [0x%X] [%p], destArrayaddr" + " [%X] dest[%p] [%p]", srcAddr, vMapSrcAddrBase, + procTableEntry->dstArrayAddr, pDstAddrBase, vMapDstAddrBase); + // Get list of functional processor chips, in MPIPL path we // don't expect any deconfiguration TARGETING::TargetHandleList procChips; @@ -214,13 +414,13 @@ errlHndl_t copyArchitectedRegs(void) uint64_t dstTempAddr = reinterpret_cast<uint64_t>(vMapDstAddrBase); procTableEntry->capArraySize = 0; - for (const auto & procChip: procChips) + for (uint32_t procNum = 0; procNum < procChips.size(); procNum++) { - uint8_t procNum = procChip->getAttr<TARGETING::ATTR_POSITION>(); // Base addresses w.r.t PROC positions. This is static here // and used for reference below to calculate all other addresses uint64_t procSrcAddr = (reinterpret_cast<uint64_t>(vMapSrcAddrBase)+ procNum * VMM_ARCH_REG_DATA_PER_PROC_SIZE); + TRACDCOMP(g_trac_dump, "SBE Proc[%d] [%p]", procNum, procSrcAddr); sbeArchRegDumpProcHdr_t *sbeProcHdr = reinterpret_cast<sbeArchRegDumpProcHdr_t *>(procSrcAddr); @@ -294,7 +494,11 @@ errlHndl_t copyArchitectedRegs(void) hostArchRegDataHdr *hostHdr = reinterpret_cast<hostArchRegDataHdr *>(dstTempAddr); + TRACDCOMP(g_trac_dump, " Thread[%d] src[%p] dest[%p]", + idx, procSrcAddr, dstTempAddr); + // Fill thread header info + memset(hostHdr, 0x0, sizeof(hostHdr)); hostHdr->pir = sbeTdHdr->pir; hostHdr->coreState = sbeTdHdr->coreState; hostHdr->iv_regArrayHdr.hdatOffset = @@ -330,10 +534,16 @@ errlHndl_t copyArchitectedRegs(void) hostArchRegDataEntry *hostRegData = reinterpret_cast<hostArchRegDataEntry *>(dstTempAddr); - hostRegData->regType = sbeRegData->regType; - hostRegData->regNum = sbeRegData->regNum; + hostRegData->reg.type = sbeRegData->regType; + hostRegData->reg.num = sbeRegData->regNum; hostRegData->regVal = sbeRegData->regVal; + // If HOST type is PHYP replace register number with strings + if (TARGETING::is_phyp_load()) + { + replaceRegNumWithName(hostRegData); + } + dstTempAddr = reinterpret_cast<uint64_t>(dstTempAddr + sizeof(hostArchRegDataEntry)); //Update the SBE data source address to point to the @@ -367,9 +577,6 @@ errlHndl_t copyArchitectedRegs(void) procTableEntry->capArrayAddr = procTableEntry->dstArrayAddr; // Update the PDA Table Entries to Attribute to be fetched in istep 21 - TARGETING::TargetService& targetService = TARGETING::targetService(); - TARGETING::Target* l_sys = NULL; - targetService.getTopLevelTarget(l_sys); l_sys->setAttr<TARGETING::ATTR_PDA_THREAD_REG_STATE_ENTRY_FORMAT>( procTableEntry->threadRegVersion); l_sys->setAttr<TARGETING::ATTR_PDA_THREAD_REG_ENTRY_SIZE>( |
