summaryrefslogtreecommitdiffstats
path: root/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C
diff options
context:
space:
mode:
Diffstat (limited to 'src/usr/diag/prdf/common/plat/prdfPlatServices_common.C')
-rw-r--r--src/usr/diag/prdf/common/plat/prdfPlatServices_common.C92
1 files changed, 67 insertions, 25 deletions
diff --git a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C
index f99427d61..5cabaedc8 100644
--- a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C
+++ b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.C
@@ -48,7 +48,6 @@
#include <p9_io_xbus_pdwn_lanes.H>
#include <p9_io_xbus_clear_firs.H>
#include <p9_io_erepairAccessorHwpFuncs.H>
-#include <config.h>
#include <p9_io_cen_read_erepair.H>
#include <p9_io_cen_pdwn_lanes.H>
#include <p9_io_dmi_read_erepair.H>
@@ -695,6 +694,10 @@ uint32_t getBadDqBitmap( TargetHandle_t i_trgt, const MemRank & i_rank,
o_rc = __getBadDqBitmap<fapi2::TARGET_TYPE_MEM_PORT>( i_trgt,
i_rank, o_bitmap );
break;
+ case TYPE_OCMB_CHIP:
+ o_rc = __getBadDqBitmap<fapi2::TARGET_TYPE_OCMB_CHIP>( i_trgt,
+ i_rank, o_bitmap );
+ break;
default:
PRDF_ERR( PRDF_FUNC "Invalid trgt type" );
o_rc = FAIL;
@@ -777,6 +780,10 @@ uint32_t setBadDqBitmap( TargetHandle_t i_trgt, const MemRank & i_rank,
o_rc = __setBadDqBitmap<fapi2::TARGET_TYPE_MEM_PORT>( i_trgt,
i_rank, i_bitmap );
break;
+ case TYPE_OCMB_CHIP:
+ o_rc = __setBadDqBitmap<fapi2::TARGET_TYPE_OCMB_CHIP>( i_trgt,
+ i_rank, i_bitmap );
+ break;
default:
PRDF_ERR( PRDF_FUNC "Invalid trgt type" );
o_rc = FAIL;
@@ -872,6 +879,17 @@ void getDimmDqAttr<TYPE_MEM_PORT>( TargetHandle_t i_target,
} // end function getDimmDqAttr
template<>
+void getDimmDqAttr<TYPE_OCMB_CHIP>( TargetHandle_t i_target,
+ uint8_t (&o_dqMapPtr)[DQS_PER_DIMM] )
+{
+ PRDF_ASSERT( TYPE_OCMB_CHIP == getTargetType(i_target) );
+
+ // TODO RTC 210072 - Support for multiple ports per OCMB
+ TargetHandle_t memPort = getConnectedChild( i_target, TYPE_MEM_PORT, 0 );
+ getDimmDqAttr<TYPE_MEM_PORT>( memPort, o_dqMapPtr );
+}
+
+template<>
void getDimmDqAttr<TYPE_DIMM>( TargetHandle_t i_target,
uint8_t (&o_dqMapPtr)[DQS_PER_DIMM] )
{
@@ -947,15 +965,15 @@ int32_t mssGetSteerMux<TYPE_MBA>( TargetHandle_t i_mba, const MemRank & i_rank,
}
template<>
-int32_t mssGetSteerMux<TYPE_MEM_PORT>( TargetHandle_t i_memPort,
- const MemRank & i_rank,
- MemSymbol & o_port0Spare,
- MemSymbol & o_port1Spare,
- MemSymbol & o_eccSpare )
+int32_t mssGetSteerMux<TYPE_OCMB_CHIP>( TargetHandle_t i_ocmb,
+ const MemRank & i_rank,
+ MemSymbol & o_port0Spare,
+ MemSymbol & o_port1Spare,
+ MemSymbol & o_eccSpare )
{
int32_t o_rc = SUCCESS;
- /* TODO RTC 207273 - sparing support
+ /* TODO RTC 199032 - sparing support
// called by FSP code so can't just move to hostboot side
#ifdef __HOSTBOOT_MODULE
@@ -963,7 +981,7 @@ int32_t mssGetSteerMux<TYPE_MEM_PORT>( TargetHandle_t i_memPort,
uint8_t port0Spare, port1Spare, eccSpare;
- fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> fapiPort(i_memPort);
+ fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP> fapiPort(i_ocmb);
FAPI_INVOKE_HWP( errl, mss_check_steering, fapiPort,
i_rank.getMaster(), port0Spare, port1Spare, eccSpare );
@@ -971,15 +989,15 @@ int32_t mssGetSteerMux<TYPE_MEM_PORT>( TargetHandle_t i_memPort,
{
PRDF_ERR( "[PlatServices::mssGetSteerMux] mss_check_steering() "
"failed. HUID: 0x%08x rank: %d",
- getHuid(i_memPort), i_rank.getMaster() );
+ getHuid(i_ocmb), i_rank.getMaster() );
PRDF_COMMIT_ERRL( errl, ERRL_ACTION_REPORT );
o_rc = FAIL;
}
else
{
- o_port0Spare = MemSymbol::fromSymbol( i_memPort, i_rank, port0Spare );
- o_port1Spare = MemSymbol::fromSymbol( i_memPort, i_rank, port1Spare );
- o_eccSpare = MemSymbol::fromSymbol( i_memPort, i_rank, eccSpare );
+ o_port0Spare = MemSymbol::fromSymbol( i_ocmb, i_rank, port0Spare );
+ o_port1Spare = MemSymbol::fromSymbol( i_ocmb, i_rank, port1Spare );
+ o_eccSpare = MemSymbol::fromSymbol( i_ocmb, i_rank, eccSpare );
}
#endif
*/
@@ -1020,20 +1038,22 @@ int32_t mssSetSteerMux<TYPE_MBA>( TargetHandle_t i_mba, const MemRank & i_rank,
}
template<>
-int32_t mssSetSteerMux<TYPE_MEM_PORT>( TargetHandle_t i_memPort,
+int32_t mssSetSteerMux<TYPE_OCMB_CHIP>( TargetHandle_t i_memPort,
const MemRank & i_rank, const MemSymbol & i_symbol, bool i_x4EccSpare )
{
int32_t o_rc = SUCCESS;
- /* TODO RTC 207273 - sparing support
+ /* TODO RTC 199032 - sparing support
#ifdef __HOSTBOOT_MODULE
errlHndl_t errl = NULL;
fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> fapiPort(i_memPort);
+ TargetHandle_t dimm = getConnectedDimm( i_memPort, i_rank,
+ i_symbol.getPortSlct() );
uint8_t l_dramSymbol = PARSERUTILS::dram2Symbol<TYPE_MBA>(
i_symbol.getDram(),
- isDramWidthX4(i_memPort) );
+ isDramWidthX4(dimm) );
FAPI_INVOKE_HWP( errl, mss_do_steering, fapiPort,
i_rank.getMaster(), l_dramSymbol,
@@ -1105,7 +1125,9 @@ int32_t getDimmSpareConfig<TYPE_MEM_PORT>( TargetHandle_t i_memPort,
bool isFullByte = ( ENUM_ATTR_MEM_EFF_DIMM_SPARE_FULL_BYTE ==
o_spareConfig );
- bool isX4Dram = isDramWidthX4(i_memPort);
+
+ TargetHandle_t dimm = getConnectedDimm( i_memPort, i_rank, i_ps );
+ bool isX4Dram = isDramWidthX4(dimm);
if ( ( isX4Dram && isFullByte ) || ( !isX4Dram && !isFullByte ) )
{
@@ -1122,6 +1144,15 @@ int32_t getDimmSpareConfig<TYPE_MEM_PORT>( TargetHandle_t i_memPort,
}
template<>
+int32_t getDimmSpareConfig<TYPE_OCMB_CHIP>( TargetHandle_t i_ocmb,
+ MemRank i_rank, uint8_t i_ps, uint8_t & o_spareConfig )
+{
+ TargetHandle_t memPort = getConnectedChild( i_ocmb, TYPE_MEM_PORT, i_ps );
+ return getDimmSpareConfig<TYPE_MEM_PORT>( memPort, i_rank, i_ps,
+ o_spareConfig );
+}
+
+template<>
int32_t getDimmSpareConfig<TYPE_MBA>( TargetHandle_t i_mba, MemRank i_rank,
uint8_t i_ps, uint8_t & o_spareConfig )
{
@@ -1207,7 +1238,8 @@ uint32_t isDramSparingEnabled<TYPE_MEM_PORT>( TARGETING::TargetHandle_t i_trgt,
do
{
- const bool isX4 = isDramWidthX4( i_trgt );
+ TargetHandle_t dimm = getConnectedDimm( i_trgt, i_rank, i_ps );
+ const bool isX4 = isDramWidthX4( dimm );
if ( isX4 )
{
// Always an ECC spare in x4 mode.
@@ -1216,9 +1248,7 @@ uint32_t isDramSparingEnabled<TYPE_MEM_PORT>( TARGETING::TargetHandle_t i_trgt,
}
// Check for any DRAM spares.
- // TODO RTC 207273 - no TARGETING support for attr yet
- //uint8_t cnfg = TARGETING::MEM_EFF_DIMM_SPARE_NO_SPARE;
- uint8_t cnfg = 0;
+ uint8_t cnfg = TARGETING::MEM_EFF_DIMM_SPARE_NO_SPARE;
o_rc = getDimmSpareConfig<TYPE_MEM_PORT>( i_trgt, i_rank, i_ps, cnfg );
if ( SUCCESS != o_rc )
{
@@ -1226,9 +1256,7 @@ uint32_t isDramSparingEnabled<TYPE_MEM_PORT>( TARGETING::TargetHandle_t i_trgt,
"failed", getHuid(i_trgt), i_rank.getKey(), i_ps );
break;
}
- // TODO RTC 207273 - no TARGETING support for attr yet
- //o_spareEnable = (TARGETING::MEM_EFF_DIMM_SPARE_NO_SPARE; != cnfg);
- o_spareEnable = (0 != cnfg);
+ o_spareEnable = (TARGETING::MEM_EFF_DIMM_SPARE_NO_SPARE != cnfg);
}while(0);
@@ -1303,12 +1331,22 @@ uint32_t isSpareAvailable( TARGETING::TargetHandle_t i_trgt, MemRank i_rank,
if ( !dramSparingEnabled ) break;
// Get the current spares in hardware
+ TargetHandle_t steerTrgt = i_trgt;
MemSymbol sp0, sp1, ecc;
- o_rc = mssGetSteerMux<T>( i_trgt, i_rank, sp0, sp1, ecc );
+ if ( TYPE_MEM_PORT == T )
+ {
+ steerTrgt = getConnectedParent( i_trgt, TYPE_OCMB_CHIP );
+ o_rc = mssGetSteerMux<TYPE_OCMB_CHIP>( steerTrgt, i_rank, sp0, sp1,
+ ecc );
+ }
+ else
+ {
+ o_rc = mssGetSteerMux<T>( steerTrgt, i_rank, sp0, sp1, ecc );
+ }
if ( SUCCESS != o_rc )
{
PRDF_ERR( PRDF_FUNC "mssGetSteerMux(0x%08x,0x%02x) failed",
- getHuid(i_trgt), i_rank.getKey() );
+ getHuid(steerTrgt), i_rank.getKey() );
break;
}
@@ -1353,6 +1391,10 @@ template
uint32_t isSpareAvailable<TYPE_MBA>( TARGETING::TargetHandle_t i_trgt,
MemRank i_rank, uint8_t i_ps, bool & o_spAvail, bool & o_eccAvail );
+template
+uint32_t isSpareAvailable<TYPE_MEM_PORT>( TARGETING::TargetHandle_t i_trgt,
+ MemRank i_rank, uint8_t i_ps, bool & o_spAvail, bool & o_eccAvail );
+
//------------------------------------------------------------------------------
template<>
OpenPOWER on IntegriCloud