diff options
Diffstat (limited to 'src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule')
| -rw-r--r-- | src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule | 326 |
1 files changed, 326 insertions, 0 deletions
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule b/src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule new file mode 100644 index 000000000..9ea6b8376 --- /dev/null +++ b/src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule @@ -0,0 +1,326 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/usr/diag/prdf/common/plat/p9/p9_proc_common_regs.rule $ +# +# OpenPOWER HostBoot Project +# +# Contributors Listed Below - COPYRIGHT 2016,2018 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + +################################################################################ +# Additional registers for nimbus chip, not defined in XML +################################################################################ + + ############################################################################ + # N3 Chiplet PBEXTFIR + ############################################################################ + + # External checkstop register - Used for FFDC and Fabric sorting only + # Any attention generated from this FIR register indicates that there was a + # checkstop attention raised on another chip. Currently, we do not do any + # additional analysis in this FIR because we assume we will get an interrup + # from the offending chip. This FIR will set PB_CHIPLET_FIR[2] which is + # currently ignored. + + register PBEXTFIR + { + name "PowerBus EH EXTFIR"; + scomaddr 0x05011C2E; + capture group default; + }; + + ############################################################################ + # Misc Registers + ############################################################################ + + register PB_CENT_MODE + { + name "PB.COM.PB_CENT_MODE"; + scomaddr 0x05011C0A; + capture group PbCentMode; + }; + + register TP_LFIR_AND + { + name "EH.TPCHIP.TPC.LOCAL_FIR_AND"; + scomaddr 0x0104000b; + capture group never; + access write_only; + }; + + ############################################################################ + # Non-FIR Registers + ############################################################################ + + register CFAM_FSI_STATUS + { + name "TPC.FSI.FSI2PIB.STATUS"; + scomaddr 0x00001007; + capture group never; + }; + + register CFAM_FSI_GP7 + { + name "TPC.FSI.FSI_MAILBOX.FSXCOMP.FSXLOG.FSIGP7"; + scomaddr 0x00002816; + capture group never; + }; + + register TODWOF + { + name "Time of Day / WOF Counter"; + scomaddr 0x00040020; + capture group default; + }; + + register TP_ERROR_REG + { + name "TP PCB Slave error reg"; + scomaddr 0x010F001F; + capture group PllFIRs; + }; + + register TP_CONFIG_REG + { + name "TP PCB Slave config reg"; + scomaddr 0x010F001E; + capture group PllFIRs; + }; + + register XBUS_ERROR_REG + { + name "XBUS PCB Slave error reg"; + scomaddr 0x060F001F; + capture group PllFIRs; + }; + + register XBUS_CONFIG_REG + { + name "XBUS PCB Slave config reg"; + scomaddr 0x060F001E; + capture group PllFIRs; + }; + + ############################################################################ + # P9 PROC target HDCT additions (open power chkstop analysis) + ############################################################################ + + register OCC_ERROR_REPORT_REG + { + name "OCC ERROR REPORT REG"; + scomaddr 0x0101080a; + capture group default; + }; + + register PB_ERROR_REPORT + { + name "PB ERROR REPORT REG"; + scomaddr 0x020110a1; + capture group default; + }; + + register PB_PTY_ERROR_REPORT + { + name "PB PTY ERROR REPORT REG"; + scomaddr 0x020110a2; + capture group default; + }; + + register DMA_CERR_0 + { + name "DMA CERR 0"; + scomaddr 0x02011057; + capture group default; + }; + + register DMA_CERR_1 + { + name "DMA CERR 1"; + scomaddr 0x02011058; + capture group default; + }; + + register PB_CENT_CR_ERROR + { + name "PB CENT CR ERROR"; + scomaddr 0x05011c2c; + capture group default; + }; + + register PBA_ERR_REPORT_0 + { + name "PBA ERROR REPORT 0"; + scomaddr 0x0501284c; + capture group default; + }; + + register PBA_ERR_REPORT_1 + { + name "PBA ERROR REPORT 1"; + scomaddr 0x0501284d; + capture group default; + }; + + register PBA_ERR_REPORT_2 + { + name "PBA ERROR REPORT 2"; + scomaddr 0x0501284e; + capture group default; + }; + + register PB_PTY_ERR_REPORT + { + name "PB PTY ERROR REPORT"; + scomaddr 0x05012C22; + capture group default; + }; + + register TOD_SLAVE_PATH_CTRL + { + name "TOD SLAVE PATH CTRL"; + scomaddr 0x00040005; + capture group default; + }; + + register TOD_INTERNAL_PATH_CTRL + { + name "TOD INTERNAL PATH CTRL"; + scomaddr 0x00040006; + capture group default; + }; + + register TOD_CONFIG_CTRL + { + name "TOD Prim Sec Config Control"; + scomaddr 0x00040007; + capture group default; + }; + + register TOD_PSS_MSS_STATUS + { + name "TOD PSS MSS Status Reg"; + scomaddr 0x00040008; + capture group default; + }; + + register TOD_MASTER_PATH_STATUS + { + name "TOD Master Path Status Reg"; + scomaddr 0x00040009; + capture group default; + }; + + register TOD_MASTER_PATH0_STEP_STEERING + { + name "TOD Master Path0 Step Steering"; + scomaddr 0x0004000E; + capture group default; + }; + + register TOD_MASTER_PATH1_STEP_STEERING + { + name "TOD Master Path1 Step Steering"; + scomaddr 0x0004000F; + capture group default; + }; + + register TOD_TRACE_DATASET_1 + { + name "TOD Trace Dataset 1"; + scomaddr 0x0004001D; + capture group default; + }; + + register TOD_TRACE_DATASET_2 + { + name "TOD Trace Dataset 2"; + scomaddr 0x0004001E; + capture group default; + }; + + register TOD_TRACE_DATASET_3 + { + name "TOD Trace Dataset 3"; + scomaddr 0x0004001F; + capture group default; + }; + + register OSC_ERROR_HOLD + { + name "OSC ERROR HOLD"; + scomaddr 0x01020019; + capture group default; + }; + + register OSC_ERROR_MASK + { + name "OSC ERROR MASK"; + scomaddr 0x0102001A; + capture group default; + }; + + register OSC_ERROR_MODE + { + name "OSC ERROR MODE"; + scomaddr 0x0102001B; + capture group default; + }; + + register TOD_FSM_REGISTER + { + name "TOD FSM Register"; + scomaddr 0x00040024; + capture group default; + }; + + register TOD_TX_TTYPE_CTRL_REG + { + name "TOD TX TType Ctrl reg"; + scomaddr 0x00040027; + capture group default; + }; + + register TOD_RX_TTYPE_CTRL_REG + { + name "TOD RX TType Ctrl reg"; + scomaddr 0x00040029; + capture group default; + }; + + register TOD_ERROR_INTERRUPTS + { + name "TOD Error and Interrupts"; + scomaddr 0x00040030; + capture group default; + }; + + register TOD_CERR_REPORT + { + name "TOD CERR Report"; + scomaddr 0x00040032; + capture group default; + }; + + register TOD_ROUTE_ERRORS_TO_CORE + { + name "TOD Route Errors to Core"; + scomaddr 0x00040033; + capture group default; + }; + |
