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authorBenjamin Weisenbeck <bweisenb@us.ibm.com>2018-02-05 14:17:36 -0600
committerZane C. Shelley <zshelle@us.ibm.com>2018-02-07 10:50:02 -0500
commitffc30dcc91342c28a6255a86341ae40317300345 (patch)
treef52c86220393f73c404d7b62b5d7713e7c2cafb5 /src
parenta8b5cf5530265ee5f12cecd5bd9f7719d588a9a7 (diff)
downloadtalos-hostboot-ffc30dcc91342c28a6255a86341ae40317300345.tar.gz
talos-hostboot-ffc30dcc91342c28a6255a86341ae40317300345.zip
PRD: Disabling FSP clearing/masking of FIRs to avoid blacklist violations
Change-Id: I116a504aff84defd163abc6f4b970ef4859511f7 CQ: SW413344 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53397 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Caleb N Palmer <cnpalmer@us.ibm.com> Reviewed-by: Brian J Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53493 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
-rwxr-xr-xsrc/usr/diag/prdf/common/framework/register/prdfResetErrorRegister.C5
-rw-r--r--src/usr/diag/prdf/common/rule/prdfRuleMetaData.C5
2 files changed, 9 insertions, 1 deletions
diff --git a/src/usr/diag/prdf/common/framework/register/prdfResetErrorRegister.C b/src/usr/diag/prdf/common/framework/register/prdfResetErrorRegister.C
index b1da2c317..5895f4697 100755
--- a/src/usr/diag/prdf/common/framework/register/prdfResetErrorRegister.C
+++ b/src/usr/diag/prdf/common/framework/register/prdfResetErrorRegister.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2017 */
+/* Contributors Listed Below - COPYRIGHT 2012,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -116,6 +116,8 @@ ResetAndMaskErrorRegister::Reset(const BitKey & bit_list,
SyncAnalysis (sdc); //Add call to Sync SDC
#endif
+ // We're not allowed to clear black-listed FIRs from the FSP
+ #if defined(__HOSTBOOT_MODULE) || defined(ESW_SIM_COMPILE)
rc = ErrorRegisterMask::Reset(bit_list,error); //undo filters
// Mask registers as needed, if at threshold.
@@ -136,6 +138,7 @@ ResetAndMaskErrorRegister::Reset(const BitKey & bit_list,
{
rc |= i->op->Reset(bit_list, error, i->read, i->write);
}
+ #endif
}
return rc;
diff --git a/src/usr/diag/prdf/common/rule/prdfRuleMetaData.C b/src/usr/diag/prdf/common/rule/prdfRuleMetaData.C
index ae4fcb973..acff8809f 100644
--- a/src/usr/diag/prdf/common/rule/prdfRuleMetaData.C
+++ b/src/usr/diag/prdf/common/rule/prdfRuleMetaData.C
@@ -469,6 +469,10 @@ int32_t RuleMetaData::Analyze( STEP_CODE_DATA_STRUCT & i_serviceData,
#ifndef __HOSTBOOT_MODULE
SyncAnalysis (i_sdc); //mp01 Add call to Sync SDC
#endif
+
+ // We're not allowed to clear black-listed FIRs from the FSP
+ #if defined(__HOSTBOOT_MODULE) || defined(ESW_SIM_COMPILE)
+
// Call mask plugin.
if (i_serviceData.service_data->IsAtThreshold())
{
@@ -485,6 +489,7 @@ int32_t RuleMetaData::Analyze( STEP_CODE_DATA_STRUCT & i_serviceData,
(*l_reset)( l_chipAnalyzed,
PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(i_serviceData)
); //@pw01
+ #endif
}
// Additional error isolation for HWPs, if needed.
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