Add i2c support for PMIC target

Change-Id: I5bad7798945997f64b1b9cd7743096fb6cf6b637
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74638
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77094
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

3 files changed, 170 insertions, 0 deletions

diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/i2c/i2c_pmic.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/i2c/i2c_pmic.H
index cc4fccfcf..1ba222402 100644
--- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/i2c/i2c_pmic.H
+++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/i2c/i2c_pmic.H
@@ -22,3 +22,139 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
+///
+/// @file pmic_i2c.H
+/// @brief PMIC I2C utility function declarations
+///
+// *HWP HWP Owner: Mark Pizzutillo <Mark.Pizzutillo@ibm.com>
+// *HWP HWP Backup: Andre A. Marin <aamarin@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 1
+// *HWP Consumed by: HB:FSP
+
+#ifndef _MSS_I2C_PMIC_H_
+#define _MSS_I2C_PMIC_H_
+
+#include <fapi2.H>
+#include <i2c_access.H>
+
+#include <vector>
+#include <lib/utils/pmic_consts.H>
+#include <generic/memory/lib/utils/pos.H>
+#include <generic/memory/lib/utils/c_str.H>
+
+namespace mss
+{
+namespace pmic
+{
+namespace i2c
+{
+
+///
+/// @brief Perform a register write operation on the given PMIC chip
+/// @param[in] i_target the PMIC target
+/// @param[in] i_addr address to write to
+/// @param[in] i_data_buffer buffer of data to write to the register
+/// @return FAPI2_RC_SUCCESS iff okay
+///
+inline fapi2::ReturnCode reg_write(const fapi2::Target<fapi2::TARGET_TYPE_PMIC>& i_target,
+                                   const uint8_t i_addr,
+                                   const fapi2::buffer<uint8_t>& i_data_buffer)
+{
+    std::vector<uint8_t> l_command;
+    l_command.push_back(i_addr);
+    l_command.push_back(uint8_t(i_data_buffer));
+
+    // Use fapi2 putI2c interface to execute command
+    FAPI_TRY(fapi2::putI2c(i_target, l_command),
+             "putI2C returned error for WRITE operation to 0x%.8X on PMIC %s",
+             i_addr, mss::c_str(i_target));
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Perform a register read operation on the given PMIC chip
+/// @param[in] i_target the PMIC target
+/// @param[in] i_addr address to read
+/// @param[out] o_data_buffer buffer of data we will write the contents of the register to
+/// @return FAPI2_RC_SUCCESS iff okay
+///
+inline fapi2::ReturnCode reg_read(const fapi2::Target<fapi2::TARGET_TYPE_PMIC>& i_target,
+                                  const uint8_t i_addr,
+                                  fapi2::buffer<uint8_t>& o_data_buffer)
+{
+    std::vector<uint8_t> l_data;
+    std::vector<uint8_t> l_command;
+    l_command.push_back(i_addr);
+
+    FAPI_TRY(fapi2::getI2c(i_target, mss::pmic::i2c::sizes::DATA_LENGTH, l_command, l_data),
+             "i2C read failed on %s for address 0x%8x", mss::c_str(i_target), i_addr);
+
+    // Flush o_data_buffer to avoid stale data
+    o_data_buffer.flush<0>();
+
+    FAPI_ASSERT( (l_data.size() == mss::pmic::i2c::sizes::DATA_LENGTH),
+                 fapi2::I2C_PMIC_INVALID_READ_SIZE()
+                 .set_TARGET(i_target)
+                 .set_ADDRESS(i_addr)
+                 .set_SIZE_REQUESTED(mss::pmic::i2c::sizes::DATA_LENGTH)
+                 .set_SIZE_RETURNED(l_data.size()),
+                 "PMIC I2C read returned vector size of %u. Expected %u",
+                 l_data.size(), mss::pmic::i2c::sizes::DATA_LENGTH,
+                 mss::c_str(i_target) );
+
+    o_data_buffer = l_data[0];
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Perform a register write operation after flipping the data buffer
+/// @param[in] i_target the PMIC target
+/// @param[in] i_addr address to write to
+/// @param[in] i_data_buffer buffer of data to flip & write to the register
+/// @return FAPI2_RC_SUCCESS iff okay
+/// @note flips buffer from fapi2-style [0:7] to PMIC-style [7:0]
+///
+inline fapi2::ReturnCode reg_write_reverse_buffer(const fapi2::Target<fapi2::TARGET_TYPE_PMIC>& i_target,
+        const uint8_t i_addr,
+        const fapi2::buffer<uint8_t>& i_data_buffer)
+{
+    // Copy as to not modify original referenced buffer
+    auto l_reg_buffer_copy = i_data_buffer;
+    l_reg_buffer_copy.reverse();
+
+    FAPI_TRY(mss::pmic::i2c::reg_write(i_target, i_addr, l_reg_buffer_copy));
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+///
+/// @brief Perform a register read operation on the given PMIC chip, then flip the data buffer
+/// @param[in] i_target the PMIC target
+/// @param[in] i_addr address to read
+/// @param[out] o_data_buffer buffer of data we will write the contents of the register to
+/// @return FAPI2_RC_SUCCESS iff okay
+/// @note flips buffer from PMIC-style [7:0], to fapi2-style [0:7]
+///
+inline fapi2::ReturnCode reg_read_reverse_buffer(const fapi2::Target<fapi2::TARGET_TYPE_PMIC>& i_target,
+        const uint8_t i_addr,
+        fapi2::buffer<uint8_t>& o_data_buffer)
+{
+    FAPI_TRY(mss::pmic::i2c::reg_read(i_target, i_addr, o_data_buffer));
+    o_data_buffer.reverse();
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+} // i2c
+} // pmic
+} // mss
+
+#endif
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H
index c8410ea6d..c2c434a2c 100644
--- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H
+++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H
@@ -36,6 +36,8 @@
 #ifndef MSS_PMIC_CONSTS_H
 #define MSS_PMIC_CONSTS_H
 
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+
 namespace mss
 {
 namespace pmic
@@ -184,7 +186,18 @@ enum ffdc_codes
     SET_DRAM_MODULE_HEIGHT                  = 0x1086,
 };
 
+namespace i2c
+{
+
+///
+/// @brief common PMIC sizes
+///
+enum sizes
+{
+    DATA_LENGTH = 1,
+};
 
+}// i2c
 } // pmic
 } // mss
 
diff --git a/src/import/chips/ocmb/common/procedures/xml/error_info/pmic_errors.xml b/src/import/chips/ocmb/common/procedures/xml/error_info/pmic_errors.xml
index e340edaa7..fea79e82c 100644
--- a/src/import/chips/ocmb/common/procedures/xml/error_info/pmic_errors.xml
+++ b/src/import/chips/ocmb/common/procedures/xml/error_info/pmic_errors.xml
@@ -23,4 +23,25 @@
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
 <hwpErrors>
+
+  <hwpError>
+    <rc>RC_I2C_PMIC_INVALID_READ_SIZE</rc>
+    <description>
+       The number of bytes returned from the read did not match
+       the expected value.
+    </description>
+    <ffdc>TARGET</ffdc>
+    <ffdc>ADDRESS</ffdc>
+    <ffdc>SIZE_RETURNED</ffdc>
+    <ffdc>SIZE_REQUESTED</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>MEDIUM</priority>
+    </callout>
+    <callout>
+      <target>TARGET</target>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+
 </hwpErrors>