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authorJoe McGill <jmcgill@us.ibm.com>2017-05-02 13:21:24 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-05-22 09:54:45 -0400
commit6a3b0f5ac79e28f358e83464065fda5f85b810cb (patch)
treec5e5291be9d7df5384fad1395a26c8891d0addb3 /src
parent529ea1d267e13c9556dc490a5587de9a0d6e3e4e (diff)
downloadtalos-hostboot-6a3b0f5ac79e28f358e83464065fda5f85b810cb.tar.gz
talos-hostboot-6a3b0f5ac79e28f358e83464065fda5f85b810cb.zip
security -- split p9_chiplet_scominit and p9_chiplet_enable_ridi isteps
p9_chiplet_scominit, move from istep 8 to istep 10 shift content required for XBUS, fabric establishment into p9_chiplet_fabric_scominit, to be called in istep 8 p9_chiplet_enable_ridi, move from istep 8 to istep 10 shift content required for XBUS establishment into p9_xbus_enable_ridi, to be called in istep CMVC-Coreq: 1023401 Change-Id: I4c60e4c41211976c7919a603ab679357cc4af106 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39956 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Brent Wieman <bwieman@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39960 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C166
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H69
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.mk27
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C96
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H6
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.C11
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.H6
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.C98
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.H60
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.mk26
-rw-r--r--src/include/usr/isteps/istep08list.H206
-rw-r--r--src/include/usr/isteps/istep10list.H208
-rw-r--r--src/include/usr/isteps/istep16list.H8
-rw-r--r--src/usr/isteps/istep08/call_proc_chiplet_fabric_scominit.C163
-rw-r--r--src/usr/isteps/istep08/call_proc_xbus_enable_ridi.C111
-rw-r--r--src/usr/isteps/istep08/makefile75
-rw-r--r--src/usr/isteps/istep10/call_host_rng_bist.C (renamed from src/usr/isteps/istep08/call_p9_rng_init_phase1.C)16
-rw-r--r--src/usr/isteps/istep10/call_host_set_voltages.C (renamed from src/usr/isteps/istep08/call_host_set_voltages.C)4
-rw-r--r--src/usr/isteps/istep10/call_proc_abus_scominit.C (renamed from src/usr/isteps/istep08/call_proc_abus_scominit.C)6
-rw-r--r--src/usr/isteps/istep10/call_proc_cen_ref_clk_enable.C (renamed from src/usr/isteps/istep08/call_proc_cen_ref_clk_enable.C)6
-rw-r--r--src/usr/isteps/istep10/call_proc_chiplet_enable_ridi.C (renamed from src/usr/isteps/istep08/call_proc_chiplet_enable_ridi.C)6
-rw-r--r--src/usr/isteps/istep10/call_proc_chiplet_scominit.C (renamed from src/usr/isteps/istep08/call_proc_chiplet_scominit.C)6
-rw-r--r--src/usr/isteps/istep10/call_proc_enable_osclite.C (renamed from src/usr/isteps/istep08/call_proc_enable_osclite.C)6
-rw-r--r--src/usr/isteps/istep10/call_proc_npu_scominit.C (renamed from src/usr/isteps/istep08/call_proc_npu_scominit.C)6
-rw-r--r--src/usr/isteps/istep10/call_proc_obus_scominit.C (renamed from src/usr/isteps/istep08/call_proc_obus_scominit.C)4
-rw-r--r--src/usr/isteps/istep10/call_proc_pcie_scominit.C (renamed from src/usr/isteps/istep08/call_proc_pcie_scominit.C)4
-rw-r--r--src/usr/isteps/istep10/call_proc_scomoverride_chiplets.C (renamed from src/usr/isteps/istep08/call_proc_scomoverride_chiplets.C)6
-rw-r--r--src/usr/isteps/istep10/host_proc_pcie_scominit.C (renamed from src/usr/isteps/istep08/host_proc_pcie_scominit.C)4
-rw-r--r--src/usr/isteps/istep10/host_proc_pcie_scominit.H (renamed from src/usr/isteps/istep08/host_proc_pcie_scominit.H)4
-rw-r--r--src/usr/isteps/istep10/makefile68
-rw-r--r--src/usr/isteps/istep16/call_host_secure_rng.C (renamed from src/usr/isteps/istep16/call_p9_rng_init_phase2.C)14
-rw-r--r--src/usr/isteps/istep16/makefile2
32 files changed, 1089 insertions, 409 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C
new file mode 100644
index 000000000..c2064485a
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C
@@ -0,0 +1,166 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+///
+/// @file p9_chiplet_scominit.C
+///
+/// @brief apply fabric SCOM inits
+///
+
+//
+// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
+// *HWP Team : Nest
+// *HWP Level : 2
+// *HWP Consumed by : HB
+//
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <p9_chiplet_fabric_scominit.H>
+#include <p9_fbc_no_hp_scom.H>
+#include <p9_fbc_ioe_tl_scom.H>
+#include <p9_fbc_ioe_dl_scom.H>
+
+#include <p9_xbus_scom_addresses.H>
+#include <p9_xbus_scom_addresses_fld.H>
+#include <p9_obus_scom_addresses.H>
+#include <p9_obus_scom_addresses_fld.H>
+#include <p9_misc_scom_addresses.H>
+#include <p9_perv_scom_addresses.H>
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+const uint64_t FBC_IOE_TL_FIR_ACTION0 = 0x0000000000000000ULL;
+const uint64_t FBC_IOE_TL_FIR_ACTION1 = 0x004B000000000000ULL;
+const uint64_t FBC_IOE_TL_FIR_MASK = 0xFF24F0303FFFFFFFULL;
+
+const uint64_t FBC_IOE_DL_FIR_ACTION0 = 0x0000000000000000ULL;
+const uint64_t FBC_IOE_DL_FIR_ACTION1 = 0x0303C00000001FFCULL;
+const uint64_t FBC_IOE_DL_FIR_MASK = 0xFCFC3FFFFFFFE003ULL;
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+fapi2::ReturnCode p9_chiplet_fabric_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+ fapi2::ReturnCode l_rc;
+ char l_procTargetStr[fapi2::MAX_ECMD_STRING_LEN];
+ char l_chipletTargetStr[fapi2::MAX_ECMD_STRING_LEN];
+ fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
+ std::vector<fapi2::Target<fapi2::TARGET_TYPE_XBUS>> l_xbus_chiplets;
+ std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets;
+
+ fapi2::ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_Type l_fbc_optics_cfg_mode = { fapi2::ENUM_ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_SMP };
+ FAPI_DBG("Start");
+
+ // Get proc target string
+ fapi2::toString(i_target, l_procTargetStr, sizeof(l_procTargetStr));
+
+ // apply FBC non-hotplug initfile
+ FAPI_DBG("Invoking p9.fbc.no_hp.scom.initfile on target %s...", l_procTargetStr);
+ FAPI_EXEC_HWP(l_rc, p9_fbc_no_hp_scom, i_target, FAPI_SYSTEM);
+
+ if (l_rc)
+ {
+ FAPI_ERR("Error from p9_fbc_no_hp_scom");
+ fapi2::current_err = l_rc;
+ goto fapi_try_exit;
+ }
+
+ // setup IOE (XBUS FBC IO) TL SCOMs
+ FAPI_DBG("Invoking p9.fbc.ioe_tl.scom.initfile on target %s...", l_procTargetStr);
+ FAPI_EXEC_HWP(l_rc, p9_fbc_ioe_tl_scom, i_target, FAPI_SYSTEM);
+
+ if (l_rc)
+ {
+ FAPI_ERR("Error from p9_fbc_ioe_tl_scom");
+ fapi2::current_err = l_rc;
+ goto fapi_try_exit;
+ }
+
+ l_xbus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_XBUS>();
+
+ if (l_xbus_chiplets.size())
+ {
+ FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_ACTION0_REG, FBC_IOE_TL_FIR_ACTION0),
+ "Error from putScom (PU_PB_IOE_FIR_ACTION0_REG)");
+ FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_ACTION1_REG, FBC_IOE_TL_FIR_ACTION1),
+ "Error from putScom (PU_PB_IOE_FIR_ACTION1_REG)");
+ FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_MASK_REG, FBC_IOE_TL_FIR_MASK),
+ "Error from putScom (PU_PB_IOE_FIR_MASK_REG)");
+ }
+
+ // setup IOE (XBUS FBC IO) DL SCOMs
+ for (auto l_iter = l_xbus_chiplets.begin();
+ l_iter != l_xbus_chiplets.end();
+ l_iter++)
+ {
+ fapi2::toString(*l_iter, l_chipletTargetStr, sizeof(l_chipletTargetStr));
+ FAPI_DBG("Invoking p9.fbc.ioe_dl.scom.initfile on target %s...", l_chipletTargetStr);
+ FAPI_EXEC_HWP(l_rc, p9_fbc_ioe_dl_scom, *l_iter, i_target);
+
+ if (l_rc)
+ {
+ FAPI_ERR("Error from p9_fbc_ioe_dl_scom");
+ fapi2::current_err = l_rc;
+ goto fapi_try_exit;
+ }
+
+ // configure action registers & unmask
+ FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION0_REG, FBC_IOE_DL_FIR_ACTION0),
+ "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION0_REG)");
+ FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION1_REG, FBC_IOE_DL_FIR_ACTION1),
+ "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION1_REG)");
+ FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG, FBC_IOE_DL_FIR_MASK),
+ "Error from putScom (XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG)");
+ }
+
+ // set FBC optics config mode attribute
+ l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>();
+
+ for (auto l_iter = l_obus_chiplets.begin();
+ l_iter != l_obus_chiplets.end();
+ l_iter++)
+ {
+ uint8_t l_unit_pos;
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, *l_iter, l_unit_pos),
+ "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)");
+ FAPI_INF("Updating index: %d\n", l_unit_pos);
+ FAPI_INF(" before: %d\n", l_fbc_optics_cfg_mode[l_unit_pos]);
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OPTICS_CONFIG_MODE, *l_iter, l_fbc_optics_cfg_mode[l_unit_pos]),
+ "Error from FAPI_ATTR_GET(ATTR_OPTICS_CONFIG_MODE)");
+ FAPI_INF(" after: %d\n", l_fbc_optics_cfg_mode[l_unit_pos]);
+ }
+
+ FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE, i_target, l_fbc_optics_cfg_mode),
+ "Error from FAPI_ATTR_SET(ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE)");
+
+fapi_try_exit:
+ FAPI_DBG("End");
+ return fapi2::current_err;
+}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H
new file mode 100644
index 000000000..8b15e4f5b
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H
@@ -0,0 +1,69 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+///
+/// @file p9_chiplet_fabric_scominit.H
+///
+/// @brief apply fabric SCOM inits
+///
+
+//
+// *HWP HW Owner : Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner : Thi N. Tran <thi@us.ibm.com>
+// *HWP Team : Nest
+// *HWP Level : 2
+// *HWP Consumed by : HB
+//
+
+#ifndef _P9_CHIPLET_FABRIC_SCOMINIT_H_
+#define _P9_CHIPLET_FABRIC_SCOMINIT_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+typedef fapi2::ReturnCode (*p9_chiplet_fabric_scominit_FP_t)(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+/// @brief apply fabric SCOM inits
+///
+/// @param[in] i_target Reference to processor chip target
+/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+ fapi2::ReturnCode p9_chiplet_fabric_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+} // extern "C"
+
+#endif // _P9_CHIPLET_FABRIC_SCOMINIT_H_
+
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.mk b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.mk
new file mode 100644
index 000000000..15bc2a985
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.mk
@@ -0,0 +1,27 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.mk $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2017
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_chiplet_fabric_scominit
+$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/p9/procedures/hwp/initfiles)
+$(call BUILD_PROCEDURE)
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
index a25974acc..a068dc49d 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C
@@ -25,7 +25,7 @@
///
/// @file p9_chiplet_scominit.C
///
-/// @brief SCOM inits to all chiplets (sans Quad)
+/// @brief SCOM inits to all chiplets (sans Quad/fabric)
///
//
@@ -40,9 +40,6 @@
// Includes
//------------------------------------------------------------------------------
#include <p9_chiplet_scominit.H>
-#include <p9_fbc_no_hp_scom.H>
-#include <p9_fbc_ioe_tl_scom.H>
-#include <p9_fbc_ioe_dl_scom.H>
#include <p9_fbc_ioo_tl_scom.H>
#include <p9_fbc_ioo_dl_scom.H>
#include <p9_mcs_scom.H>
@@ -61,18 +58,10 @@
//------------------------------------------------------------------------------
// Constant definitions
//------------------------------------------------------------------------------
-const uint64_t FBC_IOE_TL_FIR_ACTION0 = 0x0000000000000000ULL;
-const uint64_t FBC_IOE_TL_FIR_ACTION1 = 0x004B000000000000ULL;
-const uint64_t FBC_IOE_TL_FIR_MASK = 0xFF24F0303FFFFFFFULL;
-
const uint64_t FBC_IOO_TL_FIR_ACTION0 = 0x0000000000000000ULL;
const uint64_t FBC_IOO_TL_FIR_ACTION1 = 0x0002400000000000ULL;
const uint64_t FBC_IOO_TL_FIR_MASK = 0xFF6DB0000FFFFFFFULL;
-const uint64_t FBC_IOE_DL_FIR_ACTION0 = 0x0000000000000000ULL;
-const uint64_t FBC_IOE_DL_FIR_ACTION1 = 0x0303C00000001FFCULL;
-const uint64_t FBC_IOE_DL_FIR_MASK = 0xFCFC3FFFFFFFE003ULL;
-
const uint64_t FBC_IOO_DL_FIR_ACTION0 = 0x0000000000000000ULL;
const uint64_t FBC_IOO_DL_FIR_ACTION1 = 0x0303C0000300FFFCULL;
const uint64_t FBC_IOO_DL_FIR_MASK = 0xFCFC3FFFFCFF000CULL;
@@ -94,6 +83,7 @@ static const uint8_t PERV_OB_CPLT_CONF1_NVC_IOVALID = 0x8;
static const uint8_t NV_OB0_MASK = 0x1;
static const uint8_t NV_OB3_MASK = 0x2;
+
//------------------------------------------------------------------------------
// Function definitions
//------------------------------------------------------------------------------
@@ -104,7 +94,6 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
char l_procTargetStr[fapi2::MAX_ECMD_STRING_LEN];
char l_chipletTargetStr[fapi2::MAX_ECMD_STRING_LEN];
fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
- std::vector<fapi2::Target<fapi2::TARGET_TYPE_XBUS>> l_xbus_chiplets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_MCS>> l_mcs_targets;
std::vector<fapi2::Target<fapi2::TARGET_TYPE_CAPP>> l_capp_targets;
@@ -115,9 +104,7 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
uint8_t l_ndl_iovalid = 0;
uint8_t l_is_simulation = 0;
- fapi2::ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_Type l_fbc_optics_cfg_mode = { fapi2::ENUM_ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_SMP };
FAPI_DBG("Start");
-
// Get attribute to check if it is dd1 or dd2
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_P9N_DD1_SPY_NAMES, i_target, l_dd1));
// Get attribute to check if NDL IOValids need set (dd2+)
@@ -214,86 +201,9 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO
}
- // apply FBC non-hotplug initfile
- FAPI_DBG("Invoking p9.fbc.no_hp.scom.initfile on target %s...", l_procTargetStr);
- FAPI_EXEC_HWP(l_rc, p9_fbc_no_hp_scom, i_target, FAPI_SYSTEM);
-
- if (l_rc)
- {
- FAPI_ERR("Error from p9_fbc_no_hp_scom");
- fapi2::current_err = l_rc;
- goto fapi_try_exit;
- }
-
- // setup IOE (XBUS FBC IO) TL SCOMs
- FAPI_DBG("Invoking p9.fbc.ioe_tl.scom.initfile on target %s...", l_procTargetStr);
- FAPI_EXEC_HWP(l_rc, p9_fbc_ioe_tl_scom, i_target, FAPI_SYSTEM);
-
- if (l_rc)
- {
- FAPI_ERR("Error from p9_fbc_ioe_tl_scom");
- fapi2::current_err = l_rc;
- goto fapi_try_exit;
- }
-
- l_xbus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_XBUS>();
-
- if (l_xbus_chiplets.size())
- {
- FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_ACTION0_REG, FBC_IOE_TL_FIR_ACTION0),
- "Error from putScom (PU_PB_IOE_FIR_ACTION0_REG)");
- FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_ACTION1_REG, FBC_IOE_TL_FIR_ACTION1),
- "Error from putScom (PU_PB_IOE_FIR_ACTION1_REG)");
- FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_MASK_REG, FBC_IOE_TL_FIR_MASK),
- "Error from putScom (PU_PB_IOE_FIR_MASK_REG)");
- }
-
- // setup IOE (XBUS FBC IO) DL SCOMs
- for (auto l_iter = l_xbus_chiplets.begin();
- l_iter != l_xbus_chiplets.end();
- l_iter++)
- {
- fapi2::toString(*l_iter, l_chipletTargetStr, sizeof(l_chipletTargetStr));
- FAPI_DBG("Invoking p9.fbc.ioe_dl.scom.initfile on target %s...", l_chipletTargetStr);
- FAPI_EXEC_HWP(l_rc, p9_fbc_ioe_dl_scom, *l_iter, i_target);
-
- if (l_rc)
- {
- FAPI_ERR("Error from p9_fbc_ioe_dl_scom");
- fapi2::current_err = l_rc;
- goto fapi_try_exit;
- }
-
- // configure action registers & unmask
- FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION0_REG, FBC_IOE_DL_FIR_ACTION0),
- "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION0_REG)");
- FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION1_REG, FBC_IOE_DL_FIR_ACTION1),
- "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION1_REG)");
- FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG, FBC_IOE_DL_FIR_MASK),
- "Error from putScom (XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG)");
- }
-
- // set FBC optics config mode attribute
+ // invoke IOO (OBUS FBC IO) SCOM initfiles
l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>();
- for (auto l_iter = l_obus_chiplets.begin();
- l_iter != l_obus_chiplets.end();
- l_iter++)
- {
- uint8_t l_unit_pos;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, *l_iter, l_unit_pos),
- "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)");
- FAPI_INF("Updating index: %d\n", l_unit_pos);
- FAPI_INF(" before: %d\n", l_fbc_optics_cfg_mode[l_unit_pos]);
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OPTICS_CONFIG_MODE, *l_iter, l_fbc_optics_cfg_mode[l_unit_pos]),
- "Error from FAPI_ATTR_GET(ATTR_OPTICS_CONFIG_MODE)");
- FAPI_INF(" after: %d\n", l_fbc_optics_cfg_mode[l_unit_pos]);
- }
-
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE, i_target, l_fbc_optics_cfg_mode),
- "Error from FAPI_ATTR_SET(ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE)");
-
- // invoke IOO (OBUS FBC IO) SCOM initfiles
FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile on target %s...", l_procTargetStr);
FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target);
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H
index dbf753107..50cea5a9c 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -25,7 +25,7 @@
///
/// @file p9_chiplet_scominit.H
///
-/// @brief SCOM inits to all chiplets (sans Quad)
+/// @brief SCOM inits to all chiplets (sans Quad/fabric)
///
//
@@ -57,7 +57,7 @@ typedef fapi2::ReturnCode (*p9_chiplet_scominit_FP_t)(const fapi2::Target<fapi2:
extern "C"
{
-/// @brief SCOM inits to all chiplets (sans Quad)
+/// @brief SCOM inits to all chiplets (sans Quad/fabric)
///
/// @param[in] i_target Reference to processor chip target
/// @return fapi2::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.C b/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.C
index 24ef3feb4..e27ce5a9e 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -25,7 +25,7 @@
//------------------------------------------------------------------------------
/// @file p9_chiplet_enable_ridi.C
///
-/// @brief Enable RI/DI chip wide
+/// @brief Enable RI/DI for all IO chiplets (excluding XBUS)
//------------------------------------------------------------------------------
// *HWP HW Owner : Abhishek Agarwal <abagarw8@in.ibm.com>
// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
@@ -50,7 +50,10 @@ fapi2::ReturnCode p9_chiplet_enable_ridi(const
FAPI_DBG("Entering ...");
for(auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
- (fapi2::TARGET_FILTER_SYNC_MODE_ALL_IO_EXCEPT_NEST, fapi2::TARGET_STATE_FUNCTIONAL))
+ (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_ALL_MC |
+ fapi2::TARGET_FILTER_ALL_PCI |
+ fapi2::TARGET_FILTER_ALL_OBUS),
+ fapi2::TARGET_STATE_FUNCTIONAL))
{
FAPI_INF("Call p9_chiplet_enable_ridi_net_ctrl_action_function");
FAPI_TRY(p9_chiplet_enable_ridi_net_ctrl_action_function(l_target_cplt));
@@ -63,7 +66,7 @@ fapi_try_exit:
}
-/// @brief Enable Drivers/Recievers of MC, ABUS, OBUS, XBUS chiplet
+/// @brief Enable Drivers/Recievers of O, PCIE, MC chiplets
///
/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target
/// @return FAPI2_RC_SUCCESS if success, else error code.
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.H b/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.H
index 91060ef7c..e2c39cf1b 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_chiplet_enable_ridi.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -25,7 +25,7 @@
//------------------------------------------------------------------------------
/// @file p9_chiplet_enable_ridi.H
///
-/// @brief Enable RI/DI chip wide
+/// @brief Enable RI/DI for all IO chiplets (excluding XBUS)
//------------------------------------------------------------------------------
// *HWP HW Owner : Abhishek Agarwal <abagarw8@in.ibm.com>
// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
@@ -46,7 +46,7 @@
typedef fapi2::ReturnCode (*p9_chiplet_enable_ridi_FP_t)(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
-/// @brief Drop RI/DI for all chiplets being used (A, X, O, Pcie, DMI)
+/// @brief Drop RI/DI for O, PCIE, MC
///
/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target
/// @return FAPI2_RC_SUCCESS if success, else error code.
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.C b/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.C
new file mode 100644
index 000000000..bcf1b98bf
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.C
@@ -0,0 +1,98 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//------------------------------------------------------------------------------
+/// @file p9_xbus_enable_ridi.C
+///
+/// @brief Enable XBUS RI/DI
+//------------------------------------------------------------------------------
+// *HWP HW Owner : Abhishek Agarwal <abagarw8@in.ibm.com>
+// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
+// *HWP FW Owner : Sunil Kumar <skumar8j@in.ibm.com>
+// *HWP Team : Perv
+// *HWP Level : 2
+// *HWP Consumed by : HB
+//------------------------------------------------------------------------------
+
+
+//## auto_generated
+#include "p9_xbus_enable_ridi.H"
+
+#include "p9_perv_scom_addresses.H"
+
+static fapi2::ReturnCode p9_xbus_enable_ridi_net_ctrl_action_function(
+ const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet);
+
+fapi2::ReturnCode p9_xbus_enable_ridi(const
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
+{
+ FAPI_DBG("Entering ...");
+
+ for(auto l_target_cplt : i_target_chip.getChildren<fapi2::TARGET_TYPE_PERV>
+ (fapi2::TARGET_FILTER_XBUS, fapi2::TARGET_STATE_FUNCTIONAL))
+ {
+ FAPI_INF("Call p9_xbus_enable_ridi_net_ctrl_action_function");
+ FAPI_TRY(p9_xbus_enable_ridi_net_ctrl_action_function(l_target_cplt));
+ }
+
+ FAPI_DBG("Exiting ...");
+
+fapi_try_exit:
+ return fapi2::current_err;
+
+}
+
+/// @brief Enable Drivers/Recievers of MC, ABUS, OBUS, XBUS chiplet
+///
+/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target
+/// @return FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode p9_xbus_enable_ridi_net_ctrl_action_function(
+ const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet)
+{
+ bool l_read_reg = false;
+ fapi2::buffer<uint64_t> l_data64;
+ FAPI_DBG("Entering ...");
+
+ FAPI_INF("Check for chiplet enable");
+ //Getting NET_CTRL0 register value
+ FAPI_TRY(fapi2::getScom(i_target_chiplet, PERV_NET_CTRL0, l_data64));
+ l_read_reg = l_data64.getBit<0>(); //l_read_reg = NET_CTRL0.CHIPLET_ENABLE
+
+ if ( l_read_reg )
+ {
+ FAPI_INF("Enable Recievers, Drivers DI1 & DI2");
+ //Setting NET_CTRL0 register value
+ l_data64.flush<0>();
+ l_data64.setBit<19>(); //NET_CTRL0.RI_N = 1
+ l_data64.setBit<20>(); //NET_CTRL0.DI1_N = 1
+ l_data64.setBit<21>(); //NET_CTRL0.DI2_N = 1
+ FAPI_TRY(fapi2::putScom(i_target_chiplet, PERV_NET_CTRL0_WOR, l_data64));
+ }
+
+ FAPI_DBG("Exiting ...");
+
+fapi_try_exit:
+ return fapi2::current_err;
+
+}
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.H b/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.H
new file mode 100644
index 000000000..bf3ae2dbd
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.H
@@ -0,0 +1,60 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.H $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//------------------------------------------------------------------------------
+/// @file p9_xbus_enable_ridi.H
+///
+/// @brief Enable RI/DI for XBUS
+//------------------------------------------------------------------------------
+// *HWP HW Owner : Abhishek Agarwal <abagarw8@in.ibm.com>
+// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
+// *HWP FW Owner : Sunil kumar <skumar8j@in.ibm.com>
+// *HWP Team : Perv
+// *HWP Level : 2
+// *HWP Consumed by : HB
+//------------------------------------------------------------------------------
+
+
+#ifndef _P9_XBUS_ENABLE_RIDI_H_
+#define _P9_XBUS_ENABLE_RIDI_H_
+
+
+#include <fapi2.H>
+
+
+typedef fapi2::ReturnCode (*p9_xbus_enable_ridi_FP_t)(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
+
+/// @brief Drop RI/DI for XBUS
+///
+/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target
+/// @return FAPI2_RC_SUCCESS if success, else error code.
+
+extern "C"
+{
+ fapi2::ReturnCode p9_xbus_enable_ridi(const
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
+}
+
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.mk b/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.mk
new file mode 100644
index 000000000..0dd68cee2
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.mk
@@ -0,0 +1,26 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/import/chips/p9/procedures/hwp/perv/p9_xbus_enable_ridi.mk $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2017
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_xbus_enable_ridi
+$(call BUILD_PROCEDURE)
diff --git a/src/include/usr/isteps/istep08list.H b/src/include/usr/isteps/istep08list.H
index dd5d42d78..8b4ab6710 100644
--- a/src/include/usr/isteps/istep08list.H
+++ b/src/include/usr/isteps/istep08list.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2016 */
+/* Contributors Listed Below - COPYRIGHT 2012,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -29,7 +29,7 @@
* @file istep08list.H
*
* IStep 08 Nest Chiplets
- * IPL FLow Doc v0.95
+ * IPL FLow Doc v1.07
*
* 08.01 host_slave_sbe_config
* : Configure host slave sbe
@@ -41,36 +41,18 @@
* : Check Slave SBE Complete
* 08.05 host_attnlisten_proc
* : Start attention poll for all P9(s)
- * 08.06 proc_cen_ref_clk_enable
- * : Setup centaur ref clocks
- * 08.07 host_set_voltages
- * : Set correct chip voltages
- * 08.08 host_p9_fbc_eff_config
+ * 08.06 host_p9_fbc_eff_config
* : Determine powerbus config
- * 08.09 host_p9_eff_config_links
+ * 08.07 host_p9_eff_config_links
* : Powerbus link config
- * 08.10 proc_attr_update
+ * 08.08 proc_attr_update
* : Proc ATTR Update
- * 08.11 proc_enable_osclite
- * : Enable Osclite
- * 08.12 proc_chiplet_scominit
- * : Scom inits to all chiplets (sans Quad)
- * 08.13 proc_xbus_scominit
+ * 08.09 proc_chiplet_fabric_scominit
+ * : Scom inits to all chiplet fabric (sans Quad)
+ * 08.10 proc_xbus_scominit
* : Apply scom inits to Xbus
- * 08.14 proc_abus_scominit
- * : Apply scom inits to Abus
- * 08.15 proc_obus_scominit
- * : Apply scom inits to Obus
- * 08.16 proc_npu_scominit
- * : Apply scom inits to Npu
- * 08.17 proc_pcie_scominit
- * : Apply scom inits to PCIechiplets
- * 08.18 proc_scomoverride_chiplets
- * : Apply sequenced scom inits
- * 08.19 proc_chiplet_enable_ridi
- * : Enable RI/DI chip wide
- * 08.20 p9_rng_init_phase1
- * : Trigger Built In Self Test for RNG
+ * 08.11 proc_xbus_enable_ridi
+ * : Enable RI/DI for xbus
* Please see the note in initsvcstructs.H for description of
* the ISTEPNAME macro.
*
@@ -129,15 +111,6 @@ void* call_proc_check_slave_sbe_seeprom_complete(void *io_pArgs);
void* call_host_attnlisten_proc(void *io_pArgs);
/**
- * @brief proc_cen_ref_clk_enable
- *
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- */
-void* call_proc_cen_ref_clk_enable(void *io_pArgs);
-
-/**
* @brief host_p9_fbc_eff_config
*
* param[in,out] io_pArgs - (normally) a pointer to a TaskArgs struct,
@@ -168,26 +141,16 @@ void* call_host_p9_fbc_eff_config_links (void * io_pArgs);
void * call_proc_attr_update( void * io_pArgs );
/**
- * @brief proc_enable_osclite
+ * @brief proc_chiplet_fabric_scominit
*
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- *
- */
-void* call_proc_enable_osclite(void *io_pArgs);
-
-/**
- * @brief proc_chiplet_scominit
- *
- * Apply scom inits to chiplets
+ * Apply scom inits to chiplet fabric
*
* param[in,out] - pointer to any arguments, usually NULL
*
* return any error logs to istep
*
*/
-void* call_proc_chiplet_scominit( void *io_pArgs );
+void* call_proc_chiplet_fabric_scominit( void *io_pArgs );
/**
* @brief proc_xbus_scominit
@@ -202,92 +165,14 @@ void* call_proc_chiplet_scominit( void *io_pArgs );
void* call_proc_xbus_scominit( void *io_pArgs );
/**
- * @brief proc_abus_scominit
- *
- * Apply scom inits to Abus
- *
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- *
- */
-void* call_proc_abus_scominit( void *io_pArgs );
-
-/**
- * @brief proc_obus_scominit
- *
- * Apply scom inits to OBUS
- *
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- */
-void* call_proc_obus_scominit( void *io_pArgs );
-
-/**
- * @brief proc_npu_scominit
- *
- * Apply scom inits to NPU
- *
- * param[in.out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- */
-void* call_proc_npu_scominit( void *io_pArgs );
-
-/**
- * @brief proc_pcie_scominit
- *
- * Apply scom inits to PCIe chiplets
+ * @brief proc_xbus_enable_ridi
*
* param[in,out] - pointer to any arguments, usually NULL
*
* return any error logs to istep
*
*/
-void* call_proc_pcie_scominit( void *io_pArgs );
-
-/**
- * @brief proc_scomoverride_chiplets
- *
- * Apply sequenced scom inits
- *
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- *
- */
-void* call_proc_scomoverride_chiplets( void *io_pArgs );
-
-/**
- * @brief proc_chiplet_enable_ridi
- *
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- *
- */
-void* call_proc_chiplet_enable_ridi( void *io_pArgs );
-
-/**
- * @brief p9_rng_init_phase1
- *
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- *
- */
-void* call_p9_rng_init_phase1( void *io_pArgs );
-
-/**
- * @brief host_set_voltages
- *
- * param[in,out] - pointer to any arguments, usually NULL
- *
- * return any error logs to istep
- *
- */
-void* call_host_set_voltages( void *io_pArgs );
+void* call_proc_xbus_enable_ridi( void *io_pArgs );
}; // end namespace
@@ -328,78 +213,33 @@ namespace INITSERVICE
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
},
{
- ISTEPNAME(08,06,"proc_cen_ref_clk_enable"),
- ISTEP_08::call_proc_cen_ref_clk_enable,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,07,"host_set_voltages"),
- ISTEP_08::call_host_set_voltages,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,08,"host_p9_fbc_eff_config"),
+ ISTEPNAME(08,06,"host_p9_fbc_eff_config"),
ISTEP_08::call_host_p9_fbc_eff_config,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
},
{
- ISTEPNAME(08,09,"host_p9_eff_config_links"),
+ ISTEPNAME(08,07,"host_p9_eff_config_links"),
ISTEP_08::call_host_p9_fbc_eff_config_links,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
},
{
- ISTEPNAME(08,10,"proc_attr_update"),
+ ISTEPNAME(08,08,"proc_attr_update"),
ISTEP_08::call_proc_attr_update,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
},
{
- ISTEPNAME(08,11,"proc_enable_osclite"),
- ISTEP_08::call_proc_enable_osclite,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,12,"proc_chiplet_scominit"),
- ISTEP_08::call_proc_chiplet_scominit,
+ ISTEPNAME(08,09,"proc_chiplet_fabric_scominit"),
+ ISTEP_08::call_proc_chiplet_fabric_scominit,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
},
{
- ISTEPNAME(08,13,"proc_xbus_scominit"),
+ ISTEPNAME(08,10,"proc_xbus_scominit"),
ISTEP_08::call_proc_xbus_scominit,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
},
{
- ISTEPNAME(08,14,"proc_abus_scominit"),
- ISTEP_08::call_proc_abus_scominit,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,15,"proc_obus_scominit"),
- ISTEP_08::call_proc_obus_scominit,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,16,"proc_npu_scominit"),
- ISTEP_08::call_proc_npu_scominit,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,17,"proc_pcie_scominit"),
- ISTEP_08::call_proc_pcie_scominit,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,18,"proc_scomoverride_chiplets"),
- ISTEP_08::call_proc_scomoverride_chiplets,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,19,"proc_chiplet_enable_ridi"),
- ISTEP_08::call_proc_chiplet_enable_ridi,
- { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
- },
- {
- ISTEPNAME(08,20,"p9_rng_init_phase1"),
- ISTEP_08::call_p9_rng_init_phase1,
+ ISTEPNAME(08,11,"proc_xbus_enable_ridi"),
+ ISTEP_08::call_proc_xbus_enable_ridi,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
},
diff --git a/src/include/usr/isteps/istep10list.H b/src/include/usr/isteps/istep10list.H
index b9da2a4eb..86df45b47 100644
--- a/src/include/usr/isteps/istep10list.H
+++ b/src/include/usr/isteps/istep10list.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2016 */
+/* Contributors Listed Below - COPYRIGHT 2012,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -30,8 +30,36 @@
* @file istep10list.H
*
* Step 10 Hostboot SBE Centaur Init
- * IPL FLow Doc v0.67 (11/12/15)
+ * IPL FLow Doc v1.07
*
+ * 10.01 proc_build_smp
+ * : Integrate P9 Islands into SMP
+ * 10.02 host_slave_sbe_update
+ * : Update slave SBE
+ * 10.03 host_set_voltages
+ * : Set correct chip voltages
+ * 10.04 proc_cen_ref_clk_enable
+ * : Setup centaur ref clocks
+ * 10.05 proc_enable_osclite
+ * : Enable Osclite
+ * 10.06 proc_chiplet_scominit
+ * : Scom inits to all chiplets (sans Quad)
+ * 10.07 proc_abus_scominit
+ * : Apply scom inits to Abus
+ * 10.08 proc_obus_scominit
+ * : Apply scom inits to Obus
+ * 10.09 proc_npu_scominit
+ * : Apply scom inits to Npu
+ * 10.10 proc_pcie_scominit
+ * : Apply scom inits to PCIechiplets
+ * 10.11 proc_scomoverride_chiplets
+ * : Apply sequenced scom inits
+ * 10.12 proc_chiplet_enable_ridi
+ * : Enable RI/DI chip wide
+ * 10.13 call_host_rng_bist
+ * : Trigger Built In Self Test for RNG
+ * 10.14 host_update_redundant_tpm
+ * : Update the Alt Master TPM
* Please see the note in initsvcstructs.H for description of
* the ISTEPNAME macro.
*/
@@ -55,8 +83,6 @@ namespace ISTEP_10
*/
void* call_proc_build_smp( void *io_pArgs );
-
-
/**
* @brief host_slave_sbe_update
*
@@ -67,7 +93,124 @@ void* call_proc_build_smp( void *io_pArgs );
*/
void* call_host_slave_sbe_update( void *io_pArgs );
+/**
+ * @brief host_set_voltages
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_host_set_voltages( void *io_pArgs );
+
+/**
+ * @brief proc_cen_ref_clk_enable
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ */
+void* call_proc_cen_ref_clk_enable(void *io_pArgs);
+
+/**
+ * @brief proc_enable_osclite
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_proc_enable_osclite(void *io_pArgs);
+
+/**
+ * @brief proc_chiplet_scominit
+ *
+ * Apply scom inits to chiplets
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_proc_chiplet_scominit( void *io_pArgs );
+
+/**
+ * @brief proc_abus_scominit
+ *
+ * Apply scom inits to Abus
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_proc_abus_scominit( void *io_pArgs );
+
+/**
+ * @brief proc_obus_scominit
+ *
+ * Apply scom inits to OBUS
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ */
+void* call_proc_obus_scominit( void *io_pArgs );
+
+/**
+ * @brief proc_npu_scominit
+ *
+ * Apply scom inits to NPU
+ *
+ * param[in.out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ */
+void* call_proc_npu_scominit( void *io_pArgs );
+
+/**
+ * @brief proc_pcie_scominit
+ *
+ * Apply scom inits to PCIe chiplets
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_proc_pcie_scominit( void *io_pArgs );
+/**
+ * @brief proc_scomoverride_chiplets
+ *
+ * Apply sequenced scom inits
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_proc_scomoverride_chiplets( void *io_pArgs );
+
+/**
+ * @brief proc_chiplet_enable_ridi
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_proc_chiplet_enable_ridi( void *io_pArgs );
+
+/**
+ * @brief call_host_rng_bist
+ *
+ * param[in,out] - pointer to any arguments, usually NULL
+ *
+ * return any error logs to istep
+ *
+ */
+void* call_host_rng_bist( void *io_pArgs );
/**
* @brief host update redundant tpm
@@ -102,7 +245,62 @@ const TaskInfo g_istep10[] = {
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, true }
},
{
- ISTEPNAME(10,03,"host_update_redundant_tpm"),
+ ISTEPNAME(10,03,"host_set_voltages"),
+ ISTEP_10::call_host_set_voltages,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,04,"proc_cen_ref_clk_enable"),
+ ISTEP_10::call_proc_cen_ref_clk_enable,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,05,"proc_enable_osclite"),
+ ISTEP_10::call_proc_enable_osclite,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,06,"proc_chiplet_scominit"),
+ ISTEP_10::call_proc_chiplet_scominit,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,07,"proc_abus_scominit"),
+ ISTEP_10::call_proc_abus_scominit,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,08,"proc_obus_scominit"),
+ ISTEP_10::call_proc_obus_scominit,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,09,"proc_npu_scominit"),
+ ISTEP_10::call_proc_npu_scominit,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,10,"proc_pcie_scominit"),
+ ISTEP_10::call_proc_pcie_scominit,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,11,"proc_scomoverride_chiplets"),
+ ISTEP_10::call_proc_scomoverride_chiplets,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,12,"proc_chiplet_enable_ridi"),
+ ISTEP_10::call_proc_chiplet_enable_ridi,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,13,"host_rng_bist"),
+ ISTEP_10::call_host_rng_bist,
+ { START_FN, EXT_IMAGE, NORMAL_IPL_OP, false }
+ },
+ {
+ ISTEPNAME(10,14,"host_update_redundant_tpm"),
ISTEP_10::call_host_update_redundant_tpm,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, true }
},
diff --git a/src/include/usr/isteps/istep16list.H b/src/include/usr/isteps/istep16list.H
index f5c9646d5..5ccac0e5a 100644
--- a/src/include/usr/isteps/istep16list.H
+++ b/src/include/usr/isteps/istep16list.H
@@ -71,14 +71,14 @@ void* call_host_activate_slave_cores( void *io_pArgs );
/**
- * @brief p9_rng_init_phase2
+ * @brief host_secure_rng
*
* param[in,out] - pointer to any arguments, usually NULL
*
* return any errlogs to istep
*
*/
-void* call_p9_rng_init_phase2( void *io_pArgs );
+void* call_host_secure_rng( void *io_pArgs );
/**
* @brief mss_scrub
@@ -122,8 +122,8 @@ namespace INITSERVICE
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP | MPIPL_OP, true }
},
{
- ISTEPNAME(16,03,"p9_rng_init_phase2"),
- ISTEP_16::call_p9_rng_init_phase2,
+ ISTEPNAME(16,03,"host_secure_rng"),
+ ISTEP_16::call_host_secure_rng,
{ START_FN, EXT_IMAGE, NORMAL_IPL_OP, true }
},
{
diff --git a/src/usr/isteps/istep08/call_proc_chiplet_fabric_scominit.C b/src/usr/isteps/istep08/call_proc_chiplet_fabric_scominit.C
new file mode 100644
index 000000000..dadd3065a
--- /dev/null
+++ b/src/usr/isteps/istep08/call_proc_chiplet_fabric_scominit.C
@@ -0,0 +1,163 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep08/call_proc_chiplet_fabric_scominit.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ @file call_proc_chiplet_fabric_scominit.C
+ *
+ * Support file for IStep: nest_chiplets
+ * Nest Chiplets
+ *
+ * HWP_IGNORE_VERSION_CHECK
+ *
+ */
+/******************************************************************************/
+// Includes
+/******************************************************************************/
+#include <stdint.h>
+
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <errl/errlentry.H>
+
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+
+#include <initservice/isteps_trace.H>
+#include <initservice/initserviceif.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+
+#include <fapi2/target.H>
+#include <fapi2/plat_hwp_invoker.H>
+
+// MVPD
+#include <devicefw/userif.H>
+#include <vpd/mvpdenums.H>
+
+#include <config.h>
+
+// HWP
+#include <p9_chiplet_fabric_scominit.H>
+
+namespace ISTEP_08
+{
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace ERRORLOG;
+using namespace TARGETING;
+
+//******************************************************************************
+// wrapper function to call proc_chiplet_fabric_scominit
+//******************************************************************************
+void* call_proc_chiplet_fabric_scominit( void *io_pArgs )
+{
+ errlHndl_t l_err = NULL;
+ IStepError l_StepError;
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_proc_chiplet_fabric_scominit entry" );
+
+ //
+ // get a list of all the procs in the system
+ //
+ TARGETING::TargetHandleList l_cpuTargetList;
+ getAllChips(l_cpuTargetList, TYPE_PROC);
+
+ // Loop through all processors including master
+ for (const auto & l_cpu_target: l_cpuTargetList)
+ {
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapi2_proc_target(
+ l_cpu_target);
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9_chiplet_fabric_scominit HWP on "
+ "target HUID %.8X", TARGETING::get_huid(l_cpu_target));
+
+ FAPI_INVOKE_HWP(l_err,
+ p9_chiplet_fabric_scominit,
+ l_fapi2_proc_target);
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "ERROR 0x%.8X : "
+ "p9_chiplet_fabric_scominit HWP returns error. target HUID %.8X",
+ l_err->reasonCode(), TARGETING::get_huid(l_cpu_target));
+
+ ErrlUserDetailsTarget(l_cpu_target).addToLog( l_err );
+
+ // Create IStep error log and cross ref to error that occurred
+ l_StepError.addErrorDetails( l_err );
+
+ // We want to continue to the next target instead of exiting,
+ // Commit the error log and move on
+ // Note: Error log should already be deleted and set to NULL
+ // after committing
+ errlCommit(l_err, HWPF_COMP_ID);
+ }
+
+ // @todo RTC 174563 Remove obus workaround
+ uint64_t l_orValue = 0xFF00000000000000;
+ uint64_t l_orSize = sizeof(l_orValue);
+ l_err = deviceWrite(l_cpu_target,
+ &l_orValue,
+ l_orSize,
+ DEVICE_SCOM_ADDRESS(0x05013805));
+ if(l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,ERR_MRK
+ "Unable to set workaround address");
+ break;
+ }
+ } // end of going through all processors
+
+ // @todo RTC 174563 Remove obus workaround
+ // Get all OBUS targets
+ TARGETING::TargetHandleList l_obusTargetList;
+ getAllChiplets(l_obusTargetList, TYPE_OBUS);
+ for (const auto & l_obusTarget: l_obusTargetList)
+ {
+ uint64_t l_orValue = 0xC000000000000000;
+ uint64_t l_orSize = sizeof(l_orValue);
+ l_err = deviceWrite(l_obusTarget
+ ,
+ &l_orValue,
+ l_orSize,
+ DEVICE_SCOM_ADDRESS(0x09010805));
+ if(l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,ERR_MRK
+ "Unable to set workaround address");
+ break;
+ }
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_proc_chiplet_fabric_scominit exit" );
+
+ return l_StepError.getErrorHandle();
+}
+
+}; // end namespace ISTEP_08
diff --git a/src/usr/isteps/istep08/call_proc_xbus_enable_ridi.C b/src/usr/isteps/istep08/call_proc_xbus_enable_ridi.C
new file mode 100644
index 000000000..68117452f
--- /dev/null
+++ b/src/usr/isteps/istep08/call_proc_xbus_enable_ridi.C
@@ -0,0 +1,111 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep08/call_proc_xbus_enable_ridi.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+ @file call_proc_xbus_enable_ridi.C
+ *
+ * Support file for IStep: nest_chiplets
+ * Nest Chiplets
+ *
+ * HWP_IGNORE_VERSION_CHECK
+ *
+ */
+/******************************************************************************/
+// Includes
+/******************************************************************************/
+#include <stdint.h>
+
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <errl/errlentry.H>
+
+#include <isteps/hwpisteperror.H>
+
+#include <errl/errludtarget.H>
+
+#include <initservice/isteps_trace.H>
+#include <initservice/initserviceif.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <fapi2/target.H>
+#include <fapi2/plat_hwp_invoker.H>
+
+#include <p9_xbus_enable_ridi.H>
+
+
+namespace ISTEP_08
+{
+
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace ERRORLOG;
+using namespace TARGETING;
+
+//******************************************************************************
+// wrapper function to call proc_xbus_enable_ridi
+//******************************************************************************
+void* call_proc_xbus_enable_ridi( void *io_pArgs )
+{
+ errlHndl_t l_err = NULL;
+ IStepError l_StepError;
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_proc_xbus_enable_ridi entry" );
+ //
+ // get a list of all the procs in the system
+ //
+ TARGETING::TargetHandleList l_cpuTargetList;
+ getAllChips(l_cpuTargetList, TYPE_PROC);
+
+ // Loop through all processors including master
+ for (const auto & l_cpu_target: l_cpuTargetList)
+ {
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>l_fapi2_proc_target(
+ l_cpu_target);
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p9_xbus_enable_ridi HWP on processor target %.8X",
+ TARGETING::get_huid(l_cpu_target) );
+
+ FAPI_INVOKE_HWP(l_err, p9_xbus_enable_ridi, l_fapi2_proc_target);
+ if(l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR: call p9_xbus_enable_ridi, PLID=0x%x",
+ l_err->plid());
+ l_StepError.addErrorDetails(l_err);
+ errlCommit(l_err, HWPF_COMP_ID);
+ }
+
+ } // end of going through all processors
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_proc_xbus_enable_ridi exit");
+
+ return l_StepError.getErrorHandle();
+}
+
+}; // end namespace ISTEP_08
diff --git a/src/usr/isteps/istep08/makefile b/src/usr/isteps/istep08/makefile
index f52926319..523fd901d 100644
--- a/src/usr/isteps/istep08/makefile
+++ b/src/usr/isteps/istep08/makefile
@@ -5,7 +5,7 @@
#
# OpenPOWER HostBoot Project
#
-# Contributors Listed Below - COPYRIGHT 2015,2016
+# Contributors Listed Below - COPYRIGHT 2015,2017
# [+] International Business Machines Corp.
#
#
@@ -45,23 +45,13 @@ OBJS += call_host_slave_sbe_config.o
OBJS += call_host_setup_sbe.o
OBJS += call_host_cbs_start.o
OBJS += call_proc_check_slave_sbe_seeprom_complete.o
-OBJS += call_proc_cen_ref_clk_enable.o
OBJS += call_host_p9_fbc_eff_config.o
OBJS += call_host_p9_fbc_eff_config_links.o
OBJS += call_proc_attr_update.o
-OBJS += call_proc_enable_osclite.o
-OBJS += call_proc_chiplet_scominit.o
+OBJS += call_proc_chiplet_fabric_scominit.o
OBJS += call_proc_xbus_scominit.o
-OBJS += call_proc_abus_scominit.o
-OBJS += call_proc_obus_scominit.o
-OBJS += call_proc_npu_scominit.o
-OBJS += call_proc_pcie_scominit.o
-OBJS += call_proc_scomoverride_chiplets.o
-OBJS += call_proc_chiplet_enable_ridi.o
-OBJS += call_p9_rng_init_phase1.o
-OBJS += call_host_set_voltages.o
+OBJS += call_proc_xbus_enable_ridi.o
OBJS += call_host_attnlisten_proc.o
-OBJS += host_proc_pcie_scominit.o
VPATH += ${PROCEDURES_PATH}/hwp/perv/ ${PROCEDURES_PATH}/hwp/nest/
VPATH += ${PROCEDURES_PATH}/hwp/io/ ${PROCEDURES_PATH}/hwp/initfiles/
@@ -70,6 +60,7 @@ VPATH += ${PROCEDURES_PATH}/hwp/pm/
VPATH += ${PROCEDURES_PATH}/hwp/lib
include ${ROOTPATH}/procedure.rules.mk
+
# host_slave_sbe_config
include ${PROCEDURES_PATH}/hwp/perv/p9_setup_sbe_config.mk
@@ -85,9 +76,6 @@ include ${PROCEDURES_PATH}/hwp/perv/p9_extract_sbe_rc.mk
include ${PROCEDURES_PATH}/hwp/sbe/p9_get_sbe_msg_register.mk
include ${PROCEDURES_PATH}/hwp/perv/p9_getecid.mk
-# proc_cen_ref_clk_enable
-# Cummulus only -- p9_cen_ref_clk_enable.mk not defined yet
-
# host_p9_fbc_eff_config
include ${PROCEDURES_PATH}/hwp/nest/p9_fbc_eff_config.mk
@@ -97,65 +85,18 @@ include ${PROCEDURES_PATH}/hwp/nest/p9_fbc_eff_config_links.mk
# proc_attr_update: Proc ATTR Update
include ${PROCEDURES_PATH}/hwp/nest/p9_attr_update.mk
-# proc_enable_osclite
-# Cummulus only -- p9_enable_osclite.mk not defined yet
-
-# proc_chiplet_scominit : Scom inits to all chiplets (sans Quad)
-include ${PROCEDURES_PATH}/hwp/nest/p9_chiplet_scominit.mk
-include ${PROCEDURES_PATH}/hwp/nest/p9_psi_scominit.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_psi_scom.mk
+# proc_chiplet_fabric_scominit : Scom inits to all chiplet fabric (sans Quad)
+include ${PROCEDURES_PATH}/hwp/nest/p9_chiplet_fabric_scominit.mk
include ${PROCEDURES_PATH}/hwp/initfiles/p9_fbc_ioe_dl_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_fbc_ioo_tl_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_fbc_ioo_dl_scom.mk
include ${PROCEDURES_PATH}/hwp/initfiles/p9_fbc_no_hp_scom.mk
include ${PROCEDURES_PATH}/hwp/initfiles/p9_fbc_ioe_tl_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_nx_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_cxa_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_mmu_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_int_scom.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_vas_scom.mk
# proc_xbus_scominit : Apply scom inits to Xbus
include ${PROCEDURES_PATH}/hwp/io/p9_io_xbus_scominit.mk
include ${PROCEDURES_PATH}/hwp/initfiles/p9_xbus_g0_scom.mk
include ${PROCEDURES_PATH}/hwp/initfiles/p9_xbus_g1_scom.mk
-# proc_abus_scominit : Apply scom inits to Abus
-# HWP not found - p9_abus_scominit.mk not defined
-
-# proc_obus_scominit : Apply scom inits to Obus
-include ${PROCEDURES_PATH}/hwp/io/p9_io_obus_scominit.mk
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_obus_scom.mk
-
-# proc_npu_scominit : Apply scom inits to NPU bus
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_npu_scom.mk
-include ${PROCEDURES_PATH}/hwp/nest/p9_npu_scominit.mk
-include ${PROCEDURES_PATH}/hwp/perv/p9_nv_ref_clk_enable.mk
-
-# proc_pcie_scominit : Apply scom inits to PCIe chiplets
-include ${PROCEDURES_PATH}/hwp/nest/p9_pcie_scominit.mk
-
-# p9_mcs_scom
-include ${PROCEDURES_PATH}/hwp/initfiles/p9_mcs_scom.mk
-
-# proc_scomoverride_chiplets : Apply sequenced scom inits
-include ${PROCEDURES_PATH}/hwp/nest/p9_scomoverride_chiplets.mk
-
-# proc_chiplet_enable_ridi : Apply RI/DI chip wide
-include ${PROCEDURES_PATH}/hwp/perv/p9_chiplet_enable_ridi.mk
-
-# host_rng_bist : Trigger Built In Self Test
-# HWP not ready - p9_trigger_rng_bist.mk
-include ${PROCEDURES_PATH}/hwp/nest/p9_rng_init_phase1.mk
-
-# p9_setup_evid : apply voltage settings
-include ${PROCEDURES_PATH}/hwp/pm/p9_setup_evid.mk
-include ${PROCEDURES_PATH}/hwp/lib/p9_avsbus_lib.mk
-# TODO RTC: 164237
-# Take another look at PM lib
-include $(PROCEDURES_PATH)/hwp/pm/p9_pm_utils.mk
-
-MODULE=istep08
-
+# proc_xbus_enable_ridi : Apply RI/DI for xbus
+include ${PROCEDURES_PATH}/hwp/perv/p9_xbus_enable_ridi.mk
include ${ROOTPATH}/config.mk
diff --git a/src/usr/isteps/istep08/call_p9_rng_init_phase1.C b/src/usr/isteps/istep10/call_host_rng_bist.C
index 25dd969d0..b1ccc5144 100644
--- a/src/usr/isteps/istep08/call_p9_rng_init_phase1.C
+++ b/src/usr/isteps/istep10/call_host_rng_bist.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_p9_rng_init_phase1.C $ */
+/* $Source: src/usr/isteps/istep10/call_host_rng_bist.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -23,7 +23,7 @@
/* */
/* IBM_PROLOG_END_TAG */
/**
- @file call_p9_rng_init_phase1.C
+ @file call_host_rng_bist.C
*
* Support file for IStep: nest_chiplets
* Nest Chiplets
@@ -58,7 +58,7 @@
#include <fapi2/plat_hwp_invoker.H>
#include <p9_rng_init_phase1.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
@@ -67,16 +67,16 @@ using namespace ERRORLOG;
using namespace TARGETING;
//******************************************************************************
-// wrapper function to call proc_chiplet_enable_ridi
+// wrapper function to call host_rng_bist
//******************************************************************************
-void* call_p9_rng_init_phase1( void *io_pArgs )
+void* call_host_rng_bist( void *io_pArgs )
{
errlHndl_t l_err = NULL;
IStepError l_StepError;
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_p9_rng_init_phase1 entry" );
+ "call_host_rng_bist entry" );
//
// get a list of all the procs in the system
//
@@ -106,7 +106,7 @@ void* call_p9_rng_init_phase1( void *io_pArgs )
} // end of going through all processors
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_p9_rng_init_phase1 exit");
+ "call_host_rng_bist exit");
return l_StepError.getErrorHandle();
}
diff --git a/src/usr/isteps/istep08/call_host_set_voltages.C b/src/usr/isteps/istep10/call_host_set_voltages.C
index dfa4a0c80..2bca1cff9 100644
--- a/src/usr/isteps/istep08/call_host_set_voltages.C
+++ b/src/usr/isteps/istep10/call_host_set_voltages.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_host_set_voltages.C $ */
+/* $Source: src/usr/isteps/istep10/call_host_set_voltages.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
@@ -47,7 +47,7 @@ using namespace TARGETING;
using namespace ERRORLOG;
using namespace ISTEP_ERROR;
-namespace ISTEP_08
+namespace ISTEP_10
{
//*****************************************************************************
diff --git a/src/usr/isteps/istep08/call_proc_abus_scominit.C b/src/usr/isteps/istep10/call_proc_abus_scominit.C
index 7d5c464cd..745fabae3 100644
--- a/src/usr/isteps/istep08/call_proc_abus_scominit.C
+++ b/src/usr/isteps/istep10/call_proc_abus_scominit.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_abus_scominit.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_abus_scominit.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -61,7 +61,7 @@
#include <config.h>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/call_proc_cen_ref_clk_enable.C b/src/usr/isteps/istep10/call_proc_cen_ref_clk_enable.C
index d418a693e..3a1ebc45c 100644
--- a/src/usr/isteps/istep08/call_proc_cen_ref_clk_enable.C
+++ b/src/usr/isteps/istep10/call_proc_cen_ref_clk_enable.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_cen_ref_clk_enable.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_cen_ref_clk_enable.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -65,7 +65,7 @@ using namespace ISTEP_ERROR;
using namespace ERRORLOG;
using namespace TARGETING;
-namespace ISTEP_08
+namespace ISTEP_10
{
uint8_t getMembufsAttachedBitMask( TARGETING::Target * i_procChipHandle );
diff --git a/src/usr/isteps/istep08/call_proc_chiplet_enable_ridi.C b/src/usr/isteps/istep10/call_proc_chiplet_enable_ridi.C
index ed56be104..72422e56b 100644
--- a/src/usr/isteps/istep08/call_proc_chiplet_enable_ridi.C
+++ b/src/usr/isteps/istep10/call_proc_chiplet_enable_ridi.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_chiplet_enable_ridi.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_chiplet_enable_ridi.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -56,7 +56,7 @@
#include <p9_chiplet_enable_ridi.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/call_proc_chiplet_scominit.C b/src/usr/isteps/istep10/call_proc_chiplet_scominit.C
index 483c25f98..f7df9989a 100644
--- a/src/usr/isteps/istep08/call_proc_chiplet_scominit.C
+++ b/src/usr/isteps/istep10/call_proc_chiplet_scominit.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_chiplet_scominit.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_chiplet_scominit.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -63,7 +63,7 @@
#include <p9_chiplet_scominit.H>
#include <p9_psi_scominit.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/call_proc_enable_osclite.C b/src/usr/isteps/istep10/call_proc_enable_osclite.C
index d9bd03bc1..dd3c6147e 100644
--- a/src/usr/isteps/istep08/call_proc_enable_osclite.C
+++ b/src/usr/isteps/istep10/call_proc_enable_osclite.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_enable_osclite.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_enable_osclite.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -62,7 +62,7 @@
// "start_clocks_on_nest_chiplets_custom.C" and include
// the prototypes here.
// #include "nest_chiplets_custom.H"
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/call_proc_npu_scominit.C b/src/usr/isteps/istep10/call_proc_npu_scominit.C
index e62821ba7..622fc883d 100644
--- a/src/usr/isteps/istep08/call_proc_npu_scominit.C
+++ b/src/usr/isteps/istep10/call_proc_npu_scominit.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_npu_scominit.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_npu_scominit.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -62,7 +62,7 @@
#include <p9_npu_scominit.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/call_proc_obus_scominit.C b/src/usr/isteps/istep10/call_proc_obus_scominit.C
index b31df9f99..f08d896c6 100644
--- a/src/usr/isteps/istep08/call_proc_obus_scominit.C
+++ b/src/usr/isteps/istep10/call_proc_obus_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_obus_scominit.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_obus_scominit.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
@@ -62,7 +62,7 @@
#include <config.h>
#include <p9_io_obus_scominit.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/call_proc_pcie_scominit.C b/src/usr/isteps/istep10/call_proc_pcie_scominit.C
index 382cd4d0d..664a966e9 100644
--- a/src/usr/isteps/istep08/call_proc_pcie_scominit.C
+++ b/src/usr/isteps/istep10/call_proc_pcie_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_pcie_scominit.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_pcie_scominit.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
@@ -62,7 +62,7 @@
#include "host_proc_pcie_scominit.H"
#include <p9_pcie_scominit.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/call_proc_scomoverride_chiplets.C b/src/usr/isteps/istep10/call_proc_scomoverride_chiplets.C
index 8409efd2f..0d4c6d58f 100644
--- a/src/usr/isteps/istep08/call_proc_scomoverride_chiplets.C
+++ b/src/usr/isteps/istep10/call_proc_scomoverride_chiplets.C
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/call_proc_scomoverride_chiplets.C $ */
+/* $Source: src/usr/isteps/istep10/call_proc_scomoverride_chiplets.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -63,7 +63,7 @@
#include <p9_scomoverride_chiplets.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/host_proc_pcie_scominit.C b/src/usr/isteps/istep10/host_proc_pcie_scominit.C
index 00d733489..ff9075b4f 100644
--- a/src/usr/isteps/istep08/host_proc_pcie_scominit.C
+++ b/src/usr/isteps/istep10/host_proc_pcie_scominit.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/host_proc_pcie_scominit.C $ */
+/* $Source: src/usr/isteps/istep10/host_proc_pcie_scominit.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
@@ -48,7 +48,7 @@
#include <hwas/common/deconfigGard.H>
-namespace ISTEP_08
+namespace ISTEP_10
{
using namespace ISTEP;
diff --git a/src/usr/isteps/istep08/host_proc_pcie_scominit.H b/src/usr/isteps/istep10/host_proc_pcie_scominit.H
index 8d4c9c9aa..96e7ca273 100644
--- a/src/usr/isteps/istep08/host_proc_pcie_scominit.H
+++ b/src/usr/isteps/istep10/host_proc_pcie_scominit.H
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep08/host_proc_pcie_scominit.H $ */
+/* $Source: src/usr/isteps/istep10/host_proc_pcie_scominit.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
@@ -30,7 +30,7 @@
/******************************************************************************/
#include <stdint.h>
-namespace ISTEP_08
+namespace ISTEP_10
{
/**
diff --git a/src/usr/isteps/istep10/makefile b/src/usr/isteps/istep10/makefile
index c5d4e88d1..f0101903d 100644
--- a/src/usr/isteps/istep10/makefile
+++ b/src/usr/isteps/istep10/makefile
@@ -28,7 +28,12 @@ MODULE = istep10
NEST_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest
INITFILES_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/initfiles
PERV_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv
+PROCEDURES_PATH += ${ROOTPATH}/src/import/chips/p9/procedures
+EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/pm/
+EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/io/
+EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/lib/
+EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/pm/include/registers
EXTRAINCDIR += ${ROOTPATH}/src/usr/isteps/
EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/
EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/
@@ -40,11 +45,26 @@ EXTRAINCDIR += ${PERV_HWP_PATH}
OBJS += call_proc_build_smp.o
OBJS += call_host_slave_sbe_update.o
+OBJS += call_host_set_voltages.o
+OBJS += call_proc_cen_ref_clk_enable.o
+OBJS += call_proc_enable_osclite.o
+OBJS += call_proc_chiplet_scominit.o
+OBJS += call_proc_abus_scominit.o
+OBJS += call_proc_obus_scominit.o
+OBJS += call_proc_npu_scominit.o
+OBJS += call_proc_pcie_scominit.o
+OBJS += call_proc_scomoverride_chiplets.o
+OBJS += call_proc_chiplet_enable_ridi.o
+OBJS += call_host_rng_bist.o
OBJS += call_host_update_redundant_tpm.o
+OBJS += host_proc_pcie_scominit.o
VPATH += ${NEST_HWP_PATH}
VPATH += ${INITFILES_HWP_PATH}
VPATH += ${PERV_HWP_PATH}
+VPATH += ${PROCEDURES_PATH}/hwp/io/
+VPATH += ${PROCEDURES_PATH}/hwp/pm/
+VPATH += ${PROCEDURES_PATH}/hwp/lib/
#Required include before all the procedure.mk are included
include ${ROOTPATH}/procedure.rules.mk
@@ -55,4 +75,52 @@ include ${INITFILES_HWP_PATH}/p9_fbc_ab_hp_scom.mk
include ${INITFILES_HWP_PATH}/p9_fbc_cd_hp_scom.mk
include ${PERV_HWP_PATH}/p9_update_security_ctrl.mk
+# proc_chiplet_scominit : Scom inits to all chiplets (sans Quad)
+include ${PROCEDURES_PATH}/hwp/nest/p9_chiplet_scominit.mk
+include ${PROCEDURES_PATH}/hwp/nest/p9_psi_scominit.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_psi_scom.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_fbc_ioo_tl_scom.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_fbc_ioo_dl_scom.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_nx_scom.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_cxa_scom.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_mmu_scom.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_int_scom.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_vas_scom.mk
+
+# proc_obus_scominit : Apply scom inits to Obus
+include ${PROCEDURES_PATH}/hwp/io/p9_io_obus_scominit.mk
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_obus_scom.mk
+
+# proc_npu_scominit : Apply scom inits to NPU bus
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_npu_scom.mk
+include ${PROCEDURES_PATH}/hwp/nest/p9_npu_scominit.mk
+include ${PROCEDURES_PATH}/hwp/perv/p9_nv_ref_clk_enable.mk
+
+# proc_pcie_scominit : Apply scom inits to PCIe chiplets
+include ${PROCEDURES_PATH}/hwp/nest/p9_pcie_scominit.mk
+
+# p9_mcs_scom
+include ${PROCEDURES_PATH}/hwp/initfiles/p9_mcs_scom.mk
+
+# proc_scomoverride_chiplets : Apply sequenced scom inits
+include ${PROCEDURES_PATH}/hwp/nest/p9_scomoverride_chiplets.mk
+
+# proc_chiplet_enable_ridi : Apply RI/DI chip wide
+include ${PROCEDURES_PATH}/hwp/perv/p9_chiplet_enable_ridi.mk
+
+# host_rng_bist : Trigger Built In Self Test
+# HWP not ready - p9_trigger_rng_bist.mk
+include ${PROCEDURES_PATH}/hwp/nest/p9_rng_init_phase1.mk
+
+# p9_setup_evid : apply voltage settings
+include ${PROCEDURES_PATH}/hwp/pm/p9_setup_evid.mk
+include ${PROCEDURES_PATH}/hwp/lib/p9_avsbus_lib.mk
+
+# p9_avsbus_lib.mk sets MODULE, reset here to istep10
+MODULE = istep10
+
+# TODO RTC: 164237
+# Take another look at PM lib
+include $(PROCEDURES_PATH)/hwp/pm/p9_pm_utils.mk
+
include ${ROOTPATH}/config.mk
diff --git a/src/usr/isteps/istep16/call_p9_rng_init_phase2.C b/src/usr/isteps/istep16/call_host_secure_rng.C
index 4aeb4917e..5a5150475 100644
--- a/src/usr/isteps/istep16/call_p9_rng_init_phase2.C
+++ b/src/usr/isteps/istep16/call_host_secure_rng.C
@@ -1,7 +1,7 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/usr/isteps/istep16/call_p9_rng_init_phase2.C $ */
+/* $Source: src/usr/isteps/istep16/call_host_secure_rng.C $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
@@ -24,7 +24,7 @@
/* IBM_PROLOG_END_TAG */
/**
- * @file call_p9_rng_init_phase2.C
+ * @file call_host_secure_rng.C
*
* Support file for IStep: core_activate
* Core Activate
@@ -70,16 +70,16 @@ using namespace ERRORLOG;
using namespace TARGETING;
//******************************************************************************
-// wrapper function to call p9_rng_init_phase2
+// wrapper function to call host_secure_rng
//******************************************************************************
-void* call_p9_rng_init_phase2( void *io_pArgs )
+void* call_host_secure_rng( void *io_pArgs )
{
errlHndl_t l_err = NULL;
IStepError l_StepError;
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_p9_rng_init_phase2 entry" );
+ "call_host_secure_rng entry" );
//
// get a list of all the procs in the system
//
@@ -93,7 +93,7 @@ void* call_p9_rng_init_phase2( void *io_pArgs )
l_cpu_target);
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "Running p9_rng_init_phase2 HWP on processor target %.8X",
+ "Running host_secure_rng HWP on processor target %.8X",
TARGETING::get_huid(l_cpu_target) );
FAPI_INVOKE_HWP(l_err, p9_rng_init_phase2, l_fapi2_proc_target);
@@ -109,7 +109,7 @@ void* call_p9_rng_init_phase2( void *io_pArgs )
} // end of going through all processors
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "call_p9_rng_init_phase2 exit");
+ "call_host_secure_rng exit");
return l_StepError.getErrorHandle();
}
diff --git a/src/usr/isteps/istep16/makefile b/src/usr/isteps/istep16/makefile
index c04dc08f2..03841b227 100644
--- a/src/usr/isteps/istep16/makefile
+++ b/src/usr/isteps/istep16/makefile
@@ -41,7 +41,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/
OBJS += call_host_activate_master.o
OBJS += call_host_activate_slave_cores.o
-OBJS += call_p9_rng_init_phase2.o
+OBJS += call_host_secure_rng.o
OBJS += call_mss_scrub.o
OBJS += call_host_ipl_complete.o
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