PRD: Axone memory updates from RAS XML

Change-Id: I02c7094b992a12d6232543bc008375cfb0b39f4e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78906
Reviewed-by: Benjamen G. Tyner <ben.tyner@ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78996
Tested-by: Zane C. Shelley <zshelle@us.ibm.com>

9 files changed, 388 insertions, 202 deletions

diff --git a/src/usr/diag/prdf/common/plat/axone/axone_mc.rule b/src/usr/diag/prdf/common/plat/axone/axone_mc.rule
index fd857ce81..f23fee7d2 100644
--- a/src/usr/diag/prdf/common/plat/axone/axone_mc.rule
+++ b/src/usr/diag/prdf/common/plat/axone/axone_mc.rule
@@ -595,7 +595,7 @@ group gMCMISCFIR
     /** MCMISCFIR[2]
      *  SCOM recoverable register parity error
      */
-    (rMCMISCFIR, bit(2)) ? defaultMaskedError;
+    (rMCMISCFIR, bit(2)) ? self_th_1;
 
     /** MCMISCFIR[3]
      *  Spare
diff --git a/src/usr/diag/prdf/common/plat/axone/axone_mcc.rule b/src/usr/diag/prdf/common/plat/axone/axone_mcc.rule
index 6d18c46e3..31f663c77 100644
--- a/src/usr/diag/prdf/common/plat/axone/axone_mcc.rule
+++ b/src/usr/diag/prdf/common/plat/axone/axone_mcc.rule
@@ -180,22 +180,22 @@ rule rDSTLFIR
 
 group gDSTLFIR
     filter singlebit,
-           cs_root_cause(0,4,12,13,16,17,22,23)
+           cs_root_cause(0,4)
 {
     /** DSTLFIR[0]
      *  AFU initiated Checkstop on Subchannel A
      */
-    (rDSTLFIR, bit(0)) ? analyzeConnectedExplorer_0_UERE;
+    (rDSTLFIR, bit(0)) ? analyze_ocmb_chnl0_UERE;
 
     /** DSTLFIR[1]
      *  AFU initiated Recoverable Attn on Subchannel A
      */
-    (rDSTLFIR, bit(1)) ? analyzeConnectedExplorer_0;
+    (rDSTLFIR, bit(1)) ? analyze_ocmb_chnl0;
 
     /** DSTLFIR[2]
      *  AFU initiated Special Attn on Subchannel A
      */
-    (rDSTLFIR, bit(2)) ? analyzeConnectedExplorer_0;
+    (rDSTLFIR, bit(2)) ? analyze_ocmb_chnl0;
 
     /** DSTLFIR[3]
      *  AFU initiated Application Interrupt Attn on Subchannel A
@@ -205,17 +205,17 @@ group gDSTLFIR
     /** DSTLFIR[4]
      *  AFU initiated Checkstop on Subchannel B
      */
-    (rDSTLFIR, bit(4)) ? analyzeConnectedExplorer_1_UERE;
+    (rDSTLFIR, bit(4)) ? analyze_ocmb_chnl1_UERE;
 
     /** DSTLFIR[5]
      *  AFU initiated Recoverable Attn on Subchannel B
      */
-    (rDSTLFIR, bit(5)) ? analyzeConnectedExplorer_1;
+    (rDSTLFIR, bit(5)) ? analyze_ocmb_chnl1;
 
     /** DSTLFIR[6]
      *  AFU initiated Special Attn on Subchannel B
      */
-    (rDSTLFIR, bit(6)) ? analyzeConnectedExplorer_1;
+    (rDSTLFIR, bit(6)) ? analyze_ocmb_chnl1;
 
     /** DSTLFIR[7]
      *  AFU initiated Application Interrupt Attn on Subchannel B
@@ -245,32 +245,32 @@ group gDSTLFIR
     /** DSTLFIR[12]
      *  Subchannel A counter error
      */
-    (rDSTLFIR, bit(12)) ? omi_0_and_explorer_0_th_1_UERE;
+    (rDSTLFIR, bit(12)) ? chnl0_omi_bus_th_1;
 
     /** DSTLFIR[13]
      *  Subchannel B counter error
      */
-    (rDSTLFIR, bit(13)) ? omi_1_and_explorer_1_th_1_UERE;
+    (rDSTLFIR, bit(13)) ? chnl1_omi_bus_th_1;
 
     /** DSTLFIR[14]
      *  Subchannel A timeout error
      */
-    (rDSTLFIR, bit(14)) ? omi_0_and_explorer_0_th_32_perDay;
+    (rDSTLFIR, bit(14)) ? chnl0_omi_bus_th_32_perDay;
 
     /** DSTLFIR[15]
      *  Subchannel B timeout error
      */
-    (rDSTLFIR, bit(15)) ? omi_1_and_explorer_1_th_32_perDay;
+    (rDSTLFIR, bit(15)) ? chnl1_omi_bus_th_32_perDay;
 
     /** DSTLFIR[16]
      *  Subchannel A buffer overuse error
      */
-    (rDSTLFIR, bit(16)) ? explorer_0_th_1_UERE;
+    (rDSTLFIR, bit(16)) ? chnl0_ocmb_th_1;
 
     /** DSTLFIR[17]
      *  Subchannel B buffer overuse error
      */
-    (rDSTLFIR, bit(17)) ? explorer_1_th_1_UERE;
+    (rDSTLFIR, bit(17)) ? chnl1_ocmb_th_1;
 
     /** DSTLFIR[18]
      *  Subchannel A DL link down
@@ -295,12 +295,12 @@ group gDSTLFIR
     /** DSTLFIR[22]
      *  DSTLFIR channel timeout on subch A
      */
-    (rDSTLFIR, bit(22)) ? omi_0_and_explorer_0_th_1_UERE;
+    (rDSTLFIR, bit(22)) ? chnl0_omi_bus_th_1;
 
     /** DSTLFIR[23]
      *  DSTLFIR channel timeout on subch B
      */
-    (rDSTLFIR, bit(23)) ? omi_1_and_explorer_1_th_1_UERE;
+    (rDSTLFIR, bit(23)) ? chnl1_omi_bus_th_1;
 
     /** DSTLFIR[24:25]
      *  spare
@@ -342,22 +342,22 @@ group gUSTLFIR
     /** USTLFIR[0]
      *  Chan A unexpected data error
      */
-    (rUSTLFIR, bit(0)) ? defaultMaskedError;
+    (rUSTLFIR, bit(0)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[1]
      *  Chan B unexpected data error
      */
-    (rUSTLFIR, bit(1)) ? defaultMaskedError;
+    (rUSTLFIR, bit(1)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[2]
      *  Chan A invalid template error
      */
-    (rUSTLFIR, bit(2)) ? defaultMaskedError;
+    (rUSTLFIR, bit(2)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[3]
      *  Chan B invalid template error
      */
-    (rUSTLFIR, bit(3)) ? defaultMaskedError;
+    (rUSTLFIR, bit(3)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[4]
      *  Chan A half speed mode
@@ -372,12 +372,12 @@ group gUSTLFIR
     /** USTLFIR[6]
      *  WDF buffer CE
      */
-    (rUSTLFIR, bit(6)) ? defaultMaskedError;
+    (rUSTLFIR, bit(6)) ? self_th_32perDay;
 
     /** USTLFIR[7]
      *  WDF buffer UE
      */
-    (rUSTLFIR, bit(7)) ? defaultMaskedError;
+    (rUSTLFIR, bit(7)) ? self_th_1;
 
     /** USTLFIR[8]
      *  WDF buffer SUE
@@ -387,32 +387,32 @@ group gUSTLFIR
     /** USTLFIR[9]
      *  WDF buffer overrun
      */
-    (rUSTLFIR, bit(9)) ? defaultMaskedError;
+    (rUSTLFIR, bit(9)) ? self_th_1;
 
     /** USTLFIR[10]
      *  WDF tag parity error
      */
-    (rUSTLFIR, bit(10)) ? defaultMaskedError;
+    (rUSTLFIR, bit(10)) ? self_th_1;
 
     /** USTLFIR[11]
      *  WDF scom sequencer error
      */
-    (rUSTLFIR, bit(11)) ? defaultMaskedError;
+    (rUSTLFIR, bit(11)) ? self_th_1;
 
     /** USTLFIR[12]
      *  WDF pwctl sequencer error
      */
-    (rUSTLFIR, bit(12)) ? defaultMaskedError;
+    (rUSTLFIR, bit(12)) ? self_th_1;
 
     /** USTLFIR[13]
      *  WDF misc_reg parity error
      */
-    (rUSTLFIR, bit(13)) ? defaultMaskedError;
+    (rUSTLFIR, bit(13)) ? self_th_1;
 
     /** USTLFIR[14]
      *  WDF MCA async error
      */
-    (rUSTLFIR, bit(14)) ? defaultMaskedError;
+    (rUSTLFIR, bit(14)) ? self_th_1;
 
     /** USTLFIR[15]
      *  WDF Data Syndrome NE0
@@ -422,32 +422,32 @@ group gUSTLFIR
     /** USTLFIR[16]
      *  WDF CMT parity error
      */
-    (rUSTLFIR, bit(16)) ? defaultMaskedError;
+    (rUSTLFIR, bit(16)) ? self_th_1;
 
     /** USTLFIR[17]
-     *  TBD
+     *  spare
      */
     (rUSTLFIR, bit(17)) ? defaultMaskedError;
 
     /** USTLFIR[18]
-     *  TBD
+     *  spare
      */
     (rUSTLFIR, bit(18)) ? defaultMaskedError;
 
     /** USTLFIR[19]
-     *  TBD
+     *  Read Buffers overflowed/underflowed
      */
-    (rUSTLFIR, bit(19)) ? defaultMaskedError;
+    (rUSTLFIR, bit(19)) ? all_ocmb_and_mcc_th_1;
 
     /** USTLFIR[20]
      *  WRT Buffer CE
      */
-    (rUSTLFIR, bit(20)) ? defaultMaskedError;
+    (rUSTLFIR, bit(20)) ? parent_proc_th_32perDay;
 
     /** USTLFIR[21]
      *  WRT Buffer UE
      */
-    (rUSTLFIR, bit(21)) ? defaultMaskedError;
+    (rUSTLFIR, bit(21)) ? parent_proc_th_1;
 
     /** USTLFIR[22]
      *  WRT Buffer SUE
@@ -457,12 +457,12 @@ group gUSTLFIR
     /** USTLFIR[23]
      *  WRT scom sequencer error
      */
-    (rUSTLFIR, bit(23)) ? defaultMaskedError;
+    (rUSTLFIR, bit(23)) ? self_th_1;
 
     /** USTLFIR[24]
      *  WRT misc_reg parity error
      */
-    (rUSTLFIR, bit(24)) ? defaultMaskedError;
+    (rUSTLFIR, bit(24)) ? self_th_1;
 
     /** USTLFIR[25:26]
      *  WRT error information spares
@@ -472,22 +472,22 @@ group gUSTLFIR
     /** USTLFIR[27]
      *  Chan A fail response checkstop
      */
-    (rUSTLFIR, bit(27)) ? defaultMaskedError;
+    (rUSTLFIR, bit(27)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[28]
      *  Chan B fail response checkstop
      */
-    (rUSTLFIR, bit(28)) ? defaultMaskedError;
+    (rUSTLFIR, bit(28)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[29]
      *  Chan A fail response recoverable
      */
-    (rUSTLFIR, bit(29)) ? defaultMaskedError;
+    (rUSTLFIR, bit(29)) ? threshold_and_mask_chnl0_ocmb_th_1;
 
     /** USTLFIR[30]
      *  Chan B fail response recoverable
      */
-    (rUSTLFIR, bit(30)) ? defaultMaskedError;
+    (rUSTLFIR, bit(30)) ? threshold_and_mask_chnl1_ocmb_th_1;
 
     /** USTLFIR[31]
      *  Chan A lol drop checkstop
@@ -502,72 +502,72 @@ group gUSTLFIR
     /** USTLFIR[33]
      *  Chan A lol drop recoverable
      */
-    (rUSTLFIR, bit(33)) ? defaultMaskedError;
+    (rUSTLFIR, bit(33)) ? chnl0_ocmb_H_omi_L_th_1;
 
     /** USTLFIR[34]
      *  Chan B lol drop recoverable
      */
-    (rUSTLFIR, bit(34)) ? defaultMaskedError;
+    (rUSTLFIR, bit(34)) ? chnl1_ocmb_H_omi_L_th_1;
 
     /** USTLFIR[35]
      *  Chan A flit parity error
      */
-    (rUSTLFIR, bit(35)) ? defaultMaskedError;
+    (rUSTLFIR, bit(35)) ? chnl0_omi_th_1;
 
     /** USTLFIR[36]
      *  Chan B flit parity error
      */
-    (rUSTLFIR, bit(36)) ? defaultMaskedError;
+    (rUSTLFIR, bit(36)) ? chnl1_omi_th_1;
 
     /** USTLFIR[37]
      *  Chan A fatal parity error
      */
-    (rUSTLFIR, bit(37)) ? defaultMaskedError;
+    (rUSTLFIR, bit(37)) ? chnl0_omi_th_1;
 
     /** USTLFIR[38]
      *  Chan B fatal parity error
      */
-    (rUSTLFIR, bit(38)) ? defaultMaskedError;
+    (rUSTLFIR, bit(38)) ? chnl1_omi_th_1;
 
     /** USTLFIR[39]
      *  Chan A more than 2 data flits for template 9
      */
-    (rUSTLFIR, bit(39)) ? defaultMaskedError;
+    (rUSTLFIR, bit(39)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[40]
      *  Chan B more than 2 data flits for template 9
      */
-    (rUSTLFIR, bit(40)) ? defaultMaskedError;
+    (rUSTLFIR, bit(40)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[41]
      *  Chan A excess bad data bits
      */
-    (rUSTLFIR, bit(41)) ? defaultMaskedError;
+    (rUSTLFIR, bit(41)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[42]
      *  Chan B excess bad data bits
      */
-    (rUSTLFIR, bit(42)) ? defaultMaskedError;
+    (rUSTLFIR, bit(42)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[43]
      *  Chan A memory read data returned in template 0
      */
-    (rUSTLFIR, bit(43)) ? defaultMaskedError;
+    (rUSTLFIR, bit(43)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[44]
      *  Chan B memory read data returned in template 0
      */
-    (rUSTLFIR, bit(44)) ? defaultMaskedError;
+    (rUSTLFIR, bit(44)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[45]
      *  Chan A MMIO in lol mode
      */
-    (rUSTLFIR, bit(45)) ? defaultMaskedError;
+    (rUSTLFIR, bit(45)) ? chnl0_omi_th_1;
 
     /** USTLFIR[46]
      *  Chan B MMIO in lol mode
      */
-    (rUSTLFIR, bit(46)) ? defaultMaskedError;
+    (rUSTLFIR, bit(46)) ? chnl1_omi_th_1;
 
     /** USTLFIR[47]
      *  Chan A bad data
@@ -582,62 +582,62 @@ group gUSTLFIR
     /** USTLFIR[49]
      *  Chan A excess data error
      */
-    (rUSTLFIR, bit(49)) ? defaultMaskedError;
+    (rUSTLFIR, bit(49)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[50]
      *  Chan B excess data error
      */
-    (rUSTLFIR, bit(50)) ? defaultMaskedError;
+    (rUSTLFIR, bit(50)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[51]
      *  Chan A Bad CRC data not valid error
      */
-    (rUSTLFIR, bit(51)) ? defaultMaskedError;
+    (rUSTLFIR, bit(51)) ? chnl0_omi_th_1;
 
     /** USTLFIR[52]
      *  Chan B Bad CRC data not valid error
      */
-    (rUSTLFIR, bit(52)) ? defaultMaskedError;
+    (rUSTLFIR, bit(52)) ? chnl1_omi_th_1;
 
     /** USTLFIR[53]
      *  Chan A FIFO overflow error
      */
-    (rUSTLFIR, bit(53)) ? defaultMaskedError;
+    (rUSTLFIR, bit(53)) ? chnl0_omi_th_1;
 
     /** USTLFIR[54]
      *  Chan B FIFO overflow error
      */
-    (rUSTLFIR, bit(54)) ? defaultMaskedError;
+    (rUSTLFIR, bit(54)) ? chnl1_omi_th_1;
 
     /** USTLFIR[55]
      *  Chan A invalid cmd error
      */
-    (rUSTLFIR, bit(55)) ? defaultMaskedError;
+    (rUSTLFIR, bit(55)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[56]
      *  Chan B invalid cmd error
      */
-    (rUSTLFIR, bit(56)) ? defaultMaskedError;
+    (rUSTLFIR, bit(56)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[57]
      *  Fatal reg parity error
      */
-    (rUSTLFIR, bit(57)) ? defaultMaskedError;
+    (rUSTLFIR, bit(57)) ? self_th_1;
 
     /** USTLFIR[58]
      *  Recoverable reg parity error
      */
-    (rUSTLFIR, bit(58)) ? defaultMaskedError;
+    (rUSTLFIR, bit(58)) ? self_th_1;
 
     /** USTLFIR[59]
      *  Chan A invalid DL DP combo
      */
-    (rUSTLFIR, bit(59)) ? defaultMaskedError;
+    (rUSTLFIR, bit(59)) ? chnl0_ocmb_th_1;
 
     /** USTLFIR[60]
      *  Chan B invalid DL DP combo
      */
-    (rUSTLFIR, bit(60)) ? defaultMaskedError;
+    (rUSTLFIR, bit(60)) ? chnl1_ocmb_th_1;
 
     /** USTLFIR[61]
      *  spare
diff --git a/src/usr/diag/prdf/common/plat/axone/axone_mcc_actions.rule b/src/usr/diag/prdf/common/plat/axone/axone_mcc_actions.rule
index 4744535d2..5081420f8 100644
--- a/src/usr/diag/prdf/common/plat/axone/axone_mcc_actions.rule
+++ b/src/usr/diag/prdf/common/plat/axone/axone_mcc_actions.rule
@@ -23,47 +23,131 @@
 #
 # IBM_PROLOG_END_TAG
 
-actionclass omi_0_and_explorer_0_th_1_UERE
+################################################################################
+# Callouts
+################################################################################
+
+actionclass chnl0_omi
 {
-    SueSource;
-    callout(connected(TYPE_OMI,       0), MRU_MEDA);
-    callout(connected(TYPE_OCMB_CHIP, 0), MRU_MEDA);
+    callout(connected(TYPE_OMI,0), MRU_MED);
+};
+
+actionclass chnl1_omi
+{
+    callout(connected(TYPE_OMI,1), MRU_MED);
+};
+
+actionclass chnl0_omi_L
+{
+    callout(connected(TYPE_OMI,0), MRU_LOW);
+};
+
+actionclass chnl1_omi_L
+{
+    callout(connected(TYPE_OMI,1), MRU_LOW);
+};
+
+actionclass chnl0_ocmb
+{
+    callout(connected(TYPE_OCMB_CHIP,0), MRU_MED);
+};
+
+actionclass chnl1_ocmb
+{
+    callout(connected(TYPE_OCMB_CHIP,1), MRU_MED);
+};
+
+actionclass chnl0_omi_bus
+{
+    funccall("omiParentCalloutBusInterfacePlugin_0");
+};
+
+actionclass chnl1_omi_bus
+{
+    funccall("omiParentCalloutBusInterfacePlugin_1");
+};
+
+actionclass chnl0_omi_bus_th_1
+{
+    chnl0_omi_bus;
     threshold1;
 };
 
-actionclass omi_0_and_explorer_0_th_32_perDay
+actionclass chnl1_omi_bus_th_1
 {
-    callout(connected(TYPE_OMI,       0), MRU_MEDA);
-    callout(connected(TYPE_OCMB_CHIP, 0), MRU_MEDA);
+    chnl1_omi_bus;
+    threshold1;
+};
+
+actionclass chnl0_omi_bus_th_32_perDay
+{
+    chnl0_omi_bus;
     threshold32pday;
 };
 
-actionclass explorer_0_th_1_UERE
+actionclass chnl1_omi_bus_th_32_perDay
 {
-    SueSource;
-    callout(connected(TYPE_OCMB_CHIP, 0), MRU_MED);
+    chnl1_omi_bus;
+    threshold32pday;
+};
+
+actionclass chnl0_omi_th_1
+{
+    chnl0_omi;
     threshold1;
 };
 
-actionclass omi_1_and_explorer_1_th_1_UERE
+actionclass chnl1_omi_th_1
 {
-    SueSource;
-    callout(connected(TYPE_OMI,       1), MRU_MEDA);
-    callout(connected(TYPE_OCMB_CHIP, 1), MRU_MEDA);
+    chnl1_omi;
     threshold1;
 };
 
-actionclass omi_1_and_explorer_1_th_32_perDay
+actionclass chnl0_ocmb_th_1
 {
-    callout(connected(TYPE_OMI,       1), MRU_MEDA);
-    callout(connected(TYPE_OCMB_CHIP, 1), MRU_MEDA);
-    threshold32pday;
+    chnl0_ocmb;
+    threshold1;
 };
 
-actionclass explorer_1_th_1_UERE
+actionclass chnl1_ocmb_th_1
 {
-    SueSource;
-    callout(connected(TYPE_OCMB_CHIP, 1), MRU_MED);
+    chnl1_ocmb;
+    threshold1;
+};
+
+actionclass all_ocmb_and_mcc_th_1
+{
+    chnl0_ocmb;
+    chnl1_ocmb;
+    calloutSelfMed;
+    threshold1;
+};
+
+actionclass chnl0_ocmb_H_omi_L_th_1
+{
+    chnl0_ocmb;
+    chnl0_omi_L;
+    threshold1;
+};
+
+actionclass chnl1_ocmb_H_omi_L_th_1
+{
+    chnl1_ocmb;
+    chnl1_omi_L;
+    threshold1;
+};
+
+actionclass threshold_and_mask_chnl0_ocmb_th_1
+{
+    threshold_and_mask;
+    chnl0_ocmb;
+    threshold1;
+};
+
+actionclass threshold_and_mask_chnl1_ocmb_th_1
+{
+    threshold_and_mask;
+    chnl1_ocmb;
     threshold1;
 };
 
@@ -78,25 +162,25 @@ actionclass analyzeUSTLFIR { analyze(gUSTLFIR); };
 # Analyze connected
 ################################################################################
 
-actionclass analyzeConnectedExplorer_0
+actionclass analyze_ocmb_chnl0
 {
     analyze(connected(TYPE_OCMB_CHIP, 0));
 };
 
-actionclass analyzeConnectedExplorer_1
+actionclass analyze_ocmb_chnl1
 {
     analyze(connected(TYPE_OCMB_CHIP, 1));
 };
 
-actionclass analyzeConnectedExplorer_0_UERE
+actionclass analyze_ocmb_chnl0_UERE
 {
     SueSource;
-    analyzeConnectedExplorer_0;
+    analyze_ocmb_chnl0;
 };
 
-actionclass analyzeConnectedExplorer_1_UERE
+actionclass analyze_ocmb_chnl1_UERE
 {
     SueSource;
-    analyzeConnectedExplorer_1;
+    analyze_ocmb_chnl1;
 };
 
diff --git a/src/usr/diag/prdf/common/plat/axone/axone_mi.rule b/src/usr/diag/prdf/common/plat/axone/axone_mi.rule
index 2e4d522e3..56366a7f5 100644
--- a/src/usr/diag/prdf/common/plat/axone/axone_mi.rule
+++ b/src/usr/diag/prdf/common/plat/axone/axone_mi.rule
@@ -153,7 +153,7 @@ group gMCFIR
     /** MCFIR[1]
      *  MC internal non recoverable error
      */
-    (rMCFIR, bit(1)) ? self_th_1;
+    (rMCFIR, bit(1)) ? parent_proc_th_1;
 
     /** MCFIR[2]
      *  Powerbus protocol error
@@ -183,7 +183,7 @@ group gMCFIR
     /** MCFIR[8]
      *  Command list timeout
      */
-    (rMCFIR, bit(8)) ? threshold_and_mask_self;
+    (rMCFIR, bit(8)) ? threshold_and_mask_level2;
 
     /** MCFIR[9:10]
      *  reserved
@@ -218,7 +218,7 @@ group gMCFIR
     /** MCFIR[17]
      *  WAT debug config reg error
      */
-    (rMCFIR, bit(17)) ? threshold_and_mask_self;
+    (rMCFIR, bit(17)) ? defaultMaskedError;
 
     /** MCFIR[18:21]
      *  reserved
diff --git a/src/usr/diag/prdf/common/plat/axone/axone_omic.rule b/src/usr/diag/prdf/common/plat/axone/axone_omic.rule
index 09ed59f2d..9e1e6ebc0 100644
--- a/src/usr/diag/prdf/common/plat/axone/axone_omic.rule
+++ b/src/usr/diag/prdf/common/plat/axone/axone_omic.rule
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2018
+# Contributors Listed Below - COPYRIGHT 2018,2019
 # [+] International Business Machines Corp.
 #
 #
@@ -226,17 +226,17 @@ group gIOOMIFIR
     /** IOOMIFIR[0]
      *  RX invalid state or parity error
      */
-    (rIOOMIFIR, bit(0)) ? defaultMaskedError;
+    (rIOOMIFIR, bit(0)) ? self_th_1;
 
     /** IOOMIFIR[1]
      *  TX invalid state or parity error
      */
-    (rIOOMIFIR, bit(1)) ? defaultMaskedError;
+    (rIOOMIFIR, bit(1)) ? self_th_1;
 
     /** IOOMIFIR[2]
      *  GCR hang error
      */
-    (rIOOMIFIR, bit(2)) ? defaultMaskedError;
+    (rIOOMIFIR, bit(2)) ? self_th_1;
 
     /** IOOMIFIR[3:47]
      *  Unused
@@ -363,302 +363,302 @@ group gOMIDLFIR
            cs_root_cause
 {
     /** OMIDLFIR[0]
-     *  DL0 fatal error
+     *  OMI-DL0 fatal error
      */
-    (rOMIDLFIR, bit(0)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(0)) ? dl0_fatal_error;
 
     /** OMIDLFIR[1]
-     *  DL0 data UE
+     *  OMI-DL0 UE on data flit
      */
-    (rOMIDLFIR, bit(1)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(1)) ? dl0_omi_th_1;
 
     /** OMIDLFIR[2]
-     *  DL0 flit CE
+     *  OMI-DL0 CE on TL flit
      */
-    (rOMIDLFIR, bit(2)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(2)) ? dl0_omi_th_32perDay;
 
     /** OMIDLFIR[3]
-     *  DL0 CRC error
+     *  OMI-DL0 detected a CRC error
      */
     (rOMIDLFIR, bit(3)) ? defaultMaskedError;
 
     /** OMIDLFIR[4]
-     *  DL0 nack
+     *  OMI-DL0 received a nack
      */
     (rOMIDLFIR, bit(4)) ? defaultMaskedError;
 
     /** OMIDLFIR[5]
-     *  DL0 X4 mode
+     *  OMI-DL0 running in degraded mode
      */
-    (rOMIDLFIR, bit(5)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(5)) ? dl0_omi_bus_th_1;
 
     /** OMIDLFIR[6]
-     *  DL0 EDPL
+     *  OMI-DL0 parity error detection on a lane
      */
     (rOMIDLFIR, bit(6)) ? defaultMaskedError;
 
     /** OMIDLFIR[7]
-     *  DL0 timeout
+     *  OMI-DL0 retrained due to no forward progress
      */
-    (rOMIDLFIR, bit(7)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(7)) ? dl0_omi_bus_th_32perDay;
 
     /** OMIDLFIR[8]
-     *  DL0 remote retrain
+     *  OMI-DL0 remote side initiated a retrain
      */
     (rOMIDLFIR, bit(8)) ? defaultMaskedError;
 
     /** OMIDLFIR[9]
-     *  DL0 error retrain
+     *  OMI-DL0 retrain due to internal error or software initiated
      */
-    (rOMIDLFIR, bit(9)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(9)) ? dl0_omi_bus_th_32perDay;
 
     /** OMIDLFIR[10]
-     *  DL0 EDPL retrain
+     *  OMI-DL0 threshold reached
      */
-    (rOMIDLFIR, bit(10)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(10)) ? dl0_omi_bus_th_32perDay;
 
     /** OMIDLFIR[11]
-     *  DL0 trained
+     *  OMI-DL0 trained
      */
     (rOMIDLFIR, bit(11)) ? defaultMaskedError;
 
     /** OMIDLFIR[12]
-     *  DL0 endpoint bit 0
+     *  OMI-DL0 endpoint error bit 0
      */
     (rOMIDLFIR, bit(12)) ? defaultMaskedError;
 
     /** OMIDLFIR[13]
-     *  DL0 endpoint bit 1
+     *  OMI-DL0 endpoint error bit 1
      */
     (rOMIDLFIR, bit(13)) ? defaultMaskedError;
 
     /** OMIDLFIR[14]
-     *  DL0 endpoint bit 2
+     *  OMI-DL0 endpoint error bit 2
      */
     (rOMIDLFIR, bit(14)) ? defaultMaskedError;
 
     /** OMIDLFIR[15]
-     *  DL0 endpoint bit 3
+     *  OMI-DL0 endpoint error bit 3
      */
     (rOMIDLFIR, bit(15)) ? defaultMaskedError;
 
     /** OMIDLFIR[16]
-     *  DL0 endpoint bit 4
+     *  OMI-DL0 endpoint error bit 4
      */
     (rOMIDLFIR, bit(16)) ? defaultMaskedError;
 
     /** OMIDLFIR[17]
-     *  DL0 endpoint bit 5
+     *  OMI-DL0 endpoint error bit 5
      */
     (rOMIDLFIR, bit(17)) ? defaultMaskedError;
 
     /** OMIDLFIR[18]
-     *  DL0 endpoint bit 6
+     *  OMI-DL0 endpoint error bit 6
      */
     (rOMIDLFIR, bit(18)) ? defaultMaskedError;
 
     /** OMIDLFIR[19]
-     *  DL0 endpoint bit 7
+     *  OMI-DL0 endpoint error bit 7
      */
     (rOMIDLFIR, bit(19)) ? defaultMaskedError;
 
     /** OMIDLFIR[20]
-     *  DL1 fatal error
+     *  OMI-DL1 fatal error
      */
-    (rOMIDLFIR, bit(20)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(20)) ? dl1_fatal_error;
 
     /** OMIDLFIR[21]
-     *  DL1 data UE
+     *  OMI-DL1 UE on data flit
      */
-    (rOMIDLFIR, bit(21)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(21)) ? dl1_omi_th_1;
 
     /** OMIDLFIR[22]
-     *  DL1 flit CE
+     *  OMI-DL1 CE on TL flit
      */
-    (rOMIDLFIR, bit(22)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(22)) ? dl1_omi_th_32perDay;
 
     /** OMIDLFIR[23]
-     *  DL1 CRC error
+     *  OMI-DL1 detected a CRC error
      */
     (rOMIDLFIR, bit(23)) ? defaultMaskedError;
 
     /** OMIDLFIR[24]
-     *  DL1 nack
+     *  OMI-DL1 received a nack
      */
     (rOMIDLFIR, bit(24)) ? defaultMaskedError;
 
     /** OMIDLFIR[25]
-     *  DL1 X4 mode
+     *  OMI-DL1 running in degraded mode
      */
-    (rOMIDLFIR, bit(25)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(25)) ? dl1_omi_bus_th_1;
 
     /** OMIDLFIR[26]
-     *  DL1 EDPL
+     *  OMI-DL1 parity error detection on a lane
      */
     (rOMIDLFIR, bit(26)) ? defaultMaskedError;
 
     /** OMIDLFIR[27]
-     *  DL1 timeout
+     *  OMI-DL1 retrained due to no forward progress
      */
-    (rOMIDLFIR, bit(27)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(27)) ? dl1_omi_bus_th_32perDay;
 
     /** OMIDLFIR[28]
-     *  DL1 remote retrain
+     *  OMI-DL1 remote side initiated a retrain
      */
     (rOMIDLFIR, bit(28)) ? defaultMaskedError;
 
     /** OMIDLFIR[29]
-     *  DL1 error retrain
+     *  OMI-DL1 retrain due to internal error or software initiated
      */
-    (rOMIDLFIR, bit(29)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(29)) ? dl1_omi_bus_th_32perDay;
 
     /** OMIDLFIR[30]
-     *  DL1 EDPL retrain
+     *  OMI-DL1 threshold reached
      */
-    (rOMIDLFIR, bit(30)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(30)) ? dl1_omi_bus_th_32perDay;
 
     /** OMIDLFIR[31]
-     *  DL1 trained
+     *  OMI-DL1 trained
      */
     (rOMIDLFIR, bit(31)) ? defaultMaskedError;
 
     /** OMIDLFIR[32]
-     *  DL1 endpoint bit 0
+     *  OMI-DL1 endpoint error bit 0
      */
     (rOMIDLFIR, bit(32)) ? defaultMaskedError;
 
     /** OMIDLFIR[33]
-     *  DL1 endpoint bit 1
+     *  OMI-DL1 endpoint error bit 1
      */
     (rOMIDLFIR, bit(33)) ? defaultMaskedError;
 
     /** OMIDLFIR[34]
-     *  DL1 endpoint bit 2
+     *  OMI-DL1 endpoint error bit 2
      */
     (rOMIDLFIR, bit(34)) ? defaultMaskedError;
 
     /** OMIDLFIR[35]
-     *  DL1 endpoint bit 3
+     *  OMI-DL1 endpoint error bit 3
      */
     (rOMIDLFIR, bit(35)) ? defaultMaskedError;
 
     /** OMIDLFIR[36]
-     *  DL1 endpoint bit 4
+     *  OMI-DL1 endpoint error bit 4
      */
     (rOMIDLFIR, bit(36)) ? defaultMaskedError;
 
     /** OMIDLFIR[37]
-     *  DL1 endpoint bit 5
+     *  OMI-DL1 endpoint error bit 5
      */
     (rOMIDLFIR, bit(37)) ? defaultMaskedError;
 
     /** OMIDLFIR[38]
-     *  DL1 endpoint bit 6
+     *  OMI-DL1 endpoint error bit 6
      */
     (rOMIDLFIR, bit(38)) ? defaultMaskedError;
 
     /** OMIDLFIR[39]
-     *  DL1 endpoint bit 7
+     *  OMI-DL1 endpoint error bit 7
      */
     (rOMIDLFIR, bit(39)) ? defaultMaskedError;
 
     /** OMIDLFIR[40]
-     *  DL2 fatal error
+     *  OMI-DL2 fatal error
      */
-    (rOMIDLFIR, bit(40)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(40)) ? dl2_fatal_error;
 
     /** OMIDLFIR[41]
-     *  DL2 data UE
+     *  OMI-DL2 UE on data flit
      */
-    (rOMIDLFIR, bit(41)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(41)) ? dl2_omi_th_1;
 
     /** OMIDLFIR[42]
-     *  DL2 flit CE
+     *  OMI-DL2 CE on TL flit
      */
-    (rOMIDLFIR, bit(42)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(42)) ? dl2_omi_th_32perDay;
 
     /** OMIDLFIR[43]
-     *  DL2 CRC error
+     *  OMI-DL2 detected a CRC error
      */
     (rOMIDLFIR, bit(43)) ? defaultMaskedError;
 
     /** OMIDLFIR[44]
-     *  DL2 nack
+     *  OMI-DL2 received a nack
      */
     (rOMIDLFIR, bit(44)) ? defaultMaskedError;
 
     /** OMIDLFIR[45]
-     *  DL2 X4 mode
+     *  OMI-DL2 running in degraded mode
      */
-    (rOMIDLFIR, bit(45)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(45)) ? dl2_omi_bus_th_1;
 
     /** OMIDLFIR[46]
-     *  DL2 EDPL
+     *  OMI-DL2 parity error detection on a lane
      */
     (rOMIDLFIR, bit(46)) ? defaultMaskedError;
 
     /** OMIDLFIR[47]
-     *  DL2 timeout
+     *  OMI-DL2 retrained due to no forward progress
      */
-    (rOMIDLFIR, bit(47)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(47)) ? dl2_omi_bus_th_32perDay;
 
     /** OMIDLFIR[48]
-     *  DL2 remote retrain
+     *  OMI-DL2 remote side initiated a retrain
      */
     (rOMIDLFIR, bit(48)) ? defaultMaskedError;
 
     /** OMIDLFIR[49]
-     *  DL2 error retrain
+     *  OMI-DL2 retrain due to internal error or software initiated
      */
-    (rOMIDLFIR, bit(49)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(49)) ? dl2_omi_bus_th_32perDay;
 
     /** OMIDLFIR[50]
-     *  DL2 EDPL retrain
+     *  OMI-DL2 threshold reached
      */
-    (rOMIDLFIR, bit(50)) ? defaultMaskedError;
+    (rOMIDLFIR, bit(50)) ? dl2_omi_bus_th_32perDay;
 
     /** OMIDLFIR[51]
-     *  DL2 trained
+     *  OMI-DL2 trained
      */
     (rOMIDLFIR, bit(51)) ? defaultMaskedError;
 
     /** OMIDLFIR[52]
-     *  DL2 endpoint bit 0
+     *  OMI-DL2 endpoint error bit 0
      */
     (rOMIDLFIR, bit(52)) ? defaultMaskedError;
 
     /** OMIDLFIR[53]
-     *  DL2 endpoint bit 1
+     *  OMI-DL2 endpoint error bit 1
      */
     (rOMIDLFIR, bit(53)) ? defaultMaskedError;
 
     /** OMIDLFIR[54]
-     *  DL2 endpoint bit 2
+     *  OMI-DL2 endpoint error bit 2
      */
     (rOMIDLFIR, bit(54)) ? defaultMaskedError;
 
     /** OMIDLFIR[55]
-     *  DL2 endpoint bit 3
+     *  OMI-DL2 endpoint error bit 3
      */
     (rOMIDLFIR, bit(55)) ? defaultMaskedError;
 
     /** OMIDLFIR[56]
-     *  DL2 endpoint bit 4
+     *  OMI-DL2 endpoint error bit 4
      */
     (rOMIDLFIR, bit(56)) ? defaultMaskedError;
 
     /** OMIDLFIR[57]
-     *  DL2 endpoint bit 5
+     *  OMI-DL2 endpoint error bit 5
      */
     (rOMIDLFIR, bit(57)) ? defaultMaskedError;
 
     /** OMIDLFIR[58]
-     *  DL2 endpoint bit 6
+     *  OMI-DL2 endpoint error bit 6
      */
     (rOMIDLFIR, bit(58)) ? defaultMaskedError;
 
     /** OMIDLFIR[59]
-     *  DL2 endpoint bit 7
+     *  OMI-DL2 endpoint error bit 7
      */
     (rOMIDLFIR, bit(59)) ? defaultMaskedError;
 
@@ -667,6 +667,21 @@ group gOMIDLFIR
      */
     (rOMIDLFIR, bit(60)) ? defaultMaskedError;
 
+    /** OMIDLFIR[61]
+     *  reserved
+     */
+    (rOMIDLFIR, bit(61)) ? defaultMaskedError;
+
+    /** OMIDLFIR[62]
+     *  LFIR internal parity error
+     */
+    (rOMIDLFIR, bit(62)) ? defaultMaskedError;
+
+    /** OMIDLFIR[63]
+     *  SCOM Satellite Error
+     */
+    (rOMIDLFIR, bit(63)) ? defaultMaskedError;
+
 };
 
  ##############################################################################
diff --git a/src/usr/diag/prdf/common/plat/axone/axone_omic_actions.rule b/src/usr/diag/prdf/common/plat/axone/axone_omic_actions.rule
index 01d1f533a..dbf563b47 100644
--- a/src/usr/diag/prdf/common/plat/axone/axone_omic_actions.rule
+++ b/src/usr/diag/prdf/common/plat/axone/axone_omic_actions.rule
@@ -29,32 +29,32 @@
 
 actionclass dl0_omi
 {
-    callout(connected(TYPE_OMI,0), MRU_HIGH);
+    callout(connected(TYPE_OMI,0), MRU_MED);
 };
 
 actionclass dl1_omi
 {
-    callout(connected(TYPE_OMI,1), MRU_HIGH);
+    callout(connected(TYPE_OMI,1), MRU_MED);
 };
 
 actionclass dl2_omi
 {
-    callout(connected(TYPE_OMI,2), MRU_HIGH);
+    callout(connected(TYPE_OMI,2), MRU_MED);
 };
 
 actionclass dl0_omi_bus
 {
-    funccall("omicCalloutBusInterfacePlugin_0");
+    funccall("omiParentCalloutBusInterfacePlugin_0");
 };
 
 actionclass dl1_omi_bus
 {
-    funccall("omicCalloutBusInterfacePlugin_1");
+    funccall("omiParentCalloutBusInterfacePlugin_1");
 };
 
 actionclass dl2_omi_bus
 {
-    funccall("omicCalloutBusInterfacePlugin_2");
+    funccall("omiParentCalloutBusInterfacePlugin_2");
 };
 
 /** OMI-DL0 Fatal Error */
@@ -78,6 +78,78 @@ actionclass dl2_fatal_error
     threshold1;
 };
 
+actionclass dl0_omi_th_1
+{
+    dl0_omi;
+    threshold1;
+};
+
+actionclass dl1_omi_th_1
+{
+    dl1_omi;
+    threshold1;
+};
+
+actionclass dl2_omi_th_1
+{
+    dl2_omi;
+    threshold1;
+};
+
+actionclass dl0_omi_th_32perDay
+{
+    dl0_omi;
+    threshold32pday;
+};
+
+actionclass dl1_omi_th_32perDay
+{
+    dl1_omi;
+    threshold32pday;
+};
+
+actionclass dl2_omi_th_32perDay
+{
+    dl2_omi;
+    threshold32pday;
+};
+
+actionclass dl0_omi_bus_th_1
+{
+    dl0_omi_bus;
+    threshold1;
+};
+
+actionclass dl1_omi_bus_th_1
+{
+    dl1_omi_bus;
+    threshold1;
+};
+
+actionclass dl2_omi_bus_th_1
+{
+    dl2_omi_bus;
+    threshold1;
+};
+
+actionclass dl0_omi_bus_th_32perDay
+{
+    dl0_omi_bus;
+    threshold1;
+};
+
+actionclass dl1_omi_bus_th_32perDay
+{
+    dl1_omi_bus;
+    threshold1;
+};
+
+actionclass dl2_omi_bus_th_32perDay
+{
+    dl2_omi_bus;
+    threshold1;
+};
+
 ################################################################################
 # Analyze groups
 ################################################################################
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfLaneRepair.C b/src/usr/diag/prdf/common/plat/p9/prdfLaneRepair.C
index a641fbac3..57607cb15 100644
--- a/src/usr/diag/prdf/common/plat/p9/prdfLaneRepair.C
+++ b/src/usr/diag/prdf/common/plat/p9/prdfLaneRepair.C
@@ -1098,17 +1098,18 @@ PRDF_PLUGIN_DEFINE_NS( cumulus_dmi,    LaneRepair, calloutBusInterfacePlugin );
 PRDF_PLUGIN_DEFINE_NS( centaur_membuf, LaneRepair, calloutBusInterfacePlugin );
 
 /**
- * @brief Add callouts for a BUS interface inputting a OMIC target
- * @param  i_chip OMIC chip
+ * @brief Add callouts for a BUS interface inputting an OMIC or MCC target
+ * @param  i_chip OMIC/MCC chip
  * @param  io_sc  Step code data struct.
- * @param  i_dl   The DL relative to the OMIC.
+ * @param  i_pos  The position of the OMI relative to the OMIC/MCC.
  * @return SUCCESS always
  */
 
-int32_t omicCalloutBusInterfacePlugin( ExtensibleChip * i_chip,
-                                   STEP_CODE_DATA_STRUCT & io_sc, uint8_t i_dl )
+int32_t omiParentCalloutBusInterfacePlugin( ExtensibleChip * i_chip,
+                                            STEP_CODE_DATA_STRUCT & io_sc,
+                                            uint8_t i_pos )
 {
-    ExtensibleChip * omi  = getConnectedChild( i_chip, TYPE_OMI, i_dl );
+    ExtensibleChip * omi  = getConnectedChild( i_chip, TYPE_OMI, i_pos );
     ExtensibleChip * ocmb = getConnectedChild( omi, TYPE_OCMB_CHIP, 0 );
 
     // Callout both ends of the bus as well (OMI and OCMB)
@@ -1119,18 +1120,18 @@ int32_t omicCalloutBusInterfacePlugin( ExtensibleChip * i_chip,
     return SUCCESS;
 }
 
-#define OMIC_CALL_BUS_PLUGIN( POS ) \
-int32_t omicCalloutBusInterfacePlugin_##POS( ExtensibleChip * i_chip, \
-                                             STEP_CODE_DATA_STRUCT & io_sc ) \
+#define OMI_PARENT_CALL_BUS_PLUGIN( POS ) \
+int32_t omiParentCalloutBusInterfacePlugin_##POS( ExtensibleChip * i_chip, \
+                                               STEP_CODE_DATA_STRUCT & io_sc ) \
 { \
-    return omicCalloutBusInterfacePlugin( i_chip, io_sc, POS ); \
+    return omiParentCalloutBusInterfacePlugin( i_chip, io_sc, POS ); \
 } \
 PRDF_PLUGIN_DEFINE_NS( axone_omic, LaneRepair, \
-                       omicCalloutBusInterfacePlugin_##POS );
+                       omiParentCalloutBusInterfacePlugin_##POS );
 
-OMIC_CALL_BUS_PLUGIN( 0 );
-OMIC_CALL_BUS_PLUGIN( 1 );
-OMIC_CALL_BUS_PLUGIN( 2 );
+OMI_PARENT_CALL_BUS_PLUGIN( 0 );
+OMI_PARENT_CALL_BUS_PLUGIN( 1 );
+OMI_PARENT_CALL_BUS_PLUGIN( 2 );
 
 //------------------------------------------------------------------------------
 
diff --git a/src/usr/diag/prdf/common/plat/prdfTargetServices.C b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
index ddb7dcaad..3b85d3ca7 100755
--- a/src/usr/diag/prdf/common/plat/prdfTargetServices.C
+++ b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
@@ -595,11 +595,13 @@ TargetService::ASSOCIATION_TYPE getAssociationType( TargetHandle_t i_target,
         { TYPE_MCC,    TYPE_PROC,       TargetService::PARENT_BY_AFFINITY },
         { TYPE_MCC,    TYPE_MI,         TargetService::PARENT_BY_AFFINITY },
         { TYPE_MCC,    TYPE_OMI,        TargetService::CHILD_BY_AFFINITY  },
+        { TYPE_MCC,    TYPE_OCMB_CHIP,  TargetService::CHILD_BY_AFFINITY  },
 
         { TYPE_OMI,    TYPE_OMIC,       TargetService::PARENT_BY_AFFINITY },
         { TYPE_OMI,    TYPE_MCC,        TargetService::PARENT_BY_AFFINITY },
         { TYPE_OMI,    TYPE_OCMB_CHIP,  TargetService::CHILD_BY_AFFINITY  },
 
+        { TYPE_OCMB_CHIP, TYPE_MCC,     TargetService::PARENT_BY_AFFINITY },
         { TYPE_OCMB_CHIP, TYPE_OMI,     TargetService::PARENT_BY_AFFINITY },
         { TYPE_OCMB_CHIP, TYPE_MEM_PORT,TargetService::CHILD_BY_AFFINITY  },
         { TYPE_OCMB_CHIP, TYPE_DIMM,    TargetService::CHILD_BY_AFFINITY  },
@@ -943,6 +945,17 @@ TargetHandle_t getConnectedChild( TargetHandle_t i_target, TYPE i_connType,
                                (i_connPos == (omiPos % MAX_OMI_PER_MCC));
                     } );
         }
+        else if ( TYPE_MCC == trgtType && TYPE_OCMB_CHIP == i_connType )
+        {
+            // i_connPos is position relative to MCC (0-1)
+            itr = std::find_if( list.begin(), list.end(),
+                    [&](const TargetHandle_t & t)
+                    {
+                        uint32_t ocmbPos = getTargetPosition(t);
+                        return (trgtPos   == (ocmbPos / MAX_OCMB_PER_MCC)) &&
+                               (i_connPos == (ocmbPos % MAX_OCMB_PER_MCC));
+                    } );
+        }
         else if ( TYPE_MC == trgtType && TYPE_OMIC == i_connType )
         {
             // i_connPos is position relative to MC (0-2)
diff --git a/src/usr/diag/prdf/common/plugins/prdfParserEnums.H b/src/usr/diag/prdf/common/plugins/prdfParserEnums.H
index af346e57b..cefccd98f 100644
--- a/src/usr/diag/prdf/common/plugins/prdfParserEnums.H
+++ b/src/usr/diag/prdf/common/plugins/prdfParserEnums.H
@@ -111,6 +111,7 @@ enum PositionBounds
     MAX_OMI_PER_OMIC    = 3,
 
     MAX_OCMB_PER_OMI    = 1,
+    MAX_OCMB_PER_MCC    = MAX_OCMB_PER_OMI * MAX_OMI_PER_MCC,
 
     MAX_SUB_PORT        = 2,