path: root/src/usr/diag/prdf/common/plat/axone/axone_mc.rule

# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/axone/axone_mc.rule $
#
# OpenPOWER HostBoot Project
#
# Contributors Listed Below - COPYRIGHT 2018,2019
# [+] International Business Machines Corp.
#
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
# implied. See the License for the specific language governing
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG

chip axone_mc
{
    name        "AXONE MC target";
    targettype  TYPE_MC;
    sigoff      0x0000;
    dump        DUMP_CONTENT_HW;
    scomlen     64;

 #############################################################################
 #                                                                           #
 #  ######                                                                   #
 #  #     #  ######   ####     ###    ####    #####  ######  #####    ####   #
 #  #     #  #       #    #     #    #          #    #       #    #  #       #
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 #  #     #  ######   ####     ###    ####      #    ######  #    #   ####   #
 #                                                                           #
 #############################################################################

    ############################################################################
    # MC Chiplet FIR
    ############################################################################

    register MC_CHIPLET_CS_FIR
    {
        name        "MC Chiplet Checkstop FIR";
        scomaddr    0x07040000;
        capture     group default;
    };

    register MC_CHIPLET_RE_FIR
    {
        name        "MC Chiplet Recoverable FIR";
        scomaddr    0x07040001;
        capture     group default;
    };

    register MC_CHIPLET_FIR_MASK
    {
        name        "MC Chiplet FIR MASK";
        scomaddr    0x07040002;
        capture     group default;
    };

    ############################################################################
    # MC Chiplet Unit Checkstop FIR
    ############################################################################

    register MC_CHIPLET_UCS_FIR
    {
        name        "MC Chiplet Unit Checkstop FIR";
        scomaddr    0x07040018;
        capture     group default;
    };

    register MC_CHIPLET_UCS_FIR_MASK
    {
        name        "MC Chiplet Unit Checkstop FIR MASK";
        scomaddr    0x07040019;
        capture     group default;
    };

    ############################################################################
    # MC Chiplet Host Attention FIR
    ############################################################################

    register MC_CHIPLET_HA_FIR
    {
        name        "MC Chiplet Host Attention FIR";
        scomaddr    0x07040009;
        capture     group default;
    };

    register MC_CHIPLET_HA_FIR_MASK
    {
        name        "MC Chiplet Host Attention FIR MASK";
        scomaddr    0x0704001a;
        capture     group default;
    };

    ############################################################################
    # P9 chip MC_LFIR
    ############################################################################

    register MC_LFIR
    {
        name        "P9 chip MC_LFIR";
        scomaddr    0x0704000a;
        reset       (&, 0x0704000b);
        mask        (|, 0x0704000f);
        capture     group default;
    };

    register MC_LFIR_MASK
    {
        name        "P9 chip MC_LFIR MASK";
        scomaddr    0x0704000d;
        capture     group default;
    };

    register MC_LFIR_ACT0
    {
        name        "P9 chip MC_LFIR ACT0";
        scomaddr    0x07040010;
        capture     group default;
        capture     req nonzero("MC_LFIR");
    };

    register MC_LFIR_ACT1
    {
        name        "P9 chip MC_LFIR ACT1";
        scomaddr    0x07040011;
        capture     group default;
        capture     req nonzero("MC_LFIR");
    };

    ############################################################################
    # P9 MC target MCMISCFIR
    ############################################################################

    register MCMISCFIR
    {
        name        "P9 MC target MCMISCFIR";
        scomaddr    0x07012300;
        reset       (&, 0x07012301);
        mask        (|, 0x07012305);
        capture     group default;
    };

    register MCMISCFIR_MASK
    {
        name        "P9 MC target MCMISCFIR MASK";
        scomaddr    0x07012303;
        capture     group default;
    };

    register MCMISCFIR_ACT0
    {
        name        "P9 MC target MCMISCFIR ACT0";
        scomaddr    0x07012306;
        capture     group default;
        capture     req nonzero("MCMISCFIR");
    };

    register MCMISCFIR_ACT1
    {
        name        "P9 MC target MCMISCFIR ACT1";
        scomaddr    0x07012307;
        capture     group default;
        capture     req nonzero("MCMISCFIR");
    };

# Include registers not defined by the xml
.include "axone_mc_regs.rule";

};

 ##############################################################################
 #                                                                            #
 # ####                                 #                                     #
 # #   # #   # #    #####  ###      #  # #    ##  ##### ###  ###  #   #  ###  #
 # #   # #   # #    #     #        #  #   #  #  #   #    #  #   # ##  # #     #
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 # #   #  ###  #### #####  ###  #    #     #  ##    #   ###  ###  #   #  ###  #
 #                                                                            #
 ##############################################################################

################################################################################
# MC Chiplet FIR
################################################################################

rule rMC_CHIPLET_FIR
{
  CHECK_STOP:
     MC_CHIPLET_CS_FIR       & ~MC_CHIPLET_FIR_MASK & `1fffffffffffffff`;
  RECOVERABLE:
    (MC_CHIPLET_RE_FIR >> 2) & ~MC_CHIPLET_FIR_MASK & `1fffffffffffffff`;
};

group gMC_CHIPLET_FIR attntype CHECK_STOP, RECOVERABLE
    filter singlebit
{
    /** MC_CHIPLET_FIR[3]
     *  Attention from MC_LFIR
     */
    (rMC_CHIPLET_FIR, bit(3)) ? analyzeMC_LFIR;

    /** MC_CHIPLET_FIR[4]
     *  Attention from DSTLFIR 0
     */
    (rMC_CHIPLET_FIR, bit(4)) ? analyzeConnectedMCC0;

    /** MC_CHIPLET_FIR[5]
     *  Attention from USTLFIR 0
     */
    (rMC_CHIPLET_FIR, bit(5)) ? analyzeConnectedMCC0;

    /** MC_CHIPLET_FIR[6]
     *  Attention from DSTLFIR 1
     */
    (rMC_CHIPLET_FIR, bit(6)) ? analyzeConnectedMCC1;

    /** MC_CHIPLET_FIR[7]
     *  Attention from USTLFIR 1
     */
    (rMC_CHIPLET_FIR, bit(7)) ? analyzeConnectedMCC1;

    /** MC_CHIPLET_FIR[8]
     *  Attention from DSTLFIR 2
     */
    (rMC_CHIPLET_FIR, bit(8)) ? analyzeConnectedMCC2;

    /** MC_CHIPLET_FIR[9]
     *  Attention from USTLFIR 2
     */
    (rMC_CHIPLET_FIR, bit(9)) ? analyzeConnectedMCC2;

    /** MC_CHIPLET_FIR[10]
     *  Attention from DSTLFIR 3
     */
    (rMC_CHIPLET_FIR, bit(10)) ? analyzeConnectedMCC3;

    /** MC_CHIPLET_FIR[11]
     *  Attention from USTLFIR 3
     */
    (rMC_CHIPLET_FIR, bit(11)) ? analyzeConnectedMCC3;

    /** MC_CHIPLET_FIR[12]
     *  Attention from MCMISCFIR
     */
    (rMC_CHIPLET_FIR, bit(12)) ? analyzeMCMISCFIR;

    /** MC_CHIPLET_FIR[13]
     *  Attention from IOOMIFIR 0
     */
    (rMC_CHIPLET_FIR, bit(13)) ? analyzeConnectedOMIC0;

    /** MC_CHIPLET_FIR[14]
     *  Attention from IOOMIFIR 1
     */
    (rMC_CHIPLET_FIR, bit(14)) ? analyzeConnectedOMIC1;

    /** MC_CHIPLET_FIR[15]
     *  Attention from IOOMIFIR 2
     */
    (rMC_CHIPLET_FIR, bit(15)) ? analyzeConnectedOMIC2;

    /** MC_CHIPLET_FIR[16]
     *  Attention from MCPPEFIR 0
     */
    (rMC_CHIPLET_FIR, bit(16)) ? analyzeConnectedOMIC0;

    /** MC_CHIPLET_FIR[17]
     *  Attention from MCPPEFIR 1
     */
    (rMC_CHIPLET_FIR, bit(17)) ? analyzeConnectedOMIC1;

    /** MC_CHIPLET_FIR[18]
     *  Attention from MCPPEFIR 2
     */
    (rMC_CHIPLET_FIR, bit(18)) ? analyzeConnectedOMIC2;

    /** MC_CHIPLET_FIR[19]
     *  Attention from OMIDLFIR 0
     */
    (rMC_CHIPLET_FIR, bit(19)) ? analyzeConnectedOMIC0;

    /** MC_CHIPLET_FIR[20]
     *  Attention from OMIDLFIR 1
     */
    (rMC_CHIPLET_FIR, bit(20)) ? analyzeConnectedOMIC1;

    /** MC_CHIPLET_FIR[21]
     *  Attention from OMIDLFIR 2
     */
    (rMC_CHIPLET_FIR, bit(21)) ? analyzeConnectedOMIC2;

};

################################################################################
# MC Chiplet Unit Checkstop FIR
################################################################################

rule rMC_CHIPLET_UCS_FIR
{
  UNIT_CS:
    MC_CHIPLET_UCS_FIR & ~(MC_CHIPLET_UCS_FIR_MASK >> 1) & `7fffffffffffffff`;
};

group gMC_CHIPLET_UCS_FIR attntype UNIT_CS
    filter singlebit
{
    /** MC_CHIPLET_UCS_FIR[1]
     *  Attention from DSTLFIR 0
     */
    (rMC_CHIPLET_UCS_FIR, bit(1)) ? analyzeConnectedMCC0;

    /** MC_CHIPLET_UCS_FIR[2]
     *  Attention from USTLFIR 0
     */
    (rMC_CHIPLET_UCS_FIR, bit(2)) ? analyzeConnectedMCC0;

    /** MC_CHIPLET_UCS_FIR[3]
     *  Attention from DSTLFIR 1
     */
    (rMC_CHIPLET_UCS_FIR, bit(3)) ? analyzeConnectedMCC1;

    /** MC_CHIPLET_UCS_FIR[4]
     *  Attention from USTLFIR 1
     */
    (rMC_CHIPLET_UCS_FIR, bit(4)) ? analyzeConnectedMCC1;

    /** MC_CHIPLET_UCS_FIR[5]
     *  Attention from DSTLFIR 2
     */
    (rMC_CHIPLET_UCS_FIR, bit(5)) ? analyzeConnectedMCC2;

    /** MC_CHIPLET_UCS_FIR[6]
     *  Attention from USTLFIR 2
     */
    (rMC_CHIPLET_UCS_FIR, bit(6)) ? analyzeConnectedMCC2;

    /** MC_CHIPLET_UCS_FIR[7]
     *  Attention from DSTLFIR 3
     */
    (rMC_CHIPLET_UCS_FIR, bit(7)) ? analyzeConnectedMCC3;

    /** MC_CHIPLET_UCS_FIR[8]
     *  Attention from USTLFIR 3
     */
    (rMC_CHIPLET_UCS_FIR, bit(8)) ? analyzeConnectedMCC3;

    /** MC_CHIPLET_UCS_FIR[9]
     *  Attention from MCMISCFIR
     */
    (rMC_CHIPLET_UCS_FIR, bit(9)) ? analyzeMCMISCFIR;

    /** MC_CHIPLET_UCS_FIR[10]
     *  Attention from IOOMIFIR 0
     */
    (rMC_CHIPLET_UCS_FIR, bit(10)) ? analyzeConnectedOMIC0;

    /** MC_CHIPLET_UCS_FIR[11]
     *  Attention from IOOMIFIR 1
     */
    (rMC_CHIPLET_UCS_FIR, bit(11)) ? analyzeConnectedOMIC1;

    /** MC_CHIPLET_UCS_FIR[12]
     *  Attention from IOOMIFIR 2
     */
    (rMC_CHIPLET_UCS_FIR, bit(12)) ? analyzeConnectedOMIC2;

    /** MC_CHIPLET_UCS_FIR[13]
     *  Attention from MCPPEFIR 0
     */
    (rMC_CHIPLET_UCS_FIR, bit(13)) ? analyzeConnectedOMIC0;

    /** MC_CHIPLET_UCS_FIR[14]
     *  Attention from MCPPEFIR 1
     */
    (rMC_CHIPLET_UCS_FIR, bit(14)) ? analyzeConnectedOMIC1;

    /** MC_CHIPLET_UCS_FIR[15]
     *  Attention from MCPPEFIR 2
     */
    (rMC_CHIPLET_UCS_FIR, bit(15)) ? analyzeConnectedOMIC2;

};

################################################################################
# MC Chiplet Host Attention FIR
################################################################################

rule rMC_CHIPLET_HA_FIR
{
  HOST_ATTN:
    MC_CHIPLET_HA_FIR & ~(MC_CHIPLET_HA_FIR_MASK >> 1) & `7fffffffffffffff`;
};

group gMC_CHIPLET_HA_FIR attntype HOST_ATTN
    filter singlebit
{
    /** MC_CHIPLET_HA_FIR[1]
     *  Attention from DSTLFIR 0
     */
    (rMC_CHIPLET_HA_FIR, bit(1)) ? analyzeConnectedMCC0;

    /** MC_CHIPLET_HA_FIR[2]
     *  Attention from USTLFIR 0
     */
    (rMC_CHIPLET_HA_FIR, bit(2)) ? analyzeConnectedMCC0;

    /** MC_CHIPLET_HA_FIR[3]
     *  Attention from DSTLFIR 1
     */
    (rMC_CHIPLET_HA_FIR, bit(3)) ? analyzeConnectedMCC1;

    /** MC_CHIPLET_HA_FIR[4]
     *  Attention from USTLFIR 1
     */
    (rMC_CHIPLET_HA_FIR, bit(4)) ? analyzeConnectedMCC1;

    /** MC_CHIPLET_HA_FIR[5]
     *  Attention from DSTLFIR 2
     */
    (rMC_CHIPLET_HA_FIR, bit(5)) ? analyzeConnectedMCC2;

    /** MC_CHIPLET_HA_FIR[6]
     *  Attention from USTLFIR 2
     */
    (rMC_CHIPLET_HA_FIR, bit(6)) ? analyzeConnectedMCC2;

    /** MC_CHIPLET_HA_FIR[7]
     *  Attention from DSTLFIR 3
     */
    (rMC_CHIPLET_HA_FIR, bit(7)) ? analyzeConnectedMCC3;

    /** MC_CHIPLET_HA_FIR[8]
     *  Attention from USTLFIR 3
     */
    (rMC_CHIPLET_HA_FIR, bit(8)) ? analyzeConnectedMCC3;

    /** MC_CHIPLET_HA_FIR[9]
     *  Attention from MCMISCFIR
     */
    (rMC_CHIPLET_HA_FIR, bit(9)) ? analyzeMCMISCFIR;

};

################################################################################
# P9 chip MC_LFIR
################################################################################

rule rMC_LFIR
{
  CHECK_STOP:
    MC_LFIR & ~MC_LFIR_MASK & ~MC_LFIR_ACT0 & ~MC_LFIR_ACT1;
  RECOVERABLE:
    MC_LFIR & ~MC_LFIR_MASK & ~MC_LFIR_ACT0 &  MC_LFIR_ACT1;
};

group gMC_LFIR
    filter singlebit,
           cs_root_cause
{
    /** MC_LFIR[0]
     *  CFIR internal parity error
     */
    (rMC_LFIR, bit(0)) ? self_th_32perDay;

    /** MC_LFIR[1]
     *  Chiplet Control Reg: PCB Access Error
     */
    (rMC_LFIR, bit(1)) ? self_th_32perDay;

    /** MC_LFIR[2]
     *  Clock Controller: PCB Access Error
     */
    (rMC_LFIR, bit(2)) ? self_th_32perDay;

    /** MC_LFIR[3]
     *  Clock Controller: Summarized Error
     */
    (rMC_LFIR, bit(3)) ? self_th_32perDay;

    /** MC_LFIR[4]
     *  PSCOM Logic: PCB Access Error
     */
    (rMC_LFIR, bit(4)) ? defaultMaskedError;

    /** MC_LFIR[5]
     *  PSCOM Logic: Summarized internal errors
     */
    (rMC_LFIR, bit(5)) ? defaultMaskedError;

    /** MC_LFIR[6]
     *  Therm Logic: Summarized internal errors
     */
    (rMC_LFIR, bit(6)) ? defaultMaskedError;

    /** MC_LFIR[7]
     *  Therm Logic: PCB Access Error
     */
    (rMC_LFIR, bit(7)) ? defaultMaskedError;

    /** MC_LFIR[8]
     *  Therm Logic: Temperature critical trip
     */
    (rMC_LFIR, bit(8)) ? defaultMaskedError;

    /** MC_LFIR[9]
     *  Therm Logic: Temperature fatal trip
     */
    (rMC_LFIR, bit(9)) ? defaultMaskedError;

    /** MC_LFIR[10]
     *  UNUSED in P9
     */
    (rMC_LFIR, bit(10)) ? defaultMaskedError;

    /** MC_LFIR[11]
     *  Debug Logic: Scom Satellite Error
     */
    (rMC_LFIR, bit(11)) ? defaultMaskedError;

    /** MC_LFIR[12]
     *  Scom Satellite Error - Trace0
     */
    (rMC_LFIR, bit(12)) ? defaultMaskedError;

    /** MC_LFIR[13]
     *  Scom Satellite Error - Trace0
     */
    (rMC_LFIR, bit(13)) ? defaultMaskedError;

    /** MC_LFIR[14]
     *  Scom Satellite Error - Trace1
     */
    (rMC_LFIR, bit(14)) ? defaultMaskedError;

    /** MC_LFIR[15]
     *  Scom Satellite Error - Trace1
     */
    (rMC_LFIR, bit(15)) ? defaultMaskedError;

    /** MC_LFIR[16:40]
     *  spare
     */
    (rMC_LFIR, bit(16|17|18|19|20|21|22|23|24|25|26|27|28|29|30|31|32|33|34|35|36|37|38|39|40)) ? defaultMaskedError;

    /** MC_LFIR[41]
     *  Malfunction Alert or Local Checkstop
     */
    (rMC_LFIR, bit(41)) ? defaultMaskedError;

};

################################################################################
# P9 MC target MCMISCFIR
################################################################################

rule rMCMISCFIR
{
  CHECK_STOP:
    MCMISCFIR & ~MCMISCFIR_MASK & ~MCMISCFIR_ACT0 & ~MCMISCFIR_ACT1;
  RECOVERABLE:
    MCMISCFIR & ~MCMISCFIR_MASK & ~MCMISCFIR_ACT0 &  MCMISCFIR_ACT1;
  HOST_ATTN:
    MCMISCFIR & ~MCMISCFIR_MASK &  MCMISCFIR_ACT0 & ~MCMISCFIR_ACT1;
  UNIT_CS:
    MCMISCFIR & ~MCMISCFIR_MASK &  MCMISCFIR_ACT0 &  MCMISCFIR_ACT1;
};

group gMCMISCFIR
    filter singlebit,
           cs_root_cause
{
    /** MCMISCFIR[0]
     *  WAT debug bus attn
     */
    (rMCMISCFIR, bit(0)) ? defaultMaskedError;

    /** MCMISCFIR[1]
     *  WAT debug register parity error
     */
    (rMCMISCFIR, bit(1)) ? defaultMaskedError;

    /** MCMISCFIR[2]
     *  SCOM recoverable register parity error
     */
    (rMCMISCFIR, bit(2)) ? self_th_1;

    /** MCMISCFIR[3]
     *  Spare
     */
    (rMCMISCFIR, bit(3)) ? defaultMaskedError;

    /** MCMISCFIR[4]
     *  Chan 0A application interrupt
     */
    (rMCMISCFIR, bit(4)) ? defaultMaskedError;

    /** MCMISCFIR[5]
     *  Chan 0B application interrupt
     */
    (rMCMISCFIR, bit(5)) ? defaultMaskedError;

    /** MCMISCFIR[6]
     *  Chan 1A application interrupt
     */
    (rMCMISCFIR, bit(6)) ? defaultMaskedError;

    /** MCMISCFIR[7]
     *  Chan 1B application interrupt
     */
    (rMCMISCFIR, bit(7)) ? defaultMaskedError;

    /** MCMISCFIR[8]
     *  Chan 2A application interrupt
     */
    (rMCMISCFIR, bit(8)) ? defaultMaskedError;

    /** MCMISCFIR[9]
     *  Chan 2B application interrupt
     */
    (rMCMISCFIR, bit(9)) ? defaultMaskedError;

    /** MCMISCFIR[10]
     *  Chan 3A application interrupt
     */
    (rMCMISCFIR, bit(10)) ? defaultMaskedError;

    /** MCMISCFIR[11]
     *  Chan 3B application interrupt
     */
    (rMCMISCFIR, bit(11)) ? defaultMaskedError;

    /** MCMISCFIR[12]
     *  Internal SCOM error
     */
    (rMCMISCFIR, bit(12)) ? defaultMaskedError;

    /** MCMISCFIR[13]
     *  Internal SCOM error clone
     */
    (rMCMISCFIR, bit(13)) ? defaultMaskedError;

};

 ##############################################################################
 #                                                                            #
 #    #                                  ###                                  #
 #   # #    ##  ##### ###  ###  #   #   #   # #     #    ###   ###  ###  ###  #
 #  #   #  #  #   #    #  #   # ##  #   #     #    # #  #     #     #   #     #
 # ####### #      #    #  #   # # # #   #     #   #####  ###   ###  ##   ###  #
 # #     # #  #   #    #  #   # #  ##   #   # #   #   #     #     # #       # #
 # #     #  ##    #   ###  ###  #   #    ###  ### #   #  ###   ###  ###  ###  #
 #                                                                            #
 ##############################################################################

# Include the actions defined for this target
.include "p9_common_actions.rule";
.include "axone_mc_actions.rule";