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| author | PRACHI GUPTA <pragupta@us.ibm.com> | 2015-03-09 11:44:15 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-05-19 19:16:30 -0500 |
| commit | ba7b110d036d4027b6ec9474b5f737c5eef8fca3 (patch) | |
| tree | ec5c1826d9b6f8224830dd7f7e7149b73084ba1f /src/usr/targeting/common/xmltohb/target_types.xml | |
| parent | c5cae3414b24bcdcf182aba1f4af26ea289ca23a (diff) | |
| download | talos-hostboot-ba7b110d036d4027b6ec9474b5f737c5eef8fca3.tar.gz talos-hostboot-ba7b110d036d4027b6ec9474b5f737c5eef8fca3.zip | |
SW302259: INITPROC: FSP&Hostboot - hardware procedure changes from the
Change-Id: Idc00a24ad24505b820084690fdbca73d271544b1
CQ:SW302259
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16935
Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com>
Tested-by: PRACHI GUPTA <pragupta@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16951
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb/target_types.xml')
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index aabb107f3..5503e3ce1 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -129,8 +129,10 @@ <attribute><id>MRW_POWER_CONTROL_REQUESTED</id></attribute> <attribute><id>MRW_DDR3_VDDR_MAX_LIMIT</id></attribute> <attribute><id>MRW_DDR4_VDDR_MAX_LIMIT</id></attribute> - <attribute><id>MRW_MEM_SENSOR_CACHE_ADDR_MAP</id></attribute> - + <attribute><id>MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id></attribute> + <attribute><id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id></attribute> + <attribute><id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id></attribute> + <attribute><id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id></attribute> <!-- Start pm_plat_attributes.xml --> <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id></attribute> <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute> @@ -274,6 +276,7 @@ <attribute><id>MSS_VOLT_DDR4_VDDR_SLOPE</id></attribute> <attribute><id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id></attribute> <attribute><id>MSS_VDDR_OVERIDE_SPD</id></attribute> + <attribute><id>MSS_VOLT_COMPLIANT_DIMMS</id></attribute> <attribute><id>PM_PFET_WORKAROUND_RUN_FLAG</id></attribute> <attribute><id>PM_SLEEP_ENABLE</id></attribute> <attribute><id>MSS_DRAMINIT_RESET_DISABLE</id></attribute> @@ -1433,6 +1436,7 @@ <attribute><id>MSS_FREQ</id></attribute> <attribute><id>MSS_LAB_OVERRIDE_FOR_MEM_PLL</id></attribute> <attribute><id>ECID</id></attribute> + <attribute><id>MRW_MEM_SENSOR_CACHE_ADDR_MAP</id></attribute> <attribute> <!-- Centaur memory buffer chips do not have SCOM accessible FSI GP regs --> <id>FSI_GP_REG_SCOM_ACCESS</id> |
