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| author | Doug Gilbert <dgilbert@us.ibm.com> | 2014-08-26 16:20:55 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-10-13 16:22:29 -0500 |
| commit | b260ff28f93c32a7cf1abf2001903813ea09e8eb (patch) | |
| tree | ab5a5688424c854edb3b0c218b7336d26b452c95 /src/usr/targeting/common/xmltohb/simics_VENICE.system.xml | |
| parent | ed751d7dc757487c927f55518afe334b47d0c49a (diff) | |
| download | talos-hostboot-b260ff28f93c32a7cf1abf2001903813ea09e8eb.tar.gz talos-hostboot-b260ff28f93c32a7cf1abf2001903813ea09e8eb.zip | |
HTMGT new attributes
Change-Id: I75860340800b28f83e53f020beea4bd71af6f38d
RTC:114813
CMVC-Coreq: 938591
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13307
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb/simics_VENICE.system.xml')
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_VENICE.system.xml | 186 |
1 files changed, 185 insertions, 1 deletions
diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index c167b3584..84e5e6dd8 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -355,6 +355,30 @@ <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> <default>1</default> </attribute> + <attribute> + <id>ADC_CHANNEL_FUNC_IDS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_GNDS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_GAINS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_OFFSETS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>APSS_GPIO_PORT_MODES</id> + <default>0,1</default> + </attribute> + <attribute> + <id>APSS_GPIO_PORT_PINS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> </targetInstance> <!-- System node 0 --> @@ -1564,6 +1588,26 @@ </attribute> </targetInstance> +<!-- Venice n0p0 OCC units --> + +<targetInstance> + <id>sys0node0proc0occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130000</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>1</default> + </attribute> +</targetInstance> + <!-- Venice n0p1 processor chip --> <targetInstance> @@ -2774,6 +2818,26 @@ </attribute> </targetInstance> +<!-- Venice n0p1 OCC units --> + +<targetInstance> + <id>sys0node0proc1occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130001</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p2 processor chip --> <targetInstance> @@ -3984,8 +4048,27 @@ </attribute> </targetInstance> -<!-- Venice n0p3 processor chip --> +<!-- Venice n0p2 OCC units --> +<targetInstance> + <id>sys0node0proc2occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130002</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-2/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-2/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + +<!-- Venice n0p3 processor chip --> <targetInstance> <id>sys0node0proc3</id> @@ -5195,6 +5278,26 @@ </attribute> </targetInstance> +<!-- Venice n0p3 OCC units --> + +<targetInstance> + <id>sys0node0proc3occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130003</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-3/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-3/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p4 processor chip --> <targetInstance> @@ -6374,6 +6477,26 @@ </attribute> </targetInstance> +<!-- Venice n0p4 OCC units --> + +<targetInstance> + <id>sys0node0proc4occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130004</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-4/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-4/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p5 processor chip --> <targetInstance> @@ -7551,6 +7674,26 @@ </attribute> </targetInstance> +<!-- Venice n0p5 OCC units --> + +<targetInstance> + <id>sys0node0proc5occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130005</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-5/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-5/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p6 processor chip --> <targetInstance> @@ -8728,6 +8871,26 @@ </attribute> </targetInstance> +<!-- Venice n0p6 OCC units --> + +<targetInstance> + <id>sys0node0proc6occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130006</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-6/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-6/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p7 processor chip --> <targetInstance> @@ -9904,6 +10067,27 @@ </attribute> </targetInstance> +<!-- Venice n0p7 OCC units --> + +<targetInstance> + <id>sys0node0proc7occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130007</default></attribute> + <!-- <attribute><id>ORDINAL_ID</id><default>3</default></attribute> --> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-7/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-7/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Centaur n0p0 : start --> <targetInstance> |
