diff options
| author | Doug Gilbert <dgilbert@us.ibm.com> | 2014-08-26 16:20:55 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-10-13 16:22:29 -0500 |
| commit | b260ff28f93c32a7cf1abf2001903813ea09e8eb (patch) | |
| tree | ab5a5688424c854edb3b0c218b7336d26b452c95 /src | |
| parent | ed751d7dc757487c927f55518afe334b47d0c49a (diff) | |
| download | talos-hostboot-b260ff28f93c32a7cf1abf2001903813ea09e8eb.tar.gz talos-hostboot-b260ff28f93c32a7cf1abf2001903813ea09e8eb.zip | |
HTMGT new attributes
Change-Id: I75860340800b28f83e53f020beea4bd71af6f38d
RTC:114813
CMVC-Coreq: 938591
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13307
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/build/citest/etc/patches/attribute_types.patch | 16 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/genHwsvMrwXml.patch | 236 | ||||
| -rw-r--r-- | src/build/citest/etc/patches/target_types.patch | 22 | ||||
| -rwxr-xr-x | src/build/citest/etc/workarounds.presimsetup | 22 | ||||
| -rwxr-xr-x | src/usr/targeting/common/genHwsvMrwXml.pl | 230 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 17 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types_hb.xml | 305 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_MURANO.system.xml | 107 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_VENICE.system.xml | 186 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 16 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types_hb.xml | 22 | ||||
| -rwxr-xr-x | src/usr/targeting/xmltohb/updatetargetxml.pl | 6 |
12 files changed, 1183 insertions, 2 deletions
diff --git a/src/build/citest/etc/patches/attribute_types.patch b/src/build/citest/etc/patches/attribute_types.patch new file mode 100644 index 000000000..04a5c7edd --- /dev/null +++ b/src/build/citest/etc/patches/attribute_types.patch @@ -0,0 +1,16 @@ +1413,1427d1412 +< <attribute> +< <id>OCC_MASTER_CAPABLE</id> +< <description> +< This attribute is to determine whether an occ is master capable. +< An OCC is master capable if it's parent processor is wired to the +< APSS. +< </description> +< <simpleType> +< <uint8_t> +< </uint8_t> +< </simpleType> +< <persistency>non-volatile</persistency> +< <readable/> +< <fspOnly/> +< </attribute> diff --git a/src/build/citest/etc/patches/genHwsvMrwXml.patch b/src/build/citest/etc/patches/genHwsvMrwXml.patch new file mode 100644 index 000000000..c621435a7 --- /dev/null +++ b/src/build/citest/etc/patches/genHwsvMrwXml.patch @@ -0,0 +1,236 @@ +68c68,69 +< # xml parsing +--- +> # xml parsing +> # F 938591 dgilbert Sep 25, 2014 Make OCC target type common to HB +96,104d96 +< # for SPI connections in the @SPIs array +< use constant SPI_PROC_PATH_FIELD => 0; +< use constant SPI_NODE_FIELD => 1; +< use constant SPI_POS_FIELD => 2; +< use constant SPI_ENDPOINT_PATH_FIELD => 3; +< use constant SPI_APSS_POS_FIELD => 4; +< use constant SPI_APSS_ORD_FIELD => 5; +< use constant SPI_APSS_RID_FIELD => 6; +< +1830,1860d1821 +< # Compares two Apss instances based on the node and position # +< ################################################################################ +< sub byApssNodePos($$) +< { +< my $retVal = -1; +< +< my $lhsInstance_node = $_[0][SPI_NODE_FIELD]; +< my $rhsInstance_node = $_[1][SPI_NODE_FIELD]; +< if(int($lhsInstance_node) eq int($rhsInstance_node)) +< { +< my $lhsInstance_pos = $_[0][SPI_APSS_POS_FIELD]; +< my $rhsInstance_pos = $_[1][SPI_APSS_POS_FIELD]; +< if(int($lhsInstance_pos) eq int($rhsInstance_pos)) +< { +< die "ERROR: Duplicate apss positions: 2 apss with same +< node and position, \ +< NODE: $lhsInstance_node POSITION: $lhsInstance_pos\n"; +< } +< elsif(int($lhsInstance_pos) > int($rhsInstance_pos)) +< { +< $retVal = 1; +< } +< } +< elsif(int($lhsInstance_node) > int($rhsInstance_node)) +< { +< $retVal = 1; +< } +< return $retVal; +< } +< +< ################################################################################ +1891,1948d1851 +< my @SPIs; +< my $apssInit = 0; +< my $getBaseRidApss = 0; +< my $ridApssBase = 0; +< +< sub init_apss +< { +< my $proc_spi_busses = +< open_mrw_file($::mrwdir, "${sysname}-proc-spi-busses.xml"); +< my $spiBus = ::parse_xml_file($proc_spi_busses, +< forcearray=>['processor-spi-bus']); +< +< # Capture all SPI connections into the @SPIs array +< my @rawSPIs; +< foreach my $i (@{$spiBus->{'processor-spi-bus'}}) +< { +< if($getBaseRidApss == 0) +< { +< my $locCode = $i->{endpoint}->{'location-code'}; +< my @locCodeComp = split( '-', $locCode ); +< $ridApssBase = (@locCodeComp > 2) ? 0x4900 : 0x800; +< $getBaseRidApss = 1; +< } +< +< if ($i->{endpoint}->{'instance-path'} =~ /.*APSS-[0-9]+$/i) +< { +< my $pos = $i->{endpoint}->{'instance-path'}; +< while (chop($pos) ne '/') {}; +< $pos = chop($pos); +< push @rawSPIs, [ +< $i->{processor}->{'instance-path'}, +< $i->{processor}->{target}->{node}, +< $i->{processor}->{target}->{position}, +< $i->{endpoint}->{'instance-path'}, +< $pos, 0, 0 +< ]; +< } +< } +< +< @SPIs = sort byApssNodePos @rawSPIs; +< +< my $ordinalApss = 0; +< my $apssPos = 0; +< my $currNode = -1; +< for my $i (0 .. $#SPIs) +< { +< $SPIs[$i][SPI_APSS_ORD_FIELD] = $ordinalApss; +< $ordinalApss++; +< if($currNode != $SPIs[$i][SPI_NODE_FIELD]) +< { +< $apssPos = 0; +< $currNode = $SPIs[$i][SPI_NODE_FIELD]; +< } +< $SPIs[$i][SPI_APSS_RID_FIELD] +< = sprintf("0x%08X", $ridApssBase + (2*$currNode) + $apssPos++); +< } +< } +< +2025a1929 +> fsp_occ=>\&generate_fsp_occ, +2561d2464 +< generate_occ($proc, $ordinalId); +2719,2744c2622 +< my $occInit = 0; +< my %occList = (); +< sub occ_init +< { +< my $targets_file = open_mrw_file($::mrwdir, "${sysname}-targets.xml"); +< my $occTargets = ::parse_xml_file($targets_file); +< +< #get the OCC details +< foreach my $Target (@{$occTargets->{target}}) +< { +< if($Target->{'ecmd-common-name'} eq "occ") +< { +< my $ipath = $Target->{'instance-path'}; +< my $node = $Target->{node}; +< my $position = $Target->{position}; +< +< $occList{$node}{$position} = { +< 'node' => $node, +< 'position' => $position, +< 'instancePath' => $ipath, +< } +< } +< } +< } +< +< sub generate_occ +--- +> sub generate_fsp_occ +2747c2625 +< my ($proc, $ordinalId) = @_; +--- +> my ($ordinalId) = @_; +2749,2781d2626 +< if ($apssInit == 0) +< { +< init_apss; +< $apssInit = 1; +< } +< +< # RTC: 49574 +< # The calculations for HUID and ordinal ID are not correct for multi-node +< # configurations, since HUID doesn't take into account the node value, and +< # the oridinal ID repeats on every node. Fix these with the multi-node +< # story +< my $uidstr = sprintf("0x%02X13%04X",${node},$proc); +< my $mastercapable = 0; +< +< for my $spi ( 0 .. $#SPIs ) +< { +< my $ipath = $SPIs[$spi][SPI_ENDPOINT_PATH_FIELD]; +< if(($SPIs[$spi][SPI_ENDPOINT_PATH_FIELD] =~ /.*APSS-[0-9]+$/i) && +< ($node eq $SPIs[$spi][SPI_NODE_FIELD]) && +< ($proc eq $SPIs[$spi][SPI_POS_FIELD])) +< { +< $mastercapable = 1; +< last; +< } +< } +< +< # Get the OCC info +< if ($occInit == 0) +< { +< occ_init; +< $occInit = 1; +< } +< my $mruData = get_mruid($occList{$node}{$proc}->{'instancePath'}); +2784,2811c2629 +< <!-- $SYSNAME n${node}p${proc} OCC units --> +< +< <targetInstance> +< <id>sys${sys}node${node}proc${proc}occ0</id> +< <type>occ</type> +< <attribute><id>HUID</id><default>${uidstr}</default></attribute> +< <attribute><id>ORDINAL_ID</id><default>$ordinalId</default></attribute> +< <attribute> +< <id>PHYS_PATH</id> +< <default>physical:sys-$sys/node-$node/proc-$proc/occ-0</default> +< </attribute> +< <attribute> +< <id>MRU_ID</id> +< <default>$mruData</default> +< </attribute> +< <attribute> +< <id>AFFINITY_PATH</id> +< <default>affinity:sys-$sys/node-$node/proc-$proc/occ-0</default> +< </attribute> +< <compileAttribute> +< <id>INSTANCE_PATH</id> +< <default>instance:$occList{$node}{$proc}->{'instancePath'}</default> +< </compileAttribute> +< <attribute> +< <id>OCC_MASTER_CAPABLE</id> +< <default>$mastercapable</default> +< </attribute> +< </targetInstance>\n"; +--- +> <attribute><id>ORDINAL_ID</id><default>$ordinalId</default></attribute>"; +2912c2730 +< if ($apssInit == 0) +--- +> if ($::apssInit == 0) +2914,2915c2732,2733 +< init_apss; +< $apssInit = 1; +--- +> ::init_apss; +> $::apssInit = 1; +2918c2736 +< for my $i ( 0 .. $#SPIs ) +--- +> for my $i ( 0 .. $#::SPIs ) +2920c2738 +< if ($SPIs[$i][SPI_NODE_FIELD] eq $node) +--- +> if ($::SPIs[$i][::SPI_NODE_FIELD] eq $node) +2923,2926c2741,2744 +< my $instanceId = $SPIs[$i][SPI_APSS_POS_FIELD]; +< my $ordinalId = $SPIs[$i][SPI_APSS_ORD_FIELD]; +< my $ridstr = $SPIs[$i][SPI_APSS_RID_FIELD]; +< my $ipath = $SPIs[$i][SPI_ENDPOINT_PATH_FIELD]; +--- +> my $instanceId = $::SPIs[$i][::SPI_APSS_POS_FIELD]; +> my $ordinalId = $::SPIs[$i][::SPI_APSS_ORD_FIELD]; +> my $ridstr = $::SPIs[$i][::SPI_APSS_RID_FIELD]; +> my $ipath = $::SPIs[$i][::SPI_ENDPOINT_PATH_FIELD]; diff --git a/src/build/citest/etc/patches/target_types.patch b/src/build/citest/etc/patches/target_types.patch new file mode 100644 index 000000000..ae55b5391 --- /dev/null +++ b/src/build/citest/etc/patches/target_types.patch @@ -0,0 +1,22 @@ +69,89d68 +< <id>occ</id> +< <parent>unit</parent> +< <attribute> +< <id>TYPE</id> +< <default>OCC</default> +< </attribute> +< <attribute> +< <id>MODEL</id> +< <default>POWER8</default> +< </attribute> +< <attribute> +< <id>OCC_MASTER_CAPABLE</id> +< </attribute> +< <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute> +< <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> +< <default>0x00000000</default> +< </attribute> +< <fspOnly/> +< </targetType> +< +< <targetType> diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup index f251c0b32..cad6632d5 100755 --- a/src/build/citest/etc/workarounds.presimsetup +++ b/src/build/citest/etc/workarounds.presimsetup @@ -55,3 +55,25 @@ mkdir -p $sb/hbfw/fsp/targeting cp $BACKING_BUILD/src/hbfw/fsp/targeting/makefile $sb/hbfw/fsp/targeting patch $sb/hbfw/fsp/targeting/makefile \ ${HOSTBOOTROOT}/src/build/citest/etc/patches/attrPredicate.patch + +echo "+++ Patching attribute_types_fsp.xml for HTMGT attribute support." +mkdir -p $sb/hbfw/fsp/targeting/xmltohb + +cp $BACKING_BUILD/src/hbfw/fsp/targeting/xmltohb/attribute_types_fsp.xml \ + $sb/hbfw/fsp/targeting/xmltohb +patch $sb/hbfw/fsp/targeting/xmltohb/attribute_types_fsp.xml \ + ${HOSTBOOTROOT}/src/build/citest/etc/patches/attribute_types.patch + +echo "+++ Patching target_types_fsp.xml for HTMGT attribute support." +cp $BACKING_BUILD/src/hbfw/fsp/targeting/xmltohb/target_types_fsp.xml \ + $sb/hbfw/fsp/targeting/xmltohb +patch $sb/hbfw/fsp/targeting/xmltohb/target_types_fsp.xml \ + ${HOSTBOOTROOT}/src/build/citest/etc/patches/target_types.patch + +echo "+++ Patching genHwsvMrwXml_fsp.pm for OCC attribute support" + +mkdir -p $sb/mrw/tools +cp $BACKING_BUILD/src/mrw/tools/genHwsvMrwXml_fsp.pm $sb/mrw/tools +patch $sb/mrw/tools/genHwsvMrwXml_fsp.pm \ + ${HOSTBOOTROOT}/src/build/citest/etc/patches/genHwsvMrwXml.patch + diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 0d7af306d..10d12eea5 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -73,6 +73,15 @@ use constant MAX_MBA_PER_MEMBUF => 2, }; +# for SPI connections in the @SPIs array +use constant SPI_PROC_PATH_FIELD => 0; +use constant SPI_NODE_FIELD => 1; +use constant SPI_POS_FIELD => 2; +use constant SPI_ENDPOINT_PATH_FIELD => 3; +use constant SPI_APSS_POS_FIELD => 4; +use constant SPI_APSS_ORD_FIELD => 5; +use constant SPI_APSS_RID_FIELD => 6; + our $mrwdir = ""; my $sysname = ""; my $usage = 0; @@ -1390,6 +1399,8 @@ for (my $do_core = 0, my $i = 0; $i <= $#STargets; $i++) generate_proc($proc, $is_master, $ipath, $lognode, $logid, $proc_ordinal_id, \@fsi, \@altfsi, $fru_id, $hwTopology); + generate_occ($proc, $proc_ordinal_id); + # call to do any fsp per-proc targets (ie, occ, psi) do_plugin('fsp_proc_targets', $proc, $i, $proc_ordinal_id, $STargets[$i][NODE_FIELD], $STargets[$i][POS_FIELD]); @@ -3721,6 +3732,200 @@ sub generate_dimm print "\n</targetInstance>\n"; } +################################################################################ +# Compares two Apss instances based on the node and position # +################################################################################ +sub byApssNodePos($$) +{ + my $retVal = -1; + + my $lhsInstance_node = $_[0][SPI_NODE_FIELD]; + my $rhsInstance_node = $_[1][SPI_NODE_FIELD]; + if(int($lhsInstance_node) eq int($rhsInstance_node)) + { + my $lhsInstance_pos = $_[0][SPI_APSS_POS_FIELD]; + my $rhsInstance_pos = $_[1][SPI_APSS_POS_FIELD]; + if(int($lhsInstance_pos) eq int($rhsInstance_pos)) + { + die "ERROR: Duplicate apss positions: 2 apss with same + node and position, \ + NODE: $lhsInstance_node POSITION: $lhsInstance_pos\n"; + } + elsif(int($lhsInstance_pos) > int($rhsInstance_pos)) + { + $retVal = 1; + } + } + elsif(int($lhsInstance_node) > int($rhsInstance_node)) + { + $retVal = 1; + } + return $retVal; +} + +our @SPIs; +our $apssInit = 0; + +# This routine is common to FSP and HB +# TODO RTC 116460 Only FSP uses the RID and ordinal numbering. +# Refactor FSP only elements to genHwsvMrwXml_fsp.pm +my $getBaseRidApss = 0; +my $ridApssBase = 0; + +sub init_apss +{ + # Not every system currently has a *-proc-spi_busses.xml in the MRW + # If no file exists then assume there is no APSS, so just leave @SPIs empty + # TODO RTC 116310 revisit the need to allow this file to not exist. + my $proc_spi_busses = + test_mrw_file($::mrwdir, "${sysname}-proc-spi-busses.xml"); + if($proc_spi_busses ne "") + { + my $spiBus = ::parse_xml_file($proc_spi_busses, + forcearray=>['processor-spi-bus']); + + # Capture all SPI connections into the @SPIs array + my @rawSPIs; + foreach my $i (@{$spiBus->{'processor-spi-bus'}}) + { + if($getBaseRidApss == 0) # TODO RTC 116460 FSP only + { + my $locCode = $i->{endpoint}->{'location-code'}; + my @locCodeComp = split( '-', $locCode ); + $ridApssBase = (@locCodeComp > 2) ? 0x4900 : 0x800; + $getBaseRidApss = 1; + } + + if ($i->{endpoint}->{'instance-path'} =~ /.*APSS-[0-9]+$/i) + { + my $pos = $i->{endpoint}->{'instance-path'}; + while (chop($pos) ne '/') {}; + $pos = chop($pos); + push @rawSPIs, [ + $i->{processor}->{'instance-path'}, + $i->{processor}->{target}->{node}, + $i->{processor}->{target}->{position}, + $i->{endpoint}->{'instance-path'}, + $pos, 0, 0 + ]; + } + } + + @SPIs = sort byApssNodePos @rawSPIs; + + my $ordinalApss = 0; + my $apssPos = 0; + my $currNode = -1; + for my $i (0 .. $#SPIs) + { + $SPIs[$i][SPI_APSS_ORD_FIELD] = $ordinalApss; + $ordinalApss++; + if($currNode != $SPIs[$i][SPI_NODE_FIELD]) + { + $apssPos = 0; + $currNode = $SPIs[$i][SPI_NODE_FIELD]; + } + $SPIs[$i][SPI_APSS_RID_FIELD] + = sprintf("0x%08X", $ridApssBase + (2*$currNode) + $apssPos++); + } + } +} + + +my $occInit = 0; +my %occList = (); +sub occ_init +{ + my $targets_file = open_mrw_file($::mrwdir, "${sysname}-targets.xml"); + my $occTargets = ::parse_xml_file($targets_file); + + #get the OCC details + foreach my $Target (@{$occTargets->{target}}) + { + if($Target->{'ecmd-common-name'} eq "occ") + { + my $ipath = $Target->{'instance-path'}; + my $node = $Target->{node}; + my $position = $Target->{position}; + + $occList{$node}{$position} = { + 'node' => $node, + 'position' => $position, + 'instancePath' => $ipath, + } + } + } +} + +sub generate_occ +{ + # input parameters + my ($proc, $ordinalId) = @_; + + if ($apssInit == 0) + { + init_apss; + $apssInit = 1; + } + + my $uidstr = sprintf("0x%02X13%04X",${node},$proc); + my $mastercapable = 0; + + for my $spi ( 0 .. $#SPIs ) + { + my $ipath = $SPIs[$spi][SPI_ENDPOINT_PATH_FIELD]; + if(($SPIs[$spi][SPI_ENDPOINT_PATH_FIELD] =~ /.*APSS-[0-9]+$/i) && + ($node eq $SPIs[$spi][SPI_NODE_FIELD]) && + ($proc eq $SPIs[$spi][SPI_POS_FIELD])) + { + $mastercapable = 1; + last; + } + } + + # Get the OCC info + if ($occInit == 0) + { + occ_init; + $occInit = 1; + } + my $mruData = get_mruid($occList{$node}{$proc}->{'instancePath'}); + + print " +<!-- $SYSNAME n${node}p${proc} OCC units --> + +<targetInstance> + <id>sys${sys}node${node}proc${proc}occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>${uidstr}</default></attribute>"; + + do_plugin('fsp_occ', $ordinalId ); + + print " + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-$sys/node-$node/proc-$proc/occ-0</default> + </attribute> + <attribute> + <id>MRU_ID</id> + <default>$mruData</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-$sys/node-$node/proc-$proc/occ-0</default> + </attribute> + <compileAttribute> + <id>INSTANCE_PATH</id> + <default>instance:$occList{$node}{$proc}->{'instancePath'}</default> + </compileAttribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>$mastercapable</default> + </attribute> +</targetInstance>\n"; + +} + sub addSysAttrs { for my $i (0 .. $#systemAttr) @@ -3958,6 +4163,31 @@ sub open_mrw_file } } +# TODO RTC 116310 Consider removing this once palmetto MRW APSS support +# is delivered +sub test_mrw_file +{ + my ($paths, $filename) = @_; + + #Need to get list of paths to search + my @paths_to_search = split /:/, $paths; + my $file_found = ""; + + #Check for file at each directory in list + foreach my $path (@paths_to_search) + { + if ( open (FH, "<$path/$filename") ) + { + $file_found = "$path/$filename"; + close(FH); + last; #break out of loop + } + } + + return $file_found; +} + + my %g_xml_cache = (); sub parse_xml_file { diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 80e6da4df..8a144f896 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -14298,6 +14298,23 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <readable/> <writeable/> </attribute> + +<attribute> + <id>OCC_MASTER_CAPABLE</id> + <description> + This attribute is to determine whether an occ is master capable. + An OCC is master capable if it's parent processor is wired to the + APSS. + </description> + <simpleType> + <uint8_t> + <default>0</default> <!-- false --> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + <attribute> <id>MSS_DRAMINIT_RESET_DISABLE</id> <description>A disable switch for resetting the phy delay values at the beginning of calling mss_draminit_training.</description> diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml index 8618392c6..235b19438 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml @@ -359,5 +359,310 @@ <hbOnly/> </attribute> +<!-- TODO RTC 115386 +Final values for the following HTMG attributes will come from the MRW --> +<attribute> + <id>N_PLUS_ONE_BULK_POWER_LIMIT_WATTS</id> + <description> + System power cap with redundant power. + </description> + <simpleType> + <uint16_t> + <default>2400</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>N_PLUS_ONE_MAX_MEM_POWER_WATTS</id> + <description> + The amount of N+1 Bulk Power to allocate to memory. The value will be + used to calculate memory throttles to cap memory to this value. + </description> + <simpleType> + <uint16_t> + <default>500</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>N_BULK_POWER_LIMIT_WATTS</id> + <description> + System power cap in oversubscription. + </description> + <simpleType> + <uint16_t> + <default>1200</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>N_MAX_MEM_POWER_WATTS</id> + <description> + The amount of N bulk power to allocate to memory. This value will be + used to calculate memory throttles to cap memroy to this value and + used when system is in oversubscription. + </description> + <simpleType> + <uint16_t> + <default>500</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>REGULATOR_EFFICIENCY_FACTOR</id> + <description> + Percentage to lower N+1 maximum memory power and N maximum memory + power to account for regulator loss. + </description> + <simpleType> + <uint8_t> + <default>85</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>MIN_POWER_CAP_WATTS</id> + <description> + Lowest power cap that a user may set and the OCC can guarantee to hold + via processor DVFS under all conditions. + </description> + <simpleType> + <uint16_t> + <default>2100</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>MIN_MEM_UTILIZATION_THROTTLING</id> + <description> + Gives the OCCs a lower limit on how far they throttle + memory due to a memory over temp condtion. + </description> + <simpleType> + <uint8_t> + <default>5</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>PROC_DVFS_TEMP_DEG_C</id> + <description> + Processor temperature to invoke DVFS. + </description> + <simpleType> + <uint8_t> + <default>85</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>PROC_ERROR_TEMP_DEG_C</id> + <description> + Processor temperature to log on error calling out the processor. + </description> + <simpleType> + <uint8_t> + <default>95</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>PROC_READ_TIMEOUT_SEC</id> + <description> + Maximum time allowed without having a new processor temperature + reading before DVFS will occur. + </description> + <simpleType> + <uint16_t> + <default>5</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>MEMCTRL_THROTTLE_TEMP_DEG_C</id> + <description> + Memory controller temperature to invoke memory throttling. + </description> + <simpleType> + <uint8_t> + <default>89</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>MEMCTRL_ERROR_TEMP_DEG_C</id> + <description> + Memory controller temperature to log an error calling out the memory + controller. + </description> + <simpleType> + <uint8_t> + <default>99</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>MEMCTRL_READ_TIMEOUT_SEC</id> + <description> + Maximum time allowed without having a new temperature reading from the + memory controller before throttling will occur. + </description> + <simpleType> + <uint16_t> + <default>30</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>DIMM_THROTTLE_TEMP_DEG_C</id> + <description> + DIMM temperature to invoke memory throttling. + </description> + <simpleType> + <uint8_t> + <default>79</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>DIMM_ERROR_TEMP_DEG_C</id> + <description> + DIMM termperature to log na error calling out the DIMM. + </description> + <simpleType> + <uint8_t> + <default>96</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>DIMM_READ_TIMEOUT_SEC</id> + <description> + Maximum time allowed without having a new Temperature reading from a + DIMM before throttling will occur. + </description> + <simpleType> + <uint16_t> + <default>30</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>ADC_CHANNEL_FUNC_IDS</id> + <description>ADC Channel function id. 16 channels.</description> + <simpleType> + <uint8_t></uint8_t> + <array>16</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>ADC_CHANNEL_GNDS</id> + <description>ADC Channel ground. 16 channels.</description> + <simpleType> + <uint8_t></uint8_t> + <array>16</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>ADC_CHANNEL_GAINS</id> + <description>ADC channel gain * 1000. 16 channels.</description> + <simpleType> + <uint32_t></uint32_t> + <array>16</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>ADC_CHANNEL_OFFSETS</id> + <description>ADC channel offset * 1000. 16 channels</description> + <simpleType> + <uint32_t></uint32_t> + <array>16</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>APSS_GPIO_PORT_MODES</id> + <description>APSS GPIO PORT MODES</description> + <simpleType> + <uint8_t></uint8_t> + <array>2</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>APSS_GPIO_PORT_PINS</id> + <description>APSS GPIO PORT PINS + Port0 pin 0-7 + Port1 pin 8-15 + </description> + <simpleType> + <uint8_t></uint8_t> + <array>16</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> +<!-- end HTMGT attributes --> </attributes> diff --git a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml index badbf94ae..f006262e8 100644 --- a/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_MURANO.system.xml @@ -351,6 +351,30 @@ <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> <default>1</default> </attribute> + <attribute> + <id>ADC_CHANNEL_FUNC_IDS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_GNDS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_GAINS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_OFFSETS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>APSS_GPIO_PORT_MODES</id> + <default>0,1</default> + </attribute> + <attribute> + <id>APSS_GPIO_PORT_PINS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> </targetInstance> <!-- System node 0 --> @@ -1234,6 +1258,26 @@ </attribute> </targetInstance> +<!-- Murano n0p0 OCC units --> + +<targetInstance> + <id>sys0node0proc0occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130000</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>1</default> + </attribute> +</targetInstance> + <!-- Murano n0p1 processor chip --> <targetInstance> @@ -2094,6 +2138,27 @@ </attribute> </targetInstance> +<!-- Murano n0p1 OCC units --> + +<targetInstance> + <id>sys0node0proc1occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130001</default></attribute> + <!-- <attribute><id>ORDINAL_ID</id><default>1</default></attribute> --> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Murano n0p2 processor chip --> <targetInstance> @@ -2945,6 +3010,27 @@ </attribute> </targetInstance> +<!-- Muraon n0p2 OCC units --> + +<targetInstance> + <id>sys0node0proc2occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130002</default></attribute> + <!-- <attribute><id>ORDINAL_ID</id><default>2</default></attribute> --> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-2/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-2/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Murano n0p3 processor chip --> <targetInstance> @@ -3794,6 +3880,27 @@ </attribute> </targetInstance> +<!-- Murano n0p3 OCC units --> + +<targetInstance> + <id>sys0node0proc3occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130003</default></attribute> + <!-- <attribute><id>ORDINAL_ID</id><default>3</default></attribute> --> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-3/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-3/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Centaur n0p4 : start --> <targetInstance> diff --git a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml index c167b3584..84e5e6dd8 100644 --- a/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_VENICE.system.xml @@ -355,6 +355,30 @@ <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id> <default>1</default> </attribute> + <attribute> + <id>ADC_CHANNEL_FUNC_IDS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_GNDS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_GAINS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>ADC_CHANNEL_OFFSETS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> + <attribute> + <id>APSS_GPIO_PORT_MODES</id> + <default>0,1</default> + </attribute> + <attribute> + <id>APSS_GPIO_PORT_PINS</id> + <default>1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16</default> + </attribute> </targetInstance> <!-- System node 0 --> @@ -1564,6 +1588,26 @@ </attribute> </targetInstance> +<!-- Venice n0p0 OCC units --> + +<targetInstance> + <id>sys0node0proc0occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130000</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-0/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-0/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>1</default> + </attribute> +</targetInstance> + <!-- Venice n0p1 processor chip --> <targetInstance> @@ -2774,6 +2818,26 @@ </attribute> </targetInstance> +<!-- Venice n0p1 OCC units --> + +<targetInstance> + <id>sys0node0proc1occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130001</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-1/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p2 processor chip --> <targetInstance> @@ -3984,8 +4048,27 @@ </attribute> </targetInstance> -<!-- Venice n0p3 processor chip --> +<!-- Venice n0p2 OCC units --> +<targetInstance> + <id>sys0node0proc2occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130002</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-2/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-2/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + +<!-- Venice n0p3 processor chip --> <targetInstance> <id>sys0node0proc3</id> @@ -5195,6 +5278,26 @@ </attribute> </targetInstance> +<!-- Venice n0p3 OCC units --> + +<targetInstance> + <id>sys0node0proc3occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130003</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-3/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-3/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p4 processor chip --> <targetInstance> @@ -6374,6 +6477,26 @@ </attribute> </targetInstance> +<!-- Venice n0p4 OCC units --> + +<targetInstance> + <id>sys0node0proc4occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130004</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-4/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-4/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p5 processor chip --> <targetInstance> @@ -7551,6 +7674,26 @@ </attribute> </targetInstance> +<!-- Venice n0p5 OCC units --> + +<targetInstance> + <id>sys0node0proc5occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130005</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-5/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-5/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p6 processor chip --> <targetInstance> @@ -8728,6 +8871,26 @@ </attribute> </targetInstance> +<!-- Venice n0p6 OCC units --> + +<targetInstance> + <id>sys0node0proc6occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130006</default></attribute> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-6/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-6/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Venice n0p7 processor chip --> <targetInstance> @@ -9904,6 +10067,27 @@ </attribute> </targetInstance> +<!-- Venice n0p7 OCC units --> + +<targetInstance> + <id>sys0node0proc7occ0</id> + <type>occ</type> + <attribute><id>HUID</id><default>0x00130007</default></attribute> + <!-- <attribute><id>ORDINAL_ID</id><default>3</default></attribute> --> + <attribute> + <id>PHYS_PATH</id> + <default>physical:sys-0/node-0/proc-7/occ-0</default> + </attribute> + <attribute> + <id>AFFINITY_PATH</id> + <default>affinity:sys-0/node-0/proc-7/occ-0</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + <default>0</default> + </attribute> +</targetInstance> + <!-- Centaur n0p0 : start --> <targetInstance> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 9a36516d1..d7576f52f 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -1608,4 +1608,20 @@ </attribute> </targetType> +<targetType> + <id>occ</id> + <parent>unit</parent> + <attribute> + <id>TYPE</id> + <default>OCC</default> + </attribute> + <attribute> + <id>MODEL</id> + <default>POWER8</default> + </attribute> + <attribute> + <id>OCC_MASTER_CAPABLE</id> + </attribute> +</targetType> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/target_types_hb.xml b/src/usr/targeting/common/xmltohb/target_types_hb.xml index 148b072f9..78f0504e2 100644 --- a/src/usr/targeting/common/xmltohb/target_types_hb.xml +++ b/src/usr/targeting/common/xmltohb/target_types_hb.xml @@ -38,6 +38,28 @@ <attribute><id>IBSCOM_ENABLE_OVERRIDE</id></attribute> <attribute><id>HB_MUTEX_TEST_LOCK</id></attribute> <attribute><id>HB_EXISTING_IMAGE</id></attribute> + <attribute><id>N_PLUS_ONE_BULK_POWER_LIMIT_WATTS</id></attribute> + <attribute><id>N_PLUS_ONE_MAX_MEM_POWER_WATTS</id></attribute> + <attribute><id>N_BULK_POWER_LIMIT_WATTS</id></attribute> + <attribute><id>N_MAX_MEM_POWER_WATTS</id></attribute> + <attribute><id>REGULATOR_EFFICIENCY_FACTOR</id></attribute> + <attribute><id>MIN_POWER_CAP_WATTS</id></attribute> + <attribute><id>MIN_MEM_UTILIZATION_THROTTLING</id></attribute> + <attribute><id>PROC_DVFS_TEMP_DEG_C</id></attribute> + <attribute><id>PROC_ERROR_TEMP_DEG_C</id></attribute> + <attribute><id>PROC_READ_TIMEOUT_SEC</id></attribute> + <attribute><id>MEMCTRL_THROTTLE_TEMP_DEG_C</id></attribute> + <attribute><id>MEMCTRL_ERROR_TEMP_DEG_C</id></attribute> + <attribute><id>MEMCTRL_READ_TIMEOUT_SEC</id></attribute> + <attribute><id>DIMM_THROTTLE_TEMP_DEG_C</id></attribute> + <attribute><id>DIMM_ERROR_TEMP_DEG_C</id></attribute> + <attribute><id>DIMM_READ_TIMEOUT_SEC</id></attribute> + <attribute><id>ADC_CHANNEL_FUNC_IDS</id></attribute> + <attribute><id>ADC_CHANNEL_GNDS</id></attribute> + <attribute><id>ADC_CHANNEL_GAINS</id></attribute> + <attribute><id>ADC_CHANNEL_OFFSETS</id></attribute> + <attribute><id>APSS_GPIO_PORT_MODES</id></attribute> + <attribute><id>APSS_GPIO_PORT_PINS</id></attribute> </targetTypeExtension> <targetTypeExtension> diff --git a/src/usr/targeting/xmltohb/updatetargetxml.pl b/src/usr/targeting/xmltohb/updatetargetxml.pl index 5c9f916cf..8d86159df 100755 --- a/src/usr/targeting/xmltohb/updatetargetxml.pl +++ b/src/usr/targeting/xmltohb/updatetargetxml.pl @@ -6,7 +6,9 @@ # # OpenPOWER HostBoot Project # -# COPYRIGHT International Business Machines Corp. 2012,2014 +# Contributors Listed Below - COPYRIGHT 2012,2014 +# [+] International Business Machines Corp. +# # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -41,6 +43,8 @@ use strict; use XML::Simple; use Data::Dumper; +$XML::Simple::PREFERRED_PARSER = 'XML::Parser'; + my $hb = ""; my $common = ""; my $usage = 0; |

