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author | Matt Derksen <mderkse1@us.ibm.com> | 2019-06-20 16:33:05 -0500 |
---|---|---|
committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-08-15 17:06:46 -0500 |
commit | fc5fa5842e3e03e1419501de236c36b1641281d0 (patch) | |
tree | 55838f029f7fdb4404be79bc562ea4bce29aac02 /src/usr/runtime | |
parent | 3048b4b1689faf1842499f6402f6175909b2b410 (diff) | |
download | talos-hostboot-fc5fa5842e3e03e1419501de236c36b1641281d0.tar.gz talos-hostboot-fc5fa5842e3e03e1419501de236c36b1641281d0.zip |
Runtime scom support for OCMBs
fapi2::getScom on OCMB targets eventually resolves
to a mmio call at runtime.
This commit registers a runtime version of mmioScomPerformOp
to the IBSCOM device ops for OCMB targets.
During runtime, hostboot will rely on the hypervisor (opal/phyp)
to issue the inband commands to perform the operation on the
desired OCMB.
Change-Id: I5ec25d0401267125419cd579a3a2d752f14234a4
RTC:210321
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80235
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Reviewed-by: Roland Veloz <rveloz@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/runtime')
-rw-r--r-- | src/usr/runtime/customize_attrs_for_payload.C | 227 |
1 files changed, 172 insertions, 55 deletions
diff --git a/src/usr/runtime/customize_attrs_for_payload.C b/src/usr/runtime/customize_attrs_for_payload.C index 1846512b7..980037980 100644 --- a/src/usr/runtime/customize_attrs_for_payload.C +++ b/src/usr/runtime/customize_attrs_for_payload.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2018 */ +/* Contributors Listed Below - COPYRIGHT 2012,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -229,6 +229,79 @@ errlHndl_t computeNonPhypRtTarget( o_rtTargetId = PIR_t::createCoreId(o_rtTargetId,pos); o_rtTargetId |= HBRT_CORE_TYPE; } + else if( targetingTargetType == TARGETING::TYPE_OCMB_CHIP) + { + // OCMB (This layout mimics MEMBUF) + // 0b1000.0000.0000.0000.0000.0GGG.GCCC.UUUU + // where GGGG is group, CCC is chip, UUUU is OMI chip unit + // + TARGETING::TargetHandleList targetList; + + getParentAffinityTargets(targetList, + i_pTarget, + TARGETING::CLASS_UNIT, + TARGETING::TYPE_OMI, + TARGETING::UTIL_FILTER_ALL); + + if( targetList.empty() ) + { + auto huid = get_huid(i_pTarget); + TRACFCOMP(g_trac_runtime, ERR_MRK + "No associated OMI targeting target(s) found for OCMB_CHIP " + "targeting target with HUID of 0x%08X", + huid); + /*@ + * @error + * @moduleid RUNTIME::MOD_CUST_COMP_NON_PHYP_RT_TARGET + * @reasoncode RUNTIME::RT_NO_OMI_TARGET_FOUND + * @userdata1 OCMB targeting target's HUID + * @devdesc No associated OMI targeting target(s) found for + * given OCMB targeting target + */ + pError = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_INFORMATIONAL, + RUNTIME::MOD_CUST_COMP_NON_PHYP_RT_TARGET, + RUNTIME::RT_NO_OMI_TARGET_FOUND, + huid, + 0, + true); + + ERRORLOG::ErrlUserDetailsTarget(i_pTarget,"Targeting Target"). + addToLog(pError); + + break; + } + + auto target = targetList[0]; + auto pos = target->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + + targetList.clear(); + getParentAffinityTargets(targetList, + target, + TARGETING::CLASS_CHIP, + TARGETING::TYPE_PROC, + TARGETING::UTIL_FILTER_ALL); + + if(targetList.empty()) + { + pError = createProcNotFoundError(target); + break; + } + + auto procTarget = targetList[0]; + pError = computeNonPhypRtTarget(procTarget, o_rtTargetId); + if(pError) + { + break; + } + + // GGGG = 0 by default, CCC = o_rtTargetId, UUUU = pos + // HBRT_MEMBUF_TYPE distinguishes this target as a MEMBUF/OCMB + // Reusing MEMBUF for OCMB type as the two can't coexist + o_rtTargetId = (o_rtTargetId << RT_TARG::MEMBUF_ID_SHIFT); + o_rtTargetId += pos; // OMI chip unit acts as unique target position + o_rtTargetId |= HBRT_MEMBUF_TYPE; + } else { auto huid = get_huid(i_pTarget); @@ -305,6 +378,10 @@ errlHndl_t getRtTypeForTarget( case TARGETING::TYPE_CORE: rtType = HBRT_CORE_TYPE; break; + case TARGETING::TYPE_OCMB_CHIP: + // reusing MEMBUF type as it is not present + rtType = HBRT_MEMBUF_TYPE; + break; default: found = false; break; @@ -355,13 +432,15 @@ errlHndl_t configureHbrtHypIds(const bool i_configForPhyp) TARGETING::CLASS_CHIP, TARGETING::TYPE_MEMBUF); TARGETING::PredicateCTM isaCore( TARGETING::CLASS_UNIT, TARGETING::TYPE_CORE); - TARGETING::PredicatePostfixExpr isaProcMembufOrCore; - isaProcMembufOrCore.push(&isaProc).push(&isaMembuf).Or() - .push(&isaCore).Or(); + TARGETING::PredicateCTM isanOcmbChip( + TARGETING::CLASS_CHIP, TARGETING::TYPE_OCMB_CHIP); + TARGETING::PredicatePostfixExpr isaProcMembufCoreorOcmb; + isaProcMembufCoreorOcmb.push(&isaProc).push(&isaMembuf).Or() + .push(&isaCore).Or().push(&isanOcmbChip).Or(); TARGETING::TargetRangeFilter pIt( TARGETING::targetService().begin(), TARGETING::targetService().end(), - &isaProcMembufOrCore); + &isaProcMembufCoreorOcmb); for (; pIt; ++pIt) { auto hbrtHypId = HBRT_HYP_ID_UNKNOWN; @@ -376,61 +455,99 @@ errlHndl_t configureHbrtHypIds(const bool i_configForPhyp) break; } - if( (*pIt)->getAttr<TARGETING::ATTR_TYPE>() - == TARGETING::TYPE_CORE) + switch ((*pIt)->getAttr<TARGETING::ATTR_TYPE>()) { - if(TARGETING::is_fused_mode()) + case TARGETING::TYPE_CORE: { - // If we're in fused core mode, all core ID's must - // match that of the parent EX - auto type = TARGETING::TYPE_EX; - const TARGETING::Target* pEx = - TARGETING::getParent(*pIt,type); - - // If this fails, everything is already hosed - assert(pEx != NULL); - - hbrtHypId = (pEx)->getAttr<TARGETING::ATTR_ORDINAL_ID>(); - }else + if(TARGETING::is_fused_mode()) + { + // If we're in fused core mode, all core ID's must + // match that of the parent EX + auto type = TARGETING::TYPE_EX; + const TARGETING::Target* pEx = + TARGETING::getParent(*pIt,type); + + // If this fails, everything is already hosed + assert(pEx != NULL); + + hbrtHypId = (pEx)->getAttr<TARGETING::ATTR_ORDINAL_ID>(); + } + else + { + hbrtHypId = (*pIt)->getAttr<TARGETING::ATTR_ORDINAL_ID>(); + } + break; + } + case TARGETING::TYPE_MEMBUF: + { + //MEMBUF + // 0b1000.0000.0000.0000.0000.0PPP.PPPP.MMMM + // where PP is the parent proc's id, MMMM is memory channel + // + TARGETING::TargetHandleList targetList; + + getParentAffinityTargets(targetList, + (*pIt), + TARGETING::CLASS_UNIT, + TARGETING::TYPE_DMI, false); + assert( !targetList.empty() ); + + auto dmi_target = targetList[0]; + auto pos = dmi_target->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + + targetList.clear(); + getParentAffinityTargets(targetList, + dmi_target, + TARGETING::CLASS_CHIP, + TARGETING::TYPE_PROC, false); + assert( !targetList.empty() ); + + auto procTarget = targetList[0]; + hbrtHypId = procTarget->getAttr<TARGETING::ATTR_ORDINAL_ID>(); + hbrtHypId = (hbrtHypId << RT_TARG::MEMBUF_ID_SHIFT); + hbrtHypId += pos; + break; + } + case TARGETING::TYPE_OCMB_CHIP: + { + TRACDCOMP( g_trac_runtime, "configureHbrtHypIds> " + "Set ATTR_HBRT_HYP_ID attribute for OCMB target " + "with HUID of 0x%08X", TARGETING::get_huid(*pIt)); + + // TYPE_OCMB_CHIP (mimics MEMBUF layout) + // 0b1000.0000.0000.0000.0000.0PPP.PPPP.UUUU + // where PP is the parent proc's id, UUUU is OMI chip unit + // + TARGETING::TargetHandleList targetList; + + getParentAffinityTargets(targetList, + (*pIt), + TARGETING::CLASS_UNIT, + TARGETING::TYPE_OMI, false); + assert( !targetList.empty() ); + + auto omi_target = targetList[0]; + auto pos = omi_target->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + + targetList.clear(); + getParentAffinityTargets(targetList, + omi_target, + TARGETING::CLASS_CHIP, + TARGETING::TYPE_PROC, false); + assert( !targetList.empty() ); + + auto procTarget = targetList[0]; + // Reusing MEMBUF for OCMB Chip communication + hbrtHypId = procTarget->getAttr<TARGETING::ATTR_ORDINAL_ID>(); + hbrtHypId = (hbrtHypId << RT_TARG::MEMBUF_ID_SHIFT); + hbrtHypId += pos; // Add OMI chip unit to end + break; + } + default: // just PROC { hbrtHypId = (*pIt)->getAttr<TARGETING::ATTR_ORDINAL_ID>(); } - } - else if( (*pIt)->getAttr<TARGETING::ATTR_TYPE>() - == TARGETING::TYPE_MEMBUF ) - { - //MEMBUF - // 0b1000.0000.0000.0000.0000.0PPP.PPPP.MMMM - // where PP is the parent proc's id, MMMM is memory channel - // - TARGETING::TargetHandleList targetList; - - getParentAffinityTargets(targetList, - (*pIt), - TARGETING::CLASS_UNIT, - TARGETING::TYPE_DMI, false); - assert( !targetList.empty() ); - - auto dmi_target = targetList[0]; - auto pos = dmi_target->getAttr<TARGETING::ATTR_CHIP_UNIT>(); - - targetList.clear(); - getParentAffinityTargets(targetList, - dmi_target, - TARGETING::CLASS_CHIP, - TARGETING::TYPE_PROC, false); - assert( !targetList.empty() ); - - auto procTarget = targetList[0]; - hbrtHypId = procTarget->getAttr<TARGETING::ATTR_ORDINAL_ID>(); - hbrtHypId = (hbrtHypId << RT_TARG::MEMBUF_ID_SHIFT); - hbrtHypId += pos; - } - else // just PROC - { - hbrtHypId = (*pIt)->getAttr<TARGETING::ATTR_ORDINAL_ID>(); - } - + } // end of ATTR_TYPE switch hbrtHypId |= rtType; } else |