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-rw-r--r--src/include/usr/mmio/mmio_reasoncodes.H1
-rw-r--r--src/include/usr/runtime/runtime_reasoncodes.H3
-rw-r--r--src/makefile1
-rw-r--r--src/usr/expaccess/runtime/makefile5
-rw-r--r--src/usr/mmio/makefile1
-rw-r--r--src/usr/mmio/mmio.H6
-rw-r--r--src/usr/mmio/runtime/makefile33
-rw-r--r--src/usr/mmio/runtime/rt_mmio.C108
-rw-r--r--src/usr/runtime/customize_attrs_for_payload.C227
-rw-r--r--src/usr/scom/runtime/rt_scom.C14
-rw-r--r--src/usr/targeting/common/xmltohb/target_types_hb.xml3
11 files changed, 337 insertions, 65 deletions
diff --git a/src/include/usr/mmio/mmio_reasoncodes.H b/src/include/usr/mmio/mmio_reasoncodes.H
index 6a96547ac..fb7a059a8 100644
--- a/src/include/usr/mmio/mmio_reasoncodes.H
+++ b/src/include/usr/mmio/mmio_reasoncodes.H
@@ -41,6 +41,7 @@ namespace MMIO
MOD_CHECK_OCMB_ERROR = 0x07,
MOD_DETERMINE_CALLOUTS = 0x08,
MOD_DETERMINE_EXP_CALLOUTS = 0x09,
+ RT_OCMB_MMIO_PERFORM_OP = 0x0A,
};
enum MMIOReasonCode
diff --git a/src/include/usr/runtime/runtime_reasoncodes.H b/src/include/usr/runtime/runtime_reasoncodes.H
index 44689ba29..5cfdce5c2 100644
--- a/src/include/usr/runtime/runtime_reasoncodes.H
+++ b/src/include/usr/runtime/runtime_reasoncodes.H
@@ -145,7 +145,8 @@ namespace RUNTIME
RC_NULL_FIRMWARE_MSG_PTR = RUNTIME_COMP_ID | 0x45,
RC_SERIALIZE_ATTRIBUTE_FAILED = RUNTIME_COMP_ID | 0x46,
RC_NO_SPACE_FOR_ATTRIBUTE_SERIALIZATION = RUNTIME_COMP_ID | 0x47,
- RC_CANNOT_MAKE_ATTRIBUTE = RUNTIME_COMP_ID | 0x47,
+ RC_CANNOT_MAKE_ATTRIBUTE = RUNTIME_COMP_ID | 0x48,
+ RT_NO_OMI_TARGET_FOUND = RUNTIME_COMP_ID | 0x49,
};
enum UserDetailsTypes
diff --git a/src/makefile b/src/makefile
index 1a79d473c..c05e71078 100644
--- a/src/makefile
+++ b/src/makefile
@@ -323,6 +323,7 @@ RUNTIME_MODULES += imageprocs_rt
RUNTIME_MODULES += $(if $(CONFIG_NVDIMM),nvdimm_rt)
RUNTIME_MODULES += mss_rt
RUNTIME_MODULES += expaccess_rt
+RUNTIME_MODULES += mmio_rt
# This is exported so that gcov knows the list of runtime modules to
# exclude from instrumentation. We can't simply export RUNTIME_MODULES or
diff --git a/src/usr/expaccess/runtime/makefile b/src/usr/expaccess/runtime/makefile
index ed744eab2..722d966e6 100644
--- a/src/usr/expaccess/runtime/makefile
+++ b/src/usr/expaccess/runtime/makefile
@@ -22,6 +22,7 @@
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG
+HOSTBOOT_RUNTIME = 1
ROOTPATH = ../../../..
MODULE = expaccess_rt
@@ -30,7 +31,9 @@ SUBDIRS += test.d
include ../expaccess.mk
+EXTRAINCDIR += ../
+
VPATH += ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures/hwp/memory/
VPATH += ${ROOTPATH}/src/usr/expaccess/
-include ${ROOTPATH}/config.mk \ No newline at end of file
+include ${ROOTPATH}/config.mk
diff --git a/src/usr/mmio/makefile b/src/usr/mmio/makefile
index 0787dbe50..2cc5fd76a 100644
--- a/src/usr/mmio/makefile
+++ b/src/usr/mmio/makefile
@@ -26,6 +26,7 @@ ROOTPATH = ../../..
MODULE = mmio
SUBDIRS += test.d
+SUBDIRS += runtime.d
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc/
diff --git a/src/usr/mmio/mmio.H b/src/usr/mmio/mmio.H
index d69ade6f7..96ea25e8d 100644
--- a/src/usr/mmio/mmio.H
+++ b/src/usr/mmio/mmio.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -25,6 +25,10 @@
#ifndef __MMIO_H
#define __MMIO_H
+#include <errl/errlentry.H>
+#include <devicefw/driverif.H>
+#include <targeting/common/target.H>
+
/** @file mmio.H
* @brief Provides interface to perform MMIO operations to Explorer chips
* */
diff --git a/src/usr/mmio/runtime/makefile b/src/usr/mmio/runtime/makefile
new file mode 100644
index 000000000..c61c68c39
--- /dev/null
+++ b/src/usr/mmio/runtime/makefile
@@ -0,0 +1,33 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/mmio/runtime/makefile $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2019
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+HOSTBOOT_RUNTIME = 1
+ROOTPATH = ../../../..
+MODULE = mmio_rt
+
+#include unique object modules
+OBJS += rt_mmio.o
+
+VPATH += ..
+include $(ROOTPATH)/config.mk
diff --git a/src/usr/mmio/runtime/rt_mmio.C b/src/usr/mmio/runtime/rt_mmio.C
new file mode 100644
index 000000000..620dff855
--- /dev/null
+++ b/src/usr/mmio/runtime/rt_mmio.C
@@ -0,0 +1,108 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/mmio/runtime/rt_mmio.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2019 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+// @file src/usr/mmio/runtime/rt_mmio.C
+// @brief Runtime mmio operations -- particularly for scom operations
+
+#include "../mmio.H"
+#include <scom/runtime/rt_scomif.H>
+#include <devicefw/driverif.H>
+#include <errl/errlentry.H>
+#include <limits.h>
+#include <usr/mmio/mmio_reasoncodes.H>
+
+// Trace definition
+trace_desc_t* g_trac_mmio = NULL;
+TRAC_INIT(&g_trac_mmio, MMIO_COMP_NAME, 2*KILOBYTE, TRACE::BUFFER_SLOW);
+
+//#define TRACUCOMP(args...) TRACFCOMP(args)
+#define TRACUCOMP(args...)
+
+namespace MMIO
+{
+// Direct OCMB reads and writes to the device's memory mapped memory.
+DEVICE_REGISTER_ROUTE(DeviceFW::WILDCARD,
+ DeviceFW::MMIO,
+ TARGETING::TYPE_OCMB_CHIP,
+ ocmbMmioPerformOp);
+
+/*******************************************************************************
+ *
+ * See comments in header file
+ *
+ */
+errlHndl_t ocmbMmioPerformOp(DeviceFW::OperationType i_opType,
+ TARGETING::TargetHandle_t i_ocmbTarget,
+ void* io_buffer,
+ size_t& io_buflen,
+ int64_t i_accessType,
+ va_list i_args)
+{
+ errlHndl_t l_err = nullptr;
+ uint64_t l_offset = va_arg(i_args, uint64_t);
+
+ TRACUCOMP(g_trac_mmio, ENTER_MRK"runtime ocmbMmioPerformOp");
+ TRACUCOMP(g_trac_mmio, INFO_MRK"op=%d, target=0x%.8X",
+ i_opType, TARGETING::get_huid(i_ocmbTarget));
+ TRACUCOMP(g_trac_mmio, INFO_MRK"buffer=%p, length=%d, accessType=%ld",
+ io_buffer, io_buflen, i_accessType);
+ TRACUCOMP(g_trac_mmio, INFO_MRK"offset=0x%lX", l_offset);
+
+ // Verify offset is within scom mmio range
+ if ( (l_offset >= (4 * GIGABYTE)) && (l_offset < (6 * GIGABYTE)) )
+ {
+ // send message to hypervisor level to do the mmio operation
+ l_err = SCOM::sendScomToHyp(i_opType, i_ocmbTarget,
+ l_offset, io_buffer);
+ }
+ else
+ {
+ // Only Scom range is supported for MMIO runtime context
+ /*@
+ * @errortype
+ * @moduleid MMIO::RT_OCMB_MMIO_PERFORM_OP
+ * @reasoncode MMIO::RC_INVALID_OFFSET
+ * @userdata1[0:31] Target huid
+ * @userdata1[32:63] Data Offset
+ * @userdata2[0:31] Operation Type
+ * @userdata2[32:63] Buffer Length
+ * @devdesc Invalid offset, requested
+ * address was out of range for a MMIO operation.
+ * @custdesc Unexpected memory subsystem firmware error.
+ */
+ l_err = new ERRORLOG::ErrlEntry(
+ ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ MMIO::RT_OCMB_MMIO_PERFORM_OP,
+ MMIO::RC_INVALID_OFFSET,
+ TWO_UINT32_TO_UINT64(
+ TARGETING::get_huid(i_ocmbTarget),
+ l_offset),
+ TWO_UINT32_TO_UINT64(i_opType, io_buflen),
+ ERRORLOG::ErrlEntry::ADD_SW_CALLOUT);
+ }
+
+ return l_err;
+}
+
+}; // end namespace MMIO
diff --git a/src/usr/runtime/customize_attrs_for_payload.C b/src/usr/runtime/customize_attrs_for_payload.C
index 1846512b7..980037980 100644
--- a/src/usr/runtime/customize_attrs_for_payload.C
+++ b/src/usr/runtime/customize_attrs_for_payload.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2012,2018 */
+/* Contributors Listed Below - COPYRIGHT 2012,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -229,6 +229,79 @@ errlHndl_t computeNonPhypRtTarget(
o_rtTargetId = PIR_t::createCoreId(o_rtTargetId,pos);
o_rtTargetId |= HBRT_CORE_TYPE;
}
+ else if( targetingTargetType == TARGETING::TYPE_OCMB_CHIP)
+ {
+ // OCMB (This layout mimics MEMBUF)
+ // 0b1000.0000.0000.0000.0000.0GGG.GCCC.UUUU
+ // where GGGG is group, CCC is chip, UUUU is OMI chip unit
+ //
+ TARGETING::TargetHandleList targetList;
+
+ getParentAffinityTargets(targetList,
+ i_pTarget,
+ TARGETING::CLASS_UNIT,
+ TARGETING::TYPE_OMI,
+ TARGETING::UTIL_FILTER_ALL);
+
+ if( targetList.empty() )
+ {
+ auto huid = get_huid(i_pTarget);
+ TRACFCOMP(g_trac_runtime, ERR_MRK
+ "No associated OMI targeting target(s) found for OCMB_CHIP "
+ "targeting target with HUID of 0x%08X",
+ huid);
+ /*@
+ * @error
+ * @moduleid RUNTIME::MOD_CUST_COMP_NON_PHYP_RT_TARGET
+ * @reasoncode RUNTIME::RT_NO_OMI_TARGET_FOUND
+ * @userdata1 OCMB targeting target's HUID
+ * @devdesc No associated OMI targeting target(s) found for
+ * given OCMB targeting target
+ */
+ pError = new ERRORLOG::ErrlEntry(
+ ERRORLOG::ERRL_SEV_INFORMATIONAL,
+ RUNTIME::MOD_CUST_COMP_NON_PHYP_RT_TARGET,
+ RUNTIME::RT_NO_OMI_TARGET_FOUND,
+ huid,
+ 0,
+ true);
+
+ ERRORLOG::ErrlUserDetailsTarget(i_pTarget,"Targeting Target").
+ addToLog(pError);
+
+ break;
+ }
+
+ auto target = targetList[0];
+ auto pos = target->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+
+ targetList.clear();
+ getParentAffinityTargets(targetList,
+ target,
+ TARGETING::CLASS_CHIP,
+ TARGETING::TYPE_PROC,
+ TARGETING::UTIL_FILTER_ALL);
+
+ if(targetList.empty())
+ {
+ pError = createProcNotFoundError(target);
+ break;
+ }
+
+ auto procTarget = targetList[0];
+ pError = computeNonPhypRtTarget(procTarget, o_rtTargetId);
+ if(pError)
+ {
+ break;
+ }
+
+ // GGGG = 0 by default, CCC = o_rtTargetId, UUUU = pos
+ // HBRT_MEMBUF_TYPE distinguishes this target as a MEMBUF/OCMB
+ // Reusing MEMBUF for OCMB type as the two can't coexist
+ o_rtTargetId = (o_rtTargetId << RT_TARG::MEMBUF_ID_SHIFT);
+ o_rtTargetId += pos; // OMI chip unit acts as unique target position
+ o_rtTargetId |= HBRT_MEMBUF_TYPE;
+ }
else
{
auto huid = get_huid(i_pTarget);
@@ -305,6 +378,10 @@ errlHndl_t getRtTypeForTarget(
case TARGETING::TYPE_CORE:
rtType = HBRT_CORE_TYPE;
break;
+ case TARGETING::TYPE_OCMB_CHIP:
+ // reusing MEMBUF type as it is not present
+ rtType = HBRT_MEMBUF_TYPE;
+ break;
default:
found = false;
break;
@@ -355,13 +432,15 @@ errlHndl_t configureHbrtHypIds(const bool i_configForPhyp)
TARGETING::CLASS_CHIP, TARGETING::TYPE_MEMBUF);
TARGETING::PredicateCTM isaCore(
TARGETING::CLASS_UNIT, TARGETING::TYPE_CORE);
- TARGETING::PredicatePostfixExpr isaProcMembufOrCore;
- isaProcMembufOrCore.push(&isaProc).push(&isaMembuf).Or()
- .push(&isaCore).Or();
+ TARGETING::PredicateCTM isanOcmbChip(
+ TARGETING::CLASS_CHIP, TARGETING::TYPE_OCMB_CHIP);
+ TARGETING::PredicatePostfixExpr isaProcMembufCoreorOcmb;
+ isaProcMembufCoreorOcmb.push(&isaProc).push(&isaMembuf).Or()
+ .push(&isaCore).Or().push(&isanOcmbChip).Or();
TARGETING::TargetRangeFilter pIt(
TARGETING::targetService().begin(),
TARGETING::targetService().end(),
- &isaProcMembufOrCore);
+ &isaProcMembufCoreorOcmb);
for (; pIt; ++pIt)
{
auto hbrtHypId = HBRT_HYP_ID_UNKNOWN;
@@ -376,61 +455,99 @@ errlHndl_t configureHbrtHypIds(const bool i_configForPhyp)
break;
}
- if( (*pIt)->getAttr<TARGETING::ATTR_TYPE>()
- == TARGETING::TYPE_CORE)
+ switch ((*pIt)->getAttr<TARGETING::ATTR_TYPE>())
{
- if(TARGETING::is_fused_mode())
+ case TARGETING::TYPE_CORE:
{
- // If we're in fused core mode, all core ID's must
- // match that of the parent EX
- auto type = TARGETING::TYPE_EX;
- const TARGETING::Target* pEx =
- TARGETING::getParent(*pIt,type);
-
- // If this fails, everything is already hosed
- assert(pEx != NULL);
-
- hbrtHypId = (pEx)->getAttr<TARGETING::ATTR_ORDINAL_ID>();
- }else
+ if(TARGETING::is_fused_mode())
+ {
+ // If we're in fused core mode, all core ID's must
+ // match that of the parent EX
+ auto type = TARGETING::TYPE_EX;
+ const TARGETING::Target* pEx =
+ TARGETING::getParent(*pIt,type);
+
+ // If this fails, everything is already hosed
+ assert(pEx != NULL);
+
+ hbrtHypId = (pEx)->getAttr<TARGETING::ATTR_ORDINAL_ID>();
+ }
+ else
+ {
+ hbrtHypId = (*pIt)->getAttr<TARGETING::ATTR_ORDINAL_ID>();
+ }
+ break;
+ }
+ case TARGETING::TYPE_MEMBUF:
+ {
+ //MEMBUF
+ // 0b1000.0000.0000.0000.0000.0PPP.PPPP.MMMM
+ // where PP is the parent proc's id, MMMM is memory channel
+ //
+ TARGETING::TargetHandleList targetList;
+
+ getParentAffinityTargets(targetList,
+ (*pIt),
+ TARGETING::CLASS_UNIT,
+ TARGETING::TYPE_DMI, false);
+ assert( !targetList.empty() );
+
+ auto dmi_target = targetList[0];
+ auto pos = dmi_target->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+
+ targetList.clear();
+ getParentAffinityTargets(targetList,
+ dmi_target,
+ TARGETING::CLASS_CHIP,
+ TARGETING::TYPE_PROC, false);
+ assert( !targetList.empty() );
+
+ auto procTarget = targetList[0];
+ hbrtHypId = procTarget->getAttr<TARGETING::ATTR_ORDINAL_ID>();
+ hbrtHypId = (hbrtHypId << RT_TARG::MEMBUF_ID_SHIFT);
+ hbrtHypId += pos;
+ break;
+ }
+ case TARGETING::TYPE_OCMB_CHIP:
+ {
+ TRACDCOMP( g_trac_runtime, "configureHbrtHypIds> "
+ "Set ATTR_HBRT_HYP_ID attribute for OCMB target "
+ "with HUID of 0x%08X", TARGETING::get_huid(*pIt));
+
+ // TYPE_OCMB_CHIP (mimics MEMBUF layout)
+ // 0b1000.0000.0000.0000.0000.0PPP.PPPP.UUUU
+ // where PP is the parent proc's id, UUUU is OMI chip unit
+ //
+ TARGETING::TargetHandleList targetList;
+
+ getParentAffinityTargets(targetList,
+ (*pIt),
+ TARGETING::CLASS_UNIT,
+ TARGETING::TYPE_OMI, false);
+ assert( !targetList.empty() );
+
+ auto omi_target = targetList[0];
+ auto pos = omi_target->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+
+ targetList.clear();
+ getParentAffinityTargets(targetList,
+ omi_target,
+ TARGETING::CLASS_CHIP,
+ TARGETING::TYPE_PROC, false);
+ assert( !targetList.empty() );
+
+ auto procTarget = targetList[0];
+ // Reusing MEMBUF for OCMB Chip communication
+ hbrtHypId = procTarget->getAttr<TARGETING::ATTR_ORDINAL_ID>();
+ hbrtHypId = (hbrtHypId << RT_TARG::MEMBUF_ID_SHIFT);
+ hbrtHypId += pos; // Add OMI chip unit to end
+ break;
+ }
+ default: // just PROC
{
hbrtHypId = (*pIt)->getAttr<TARGETING::ATTR_ORDINAL_ID>();
}
- }
- else if( (*pIt)->getAttr<TARGETING::ATTR_TYPE>()
- == TARGETING::TYPE_MEMBUF )
- {
- //MEMBUF
- // 0b1000.0000.0000.0000.0000.0PPP.PPPP.MMMM
- // where PP is the parent proc's id, MMMM is memory channel
- //
- TARGETING::TargetHandleList targetList;
-
- getParentAffinityTargets(targetList,
- (*pIt),
- TARGETING::CLASS_UNIT,
- TARGETING::TYPE_DMI, false);
- assert( !targetList.empty() );
-
- auto dmi_target = targetList[0];
- auto pos = dmi_target->getAttr<TARGETING::ATTR_CHIP_UNIT>();
-
- targetList.clear();
- getParentAffinityTargets(targetList,
- dmi_target,
- TARGETING::CLASS_CHIP,
- TARGETING::TYPE_PROC, false);
- assert( !targetList.empty() );
-
- auto procTarget = targetList[0];
- hbrtHypId = procTarget->getAttr<TARGETING::ATTR_ORDINAL_ID>();
- hbrtHypId = (hbrtHypId << RT_TARG::MEMBUF_ID_SHIFT);
- hbrtHypId += pos;
- }
- else // just PROC
- {
- hbrtHypId = (*pIt)->getAttr<TARGETING::ATTR_ORDINAL_ID>();
- }
-
+ } // end of ATTR_TYPE switch
hbrtHypId |= rtType;
}
else
diff --git a/src/usr/scom/runtime/rt_scom.C b/src/usr/scom/runtime/rt_scom.C
index a27dfe81e..eafc14790 100644
--- a/src/usr/scom/runtime/rt_scom.C
+++ b/src/usr/scom/runtime/rt_scom.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2018 */
+/* Contributors Listed Below - COPYRIGHT 2013,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -169,9 +169,9 @@ errlHndl_t sendScomToHyp(DeviceFW::OperationType i_opType,
do
{
// Convert target to something Sapphire understands
- RT_TARG::rtChipId_t proc_id = 0;
+ RT_TARG::rtChipId_t target_id = 0;
l_err = RT_TARG::getRtTarget(i_target,
- proc_id);
+ target_id);
if(l_err)
{
break;
@@ -185,7 +185,7 @@ errlHndl_t sendScomToHyp(DeviceFW::OperationType i_opType,
if(i_opType == DeviceFW::READ)
{
l_hostRC =
- g_hostInterfaces->scom_read(proc_id,
+ g_hostInterfaces->scom_read(target_id,
i_scomAddr,
io_buffer
);
@@ -193,7 +193,7 @@ errlHndl_t sendScomToHyp(DeviceFW::OperationType i_opType,
else if (i_opType == DeviceFW::WRITE)
{
l_hostRC =
- g_hostInterfaces->scom_write(proc_id,
+ g_hostInterfaces->scom_write(target_id,
i_scomAddr,
io_buffer
);
@@ -203,8 +203,8 @@ errlHndl_t sendScomToHyp(DeviceFW::OperationType i_opType,
{
TRACFCOMP(g_trac_scom,ERR_MRK
"Hypervisor scom read/write failed. "
- "rc 0x%X target 0x%llX proc_id 0x%llX addr 0x%llX r/w %d",
- l_hostRC, get_huid(i_target), proc_id, i_scomAddr, i_opType);
+ "rc 0x%X target 0x%llX target_id 0x%llX addr 0x%llX r/w %d",
+ l_hostRC, get_huid(i_target), target_id, i_scomAddr, i_opType);
// Use an unused bit in the 64-bit scom range to indicate
// read/write. Cannot use bit0 since that is part of an
diff --git a/src/usr/targeting/common/xmltohb/target_types_hb.xml b/src/usr/targeting/common/xmltohb/target_types_hb.xml
index 4b3599cef..99c74e604 100644
--- a/src/usr/targeting/common/xmltohb/target_types_hb.xml
+++ b/src/usr/targeting/common/xmltohb/target_types_hb.xml
@@ -87,6 +87,9 @@
<targetTypeExtension>
<id>chip-ocmb</id>
<attribute>
+ <id>HBRT_HYP_ID</id>
+ </attribute>
+ <attribute>
<id>IBSCOM_MUTEX</id>
</attribute>
<attribute>
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