diff options
author | Thi Tran <thi@us.ibm.com> | 2014-10-24 07:50:34 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-10-31 10:54:11 -0500 |
commit | 9d72dd315b1a1633cb2992afaed6d9f55e9e4274 (patch) | |
tree | e34d41e12e23cd6f1985e4aea1f5cbf33396ea10 /src/usr/hwpf/hwp/proc_chip_ec_feature.xml | |
parent | 420044aa017b534e92e3043d6bda85eeff3c7a59 (diff) | |
download | talos-hostboot-9d72dd315b1a1633cb2992afaed6d9f55e9e4274.tar.gz talos-hostboot-9d72dd315b1a1633cb2992afaed6d9f55e9e4274.zip |
SW282769: FW820:Subsequent MPIPL test hit a B111BA24 - RC_PROC_TOD_INIT_ERROR er
CQ:SW282769
Change-Id: Ieb9062e1cec2180c9aad7e7355a0aeacd022bbca
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14123
Reviewed-by: Brian H. Horton <brianh@linux.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14173
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/proc_chip_ec_feature.xml')
-rw-r--r-- | src/usr/hwpf/hwp/proc_chip_ec_feature.xml | 281 |
1 files changed, 277 insertions, 4 deletions
diff --git a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml index 0226cc875..0647550e0 100644 --- a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml +++ b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml @@ -22,14 +22,14 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_chip_ec_feature.xml,v 1.55 2014/08/18 19:55:30 jmcgill Exp $ --> +<!-- $Id: proc_chip_ec_feature.xml,v 1.59 2014/10/23 18:56:33 jklazyns Exp $ --> <!-- Defines the attributes that are based on EC level --> <attributes> <attribute> <id>ATTR_CHIP_EC_FEATURE_VENICE_SPECIFIC</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - For Venice specific inits. Returns true if Venice. + For Venice specific inits. Returns true if Venice and Naples. </description> <chipEcFeature> <chip> @@ -39,7 +39,7 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> - </chipEcFeature> + </chipEcFeature> </attribute> <attribute> <id>ATTR_CHIP_EC_FEATURE_NAPLES_SPECIFIC</id> @@ -58,6 +58,39 @@ </chipEcFeature> </attribute> <attribute> + <id>ATTR_CHIP_EC_FEATURE_USE_POLLING_PROT</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Returns if a chip should use wiggle-flip polling protocol. True if: + Murano EC 0x20 or greater + Venice EC 0x20 or greater + Naples EC 0x10 or greater + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW_BUG_PIBSLVRESET</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -111,7 +144,7 @@ <id>ATTR_CHIP_EC_FEATURE_SECURE_IOVALID_PRESENT</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Returns if a chip contains secure iovalid controls for the ABUS. True if either: + Returns if a chip contains secure iovalid controls for the ABUS. Intentionally not applied to Naples True if either: Murano EC 0x20 or greater Venice EC 0x10 or greater </description> @@ -172,6 +205,7 @@ <description> Returns if a chip contains 32 lanes of PCIE I/O. True if: Venice EC 0x10 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -181,6 +215,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -190,6 +231,7 @@ Returns if a chip contains SCOM configuration for CAPP unit PB hang recovery controls. True if: Murano EC 0x20 or greater Venice EC 0x10 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -206,6 +248,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -215,6 +264,7 @@ Returns if a chip contains production CAPP logic function Murano EC 0x20 or greater Venice EC 0x20 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -231,6 +281,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -240,6 +297,7 @@ Returns if a chip contains SCOM configuration for NX unit PB hang recovery controls. True if: Murano EC 0x20 or greater Venice EC 0x20 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -256,6 +314,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -265,6 +330,7 @@ Returns if a chip contains separate SCOM configuration for HCA oper/data hang PB hang recovrery controls. True if: Murano EC 0x20 or greater Venice EC 0x10 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -281,6 +347,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -290,6 +363,7 @@ True if: Murano EC 0x20 or greater Venice EC 0x10 or greater + Naples EC 0x10 or greater Centaur EC 0x20 or greater </description> <chipEcFeature> @@ -308,6 +382,13 @@ </ec> </chip> <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> <name>ENUM_ATTR_NAME_CENTAUR</name> <ec> <value>0x20</value> @@ -323,6 +404,7 @@ True if: Murano EC 0x20 or greater Venice EC 0x10 or greater + Naples EC 0x10 or greater Centaur EC 0x20 or greater </description> <chipEcFeature> @@ -341,6 +423,13 @@ </ec> </chip> <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> <name>ENUM_ATTR_NAME_CENTAUR</name> <ec> <value>0x20</value> @@ -356,6 +445,7 @@ True if: Murano EC 0x20 or greater Venice EC 0x10 or greater + Naples EC 0x10 or greater Centaur EC 0x20 or greater </description> <chipEcFeature> @@ -374,6 +464,13 @@ </ec> </chip> <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> <name>ENUM_ATTR_NAME_CENTAUR</name> <ec> <value>0x20</value> @@ -507,6 +604,7 @@ True if: Murano EC greater or equal to 0x20 Venice EC greater or equal to 0x20 + Naples EC greater or equal to 0x10 </description> <chipEcFeature> <chip> @@ -523,6 +621,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -532,6 +637,7 @@ True if: Murano EC greater than or equal to 0x20 Venice + Naples </description> <chipEcFeature> <chip> @@ -548,6 +654,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -583,6 +696,7 @@ True if: Murano EC greater than or equal to 0x20 Venice EC greater than or equal to 0x20 + Naples EC greater than or equal to 0x10 </description> <chipEcFeature> <chip> @@ -599,6 +713,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -608,6 +729,7 @@ Specifies layout of C8 serial chain True if: Murano/Venice EC greater than or equal to 0x20 + Naples greater than or equal to 0x10 </description> <chipEcFeature> <chip> @@ -624,6 +746,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -676,6 +805,7 @@ <description> True if: Venice EC greater than or equal to 0x20 + Naples EC greater than or equal to 0x10 False otherwise </description> <chipEcFeature> @@ -686,6 +816,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -694,6 +831,7 @@ <description> True if: Venice EC greater than or equal to 0x20 + Naples EC greater than or equal to 0x10 False otherwise </description> <chipEcFeature> @@ -704,6 +842,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -713,6 +858,7 @@ Specifies layout of C10 serial chain True if: Murano/Venice EC greater than or equal to 0x20 + Naples EC greater than or euqal to 0x10 </description> <chipEcFeature> <chip> @@ -729,6 +875,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -764,6 +917,7 @@ True if: Murano EC 0x20 or greater Venice EC 0x10 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -780,6 +934,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -830,12 +991,38 @@ </chipEcFeature> </attribute> <attribute> + <id>ATTR_CHIP_EC_FEATURE_XBUS_RESONANT_CLK_VALID</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + True if: + Venice EC 0x10 or greater + Naples EC 0x10 or greater + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> <id>ATTR_CHIP_EC_FEATURE_RESONANT_CLK_VALID</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> True if: Murano EC 0x20 or greater Venice EC 0x20 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -852,6 +1039,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -862,6 +1056,7 @@ True if: Murano EC 0x20 or greater Venice EC 0x20 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -878,6 +1073,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -904,6 +1106,7 @@ True if: Murano EC greater than or equal to 0x20 Venice + Naples </description> <chipEcFeature> <chip> @@ -920,6 +1123,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -929,6 +1139,7 @@ True if: Murano EC greater than or equal to 0x20 Venice + Naples </description> <chipEcFeature> <chip> @@ -945,6 +1156,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -971,6 +1189,7 @@ True if: Murano EC greater than 0x20 Venice EC greater than or equal to 0x20 + Naples greater than or equal to 0x10 </description> <chipEcFeature> <chip> @@ -987,6 +1206,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -1009,6 +1235,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -1050,6 +1283,7 @@ True if chip can support PBA prefetch as HW258436 is fixed Murano EC greater than or equal to 0x21 Venice EC greater than or equal to 0x20 + Naples EC greater than or equal to 0x10 </description> <chipEcFeature> <chip> @@ -1066,6 +1300,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -1075,6 +1316,7 @@ True if chip can support the enablement of L3 purge aborts during Winkle as HW276505 is fixed Not fixed on any Murano EC Venice EC 0x20 or greater + Naples EC 0x10 or greater </description> <chipEcFeature> <chip> @@ -1084,6 +1326,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <attribute> @@ -1154,6 +1403,7 @@ True if chip has HCA BAR SCOM bug Causes HCA BAR range data read via SCOM to be shifted relative to HW state Venice EC greater than or equal to 0x20 + Naples EC greater than or equal to 0x10 </description> <chipEcFeature> <chip> @@ -1163,6 +1413,29 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_NAPLES</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW_BUG_TOD_ERROR_MASK_NOT_WRITABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + HW223230/HW216879 - TOD_ERROR_MASK_STATUS_REG_00040032 is not writable in Murano DD1.x + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> </chipEcFeature> </attribute> </attributes> |