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author | Thi Tran <thi@us.ibm.com> | 2013-11-01 21:23:39 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-11-04 09:12:10 -0600 |
commit | 887dcbfca49d385574a95fa4e1890bbd654c2195 (patch) | |
tree | f763eccd775d92d774d3a1aec7d1a7e7a06f2326 /src/usr/hwpf/hwp/proc_chip_ec_feature.xml | |
parent | faaf17312bbc7bc7ca7cecc7c56d5cccc29e28fe (diff) | |
download | talos-hostboot-887dcbfca49d385574a95fa4e1890bbd654c2195.tar.gz talos-hostboot-887dcbfca49d385574a95fa4e1890bbd654c2195.zip |
INITPROC: Hostboot - FW612231 Watchdog msg
Change-Id: I34dba93de4a77e26616bc3a4367ffdfeabbd28c9
CMVC-Prereq:FW612231
CQ:FW612231
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7006
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/proc_chip_ec_feature.xml')
-rw-r--r-- | src/usr/hwpf/hwp/proc_chip_ec_feature.xml | 171 |
1 files changed, 166 insertions, 5 deletions
diff --git a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml index 08b9a9a70..73290df8f 100644 --- a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml +++ b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml @@ -20,7 +20,7 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_chip_ec_feature.xml,v 1.29 2013/10/11 14:34:44 thi Exp $ --> +<!-- $Id: proc_chip_ec_feature.xml,v 1.37 2013/10/31 16:02:44 jmcgill Exp $ --> <!-- Defines the attributes that are based on EC level --> <attributes> <attribute> @@ -169,7 +169,7 @@ <id>ATTR_CHIP_EC_FEATURE_CAPP_HANG_CONTROL_ON_SCOM</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Returns if a chip contains SCOM configuration for CAPP unit PB hang recovrery controls. True if: + Returns if a chip contains SCOM configuration for CAPP unit PB hang recovery controls. True if: Murano EC 0x20 or greater Venice EC 0x10 or greater </description> @@ -191,10 +191,35 @@ </chipEcFeature> </attribute> <attribute> + <id>ATTR_CHIP_EC_FEATURE_CAPP_PROD</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Returns if a chip contains production CAPP logic function + Murano EC 0x20 or greater + Venice EC 0x20 or greater + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> <id>ATTR_CHIP_EC_FEATURE_NX_HANG_CONTROL_ON_SCOM</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Returns if a chip contains SCOM configuration for NX unit PB hang recovrery controls. True if: + Returns if a chip contains SCOM configuration for NX unit PB hang recovery controls. True if: Murano EC 0x20 or greater Venice EC 0x20 or greater </description> @@ -377,7 +402,7 @@ <id>ATTR_CHIP_EC_FEATURE_ADU_PBINIT_LAUNCH_BUG</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - True if: + True if: Murano EC less than 0x20 Venice EC less than 0x20 </description> @@ -474,9 +499,10 @@ </chipEcFeature> </attribute> <attribute> - <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_CENT5_VER2</id> + <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_WE5_VER2</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> + Specifies layout of WE5 serial chain True if: Murano EC greater than or equal to 0x20 Venice EC greater than or equal to 0x20 @@ -499,6 +525,74 @@ </chipEcFeature> </attribute> <attribute> + <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_C8_VER3</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Specifies layout of C8 serial chain + True if: + Murano/Venice EC greater than or equal to 0x20 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_C8_VER2</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Specifies layout of C8 serial chain + True if: + Venice EC equal to 0x10 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x10</value> + <test>EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_FBC_SERIAL_SCOM_C10_VER2</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Specifies layout of C10 serial chain + True if: + Murano/Venice EC greater than or equal to 0x20 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> <id>ATTR_CHIP_EC_FEATURE_MCD_HANG_RECOVERY_BUG</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -672,4 +766,71 @@ </chip> </chipEcFeature> </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_OCC_CE_FIR_DISABLE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + True if: + Murano EC less than 0x20 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_ENABLE_IVE_PERFORMANCE_ORDERING</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + True if: + Murano EC greater than or equal to 0x20 + Venice + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_ENABLE_PCI_DMAR_OOO</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + True if: + Murano EC greater than or equal to 0x20 + Venice + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_MURANO</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_VENICE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> </attributes> |