Matching Tagged versions for memory HWPs

Change-Id: Icb9c98d71237e6c53b1a9a8af4fac0c95eced58b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2911
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

7 files changed, 1778 insertions, 693 deletions

diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C
index c7407f789..e754d482c 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,8 +20,9 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_bulk_pwr_throttles.C,v 1.10 2012/11/13 16:45:28 bellows Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_bulk_pwr_throttles.C,v $
+// $Id: mss_bulk_pwr_throttles.C,v 1.11 2012/12/12 20:10:41 pardeik Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/
+//          centaur/working/procedures/ipl/fapi/mss_bulk_pwr_throttles.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -36,20 +37,28 @@
 // applicable CQ component memory_screen
 //
 // DESCRIPTION:
-// The purpose of this procedure is to set the throttle attributes based on a power limit for the dimms on the channel pair
-// At the end, output attributes will be updated with throttle values that will have dimms at or below the limit
+// The purpose of this procedure is to set the throttle attributes based on a
+// power limit for the dimms on the channel pair
+// At the end, output attributes will be updated with throttle values that will
+// have dimms at or below the limit
 // NOTE:  ISDIMMs and CDIMMs are handled differently
 //   ISDIMMs use a power per DIMM for the thermal power limit from the MRW
-//   CDIMM will use power per CDIMM (power for all virtual dimms) for the thermal power limit from the MRW
-// Plan is to have ISDIMM use the per-slot throttles (thermal throttles) or per-mba throttles (power throttles), and CDIMM to use the per-chip throttles
-// Note that throttle_n_per_mba takes on different meanings depending on how cfg_nm_per_slot_enabled is set
+//   CDIMM will use power per CDIMM (power for all virtual dimms) for the
+//    thermal power limit from the MRW
+// Plan is to have ISDIMM use the per-slot throttles (thermal throttles) or
+//  per-mba throttles (power throttles), and CDIMM to use the per-chip throttles
+// Note that throttle_n_per_mba takes on different meanings depending on how
+// cfg_nm_per_slot_enabled is set
 //   Can be slot0/slot1 OR slot0/MBA throttling
-// Note that  throttle_n_per_chip takes on different meaning depending on how cfg_count_other_mba_dis is set
+// Note that throttle_n_per_chip takes on different meaning depending on how
+// cfg_count_other_mba_dis is set
 //  Can be per-chip OR per-mba throttling
-// ISDIMM:  These registers need to be setup to these values, will be able to do per slot or per MBA throttling
+// ISDIMM:  These registers need to be setup to these values, will be able to
+//  do per slot or per MBA throttling
 //   cfg_nm_per_slot_enabled = 1
 //   cfg_count_other_mba_dis = 1
-// CDIMM:  These registers need to be setup to these values, will be able to do per slot or per chip throttling
+// CDIMM:  These registers need to be setup to these values, will be able to
+//  do per slot or per chip throttling
 //   cfg_nm_per_slot_enabled = 1
 //   cfg_count_other_mba_dis = 0
 //
@@ -61,17 +70,36 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
-//   1.10   | pardeik  |08-NOV-12| attribute name update for runtime per chip throttles
-//   1.9   | pardeik  |25-OCT-12| updated FAPI_ERR sections, use per_chip variables (in if statements) in the throttle update section when channel pair power is greater than the limit, added CQ component comment line
-//   1.8   | pardeik  |19-OCT-12| Changed throttle_n_per_chip to be based on num_mba_with_dimms
-//         | pardeik  |19-OCT-12| Updated default throttle values to represent cmd bus utilization instead of dram bus utilization
-//         | pardeik  |19-OCT-12| multiple throttle N values by 4 to get dram utilization
-//   1.7   | pardeik  |10-OCT-12| Changed throttle attributes and call new function (mss_throttle_to_power) to calculate the power
+//   1.11  | pardeik  |04-DEC-12| update lines to have a max width of 80 chars
+//         |          |         | added FAPI_ERR before return code lines
+//         |          |         | made trace statements for procedure FAPI_IMP
+//         |          |         | updates for FAPI_SET_HWP_ERROR
+//   1.10  | pardeik  |08-NOV-12| attribute name update for runtime per chip
+//         |          |         | throttles
+//   1.9   | pardeik  |25-OCT-12| updated FAPI_ERR sections, use per_chip
+//         |          |         | variables (in if statements) in the throttle
+//         |          |         | update section when channel pair power is
+//         |          |         | greater than the limit, added CQ component
+//         |          |         | comment line
+//   1.8   | pardeik  |19-OCT-12| Changed throttle_n_per_chip to be based on
+//         |          |         | num_mba_with_dimms
+//         | pardeik  |19-OCT-12| Updated default throttle values to represent
+//         |          |         | cmd bus utilization instead of dram bus
+//         |          |         | utilization
+//         | pardeik  |19-OCT-12| multiple throttle N values by 4 to get dram
+//         |          |         | utilization
+//   1.7   | pardeik  |10-OCT-12| Changed throttle attributes and call new
+//         |          |         | function (mss_throttle_to_power) to calculate
+//         |          |         | the power
 //   1.6   | pardeik  |10-APR-12| power calculation fixes and updates
-//   1.5   | pardeik  |04-APR-12| moved cdimm power calculation to end of section instead of having it in multiple places
-//   1.4   | pardeik  |04-APR-12| do channel throttle denominator check as zero only if there are ranks present
-//         | pardeik  |04-APR-12| use else if instead of if after checking throttle denominator to zero
-//   1.3   | pardeik  |03-APR-12| added cdimm power calculation for half of cdimm, changed i_target from mbs to mba
+//   1.5   | pardeik  |04-APR-12| moved cdimm power calculation to end of
+//         |          |         |section instead of having it in multiple places
+//   1.4   | pardeik  |04-APR-12| do channel throttle denominator check as zero
+//         |          |         |only if there are ranks present
+//         | pardeik  |04-APR-12| use else if instead of if after checking
+//         |          |         | throttle denominator to zero
+//   1.3   | pardeik  |03-APR-12| added cdimm power calculation for half of
+//         |          |         |cdimm, changed i_target from mbs to mba
 //   1.2   | pardeik  |03-APR-12| call mss_eff_config_thermal directly
 //   1.1   | pardeik  |28-MAR-12| Updated to use Attributes
 //         | pardeik  |11-NOV-11| First Draft.
@@ -101,9 +129,10 @@ extern "C" {
 
 
 //------------------------------------------------------------------------------
-// @brief mss_bulk_pwr_throttles(): This function determines the throttle values from a MBA channel pair power limit
+// @brief mss_bulk_pwr_throttles(): This function determines the throttle values
+// from a MBA channel pair power limit
 //
-// @param    const fapi::Target & i_target_mba:  MBA Target passed in
+// @param[in]	const fapi::Target & i_target_mba:  MBA Target passed in
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
@@ -114,7 +143,7 @@ extern "C" {
 
 	char procedure_name[32];
 	sprintf(procedure_name, "mss_bulk_pwr_throttles");
-	FAPI_INF("*** Running %s ***", procedure_name);
+	FAPI_IMP("*** Running %s ***", procedure_name);
 
 	enum
 	{
@@ -125,14 +154,22 @@ extern "C" {
 	};
 
 // other variables used in this procedure
-	const uint8_t MAX_NUM_PORTS = 2;			// number of ports per MBA
-	const uint8_t MAX_NUM_DIMMS = 2;			// number of dimms per MBA port
-	const float MIN_UTIL = 1;				// Minimum percent data bus utilization (percent of max) allowed (for floor)
-// If this is changed, also change mss_throttle_to_power MAX_UTIL
-	const float MAX_UTIL = 75;				// Maximum theoretical data bus utilization (percent of max) (for ceiling)
-	const uint32_t MEM_THROTTLE_D_DEFAULT = 512;		// default throttle denominator (unthrottled) for cfg_nm_m
-	const uint32_t MEM_THROTTLE_N_DEFAULT_PER_MBA = (int)(MEM_THROTTLE_D_DEFAULT * (MAX_UTIL / 100) / 4);		// default throttle numerator (unthrottled) for cfg_nm_n_per_mba
-	const uint32_t MEM_THROTTLE_N_DEFAULT_PER_CHIP = (int)(MEM_THROTTLE_D_DEFAULT * (MAX_UTIL / 100) / 4);	// default throttle numerator (unthrottled) for cfg_nm_n_per_chip
+	const uint8_t MAX_NUM_PORTS = 2;
+	const uint8_t MAX_NUM_DIMMS = 2;
+// min utilization (percent of max) allowed for floor
+	const float MIN_UTIL = 1;
+// max utilization (percent of max) allowed for ceiling
+// If MAX_UTIL is changed, also change mss_throttle_to_power MAX_UTIL
+	const float MAX_UTIL = 75;
+// cfg_nm_m default
+	const uint32_t MEM_THROTTLE_D_DEFAULT = 512;
+// cfg_nm_n_per_mba default
+	const uint32_t MEM_THROTTLE_N_DEFAULT_PER_MBA =
+	  (int)(MEM_THROTTLE_D_DEFAULT * (MAX_UTIL / 100) / 4);
+//cfg_nm_n_per_chip default
+	const uint32_t MEM_THROTTLE_N_DEFAULT_PER_CHIP =
+	  (int)(MEM_THROTTLE_D_DEFAULT * (MAX_UTIL / 100) / 4);
+
 	fapi::Target target_chip;
 	std::vector<fapi::Target> target_mba_array;
 	std::vector<fapi::Target> target_dimm_array;
@@ -153,33 +190,70 @@ extern "C" {
 
 // Get input attributes
 	rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &i_target_mba, dimm_type);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_WATT_TARGET, &i_target_mba, channel_pair_watt_target);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DIMM_TYPE");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_WATT_TARGET,
+			   &i_target_mba, channel_pair_watt_target);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_MEM_WATT_TARGET");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_MSS_POWER_INT, &i_target_mba, power_int_array);
-	if(rc) return rc;
-// runtime throttles will be the thermal throttle values (or zero if not initialized yet)
-	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, throttle_n_per_mba);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, throttle_n_per_chip);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR, &i_target_mba, throttle_d);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_POWER_INT");
+	    return rc;
+	}
+// runtime throttles will be the thermal throttle values (or zero if not
+// initialized yet)
+	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			   &i_target_mba, throttle_n_per_mba);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			   &i_target_mba, throttle_n_per_chip);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR,
+			   &i_target_mba, throttle_d);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR");
+	    return rc;
+	}
 
 // get number of mba's with dimms for a CDIMM
 	if (dimm_type == CDIMM)
 	{
 // Get Centaur target for the given MBA
 	    rc = fapiGetParentChip(i_target_mba, target_chip);
-	    if(rc) return rc;
+	    if (rc) {
+		FAPI_ERR("Error calling fapiGetParentChip");
+		return rc;
+	    }
 // Get MBA targets from the parent chip centaur
-	    rc = fapiGetChildChiplets(target_chip, fapi::TARGET_TYPE_MBA_CHIPLET, target_mba_array, fapi::TARGET_STATE_PRESENT);
-	    if(rc) return rc;
+	    rc = fapiGetChildChiplets(target_chip,
+				      fapi::TARGET_TYPE_MBA_CHIPLET,
+				      target_mba_array,
+				      fapi::TARGET_STATE_PRESENT);
+	    if (rc) {
+		FAPI_ERR("Error calling fapiGetChildChiplets");
+		return rc;
+	    }
 	    num_mba_with_dimms = 0;
 	    for (mba_index=0; mba_index < target_mba_array.size(); mba_index++)
 	    {
-		rc = fapiGetAssociatedDimms(target_mba_array[mba_index], target_dimm_array, fapi::TARGET_STATE_PRESENT);
-		if(rc) return rc;
+		rc = fapiGetAssociatedDimms(target_mba_array[mba_index],
+					    target_dimm_array,
+					    fapi::TARGET_STATE_PRESENT);
+		if (rc) {
+		    FAPI_ERR("Error calling fapiGetAssociatedDimms");
+		    return rc;
+		}
 		if (target_dimm_array.size() > 0)
 		{
 		    num_mba_with_dimms++;
@@ -189,56 +263,77 @@ extern "C" {
 	}
 	else
 	{
-	    // ISDIMMs, set to a value of one since they are handled on a per MBA basis
+// ISDIMMs, set to a value of one since they are handled on a per MBA basis
 	    num_mba_with_dimms = 1;
 	}
 
-///////////////////////////////
+//------------------------------------------------------------------------------
 // THROTTLE SECTION
-///////////////////////////////
+//------------------------------------------------------------------------------
 
-// Determine if the channel pair power for this MBA is over the limit when the runtime memory throttle settings are used
-// If not over the limit, then use the runtime throttle settings (defined in mss_eff_config_thermal)
+// Determine if the channel pair power for this MBA is over the limit when the
+// runtime memory throttle settings are used
+// If not over the limit, then use the runtime throttle settings (defined in
+// mss_eff_config_thermal)
 // If over limit, then increase throttle value until it is at or below limit
 // If unable to get power below limit, then call out an error
 
-// Determine whether to base throttles on thermal or power reasons (power throttles can give you better performance than thermal throttles)
-	if ((throttle_n_per_mba == 0) && (throttle_n_per_chip == 0) && (throttle_d == 0))
+// Determine whether to base throttles on thermal or power reasons (power
+// throttles can give you better performance than thermal throttles)
+	if (
+	    (throttle_n_per_mba == 0) &&
+	    (throttle_n_per_chip == 0) &&
+	    (throttle_d == 0)
+	    )
 	{
-    // runtime throttles are all zero here, they have not been defined yet and need to be
+// runtime throttles are all zero here, they have not been defined yet and need
+// to be
 	    thermal_throttle_active = true;
-    // Set runtime throttles to default values as a starting value
+// Set runtime throttles to default values as a starting value
 	    throttle_n_per_mba = MEM_THROTTLE_N_DEFAULT_PER_MBA;
-	    throttle_n_per_chip = MEM_THROTTLE_N_DEFAULT_PER_CHIP * num_mba_with_dimms;
+	    throttle_n_per_chip = MEM_THROTTLE_N_DEFAULT_PER_CHIP *
+	      num_mba_with_dimms;
 	    throttle_d = MEM_THROTTLE_D_DEFAULT;
 	}
-	else if ((throttle_n_per_mba != MEM_THROTTLE_N_DEFAULT_PER_MBA) || (throttle_n_per_chip != (MEM_THROTTLE_N_DEFAULT_PER_CHIP * num_mba_with_dimms)) || (throttle_d != MEM_THROTTLE_D_DEFAULT))
+	else if (
+		 (throttle_n_per_mba != MEM_THROTTLE_N_DEFAULT_PER_MBA) ||
+		 (throttle_n_per_chip !=
+		  (MEM_THROTTLE_N_DEFAULT_PER_CHIP * num_mba_with_dimms)) ||
+		 (throttle_d != MEM_THROTTLE_D_DEFAULT)
+		 )
 	{
-    // if runtime throttles are not equal to the default values, then thermal throttles are in place
+// if runtime throttles are not equal to the default values, then thermal
+// throttles are in place
 	    thermal_throttle_active = true;
 	}
 	else
 	{
-    // runtime throttles are not all zero and equal to the defaults, so no thermal throttles are in place - so now any throttles will be power based
+// runtime throttles are not all zero and equal to the defaults, so no thermal
+// throttles are in place - so now any throttles will be power based
 	    thermal_throttle_active = false;
 	}
-
 // Adjust power limit value as needed here
-// For CDIMM, we want the throttles to be per-chip, and to allow all commands to go to one MBA to get to the power limit
+// For CDIMM, we want the throttles to be per-chip, and to allow all commands to
+// go to one MBA to get to the power limit
 	if (dimm_type == CDIMM)
 	{
-// Set channel pair power limit to whole CDIMM power limit (multiply by number of MBAs used) and subtract off idle power for dimms on other MBA
-	    channel_pair_watt_target = channel_pair_watt_target * num_mba_with_dimms;
+// Set channel pair power limit to whole CDIMM power limit (multiply by number
+// of MBAs used) and subtract off idle power for dimms on other MBA
+	    channel_pair_watt_target = channel_pair_watt_target *
+	      num_mba_with_dimms;
 	    for (port=0; port < MAX_NUM_PORTS; port++)
 	    {
 		for (dimm=0; dimm < MAX_NUM_DIMMS; dimm++)
 		{
-		    channel_pair_watt_target = channel_pair_watt_target - ((num_mba_with_dimms - 1) * (power_int_array[port][dimm]));
+		    channel_pair_watt_target = channel_pair_watt_target -
+		      ((num_mba_with_dimms - 1) *
+		       (power_int_array[port][dimm]));
 		}
 	    }
 	}
 
-// calculate power and change throttle values in this while loop until limit has been satisfied or throttles have reached the minimum limit
+// calculate power and change throttle values in this while loop until limit has
+// been satisfied or throttles have reached the minimum limit
 	not_enough_available_power = false;
 	channel_pair_throttle_done = false;
 	while (channel_pair_throttle_done == false)
@@ -250,44 +345,92 @@ extern "C" {
 					    throttle_d,
 					    channel_pair_power
 					    );
-	    if(rc)
+	    if (rc)
 	    {
 		FAPI_ERR("Error (0x%x) calling mss_throttle_to_power_calc", static_cast<uint32_t>(rc));
 		return rc;
 	    }
 
-// compare channel pair power to mss_watt_target for channel and decrease throttles if it is above this limit
-// throttle decrease will decrement throttle numerator by one (or increase throttle denominator) and recalculate power until utilization (N/M) reaches a lower limit
+// compare channel pair power to mss_watt_target for channel and decrease
+// throttles if it is above this limit
+// throttle decrease will decrement throttle numerator by one (or increase
+// throttle denominator) and recalculate power until utilization (N/M) reaches a
+// lower limit
 
 	    if (channel_pair_power > channel_pair_watt_target)
 	    {
-// check to see if dimm utilization is greater than the min utilization limit, continue if it is, error if it is not
-		if ((((((float)throttle_n_per_chip * 100 * 4) / throttle_d) > MIN_UTIL) && (dimm_type != CDIMM) && (thermal_throttle_active == false)) || (((((float)throttle_n_per_chip * 100 * 4) / throttle_d) > MIN_UTIL) && (dimm_type != CDIMM) && (thermal_throttle_active == true)) || (((((float)throttle_n_per_chip * 100 * 4) / throttle_d) > MIN_UTIL) && (dimm_type == CDIMM)))
+// check to see if dimm utilization is greater than the min utilization limit,
+// continue if it is, error if it is not
+		if (
+		    (
+		     ((((float)throttle_n_per_chip * 100 * 4) / throttle_d) >
+		      MIN_UTIL) &&
+		     (dimm_type != CDIMM) &&
+		     (thermal_throttle_active == false)
+		     )
+		    ||
+		    (
+		     ((((float)throttle_n_per_chip * 100 * 4) / throttle_d) >
+		      MIN_UTIL) &&
+		     (dimm_type != CDIMM) &&
+		     (thermal_throttle_active == true)
+		     )
+		    ||
+		    (
+		     ((((float)throttle_n_per_chip * 100 * 4) / throttle_d) >
+		      MIN_UTIL) &&
+		     (dimm_type == CDIMM)
+		     )
+		    )
 		{
-		    if (((throttle_n_per_chip > 1) && (dimm_type != CDIMM) && (thermal_throttle_active == false)) || ((throttle_n_per_chip > 1) && (dimm_type != CDIMM) && (thermal_throttle_active == true)) || ((throttle_n_per_chip > 1) && (dimm_type == CDIMM)))
+		    if (
+			(
+			 (throttle_n_per_chip > 1) &&
+			 (dimm_type != CDIMM) &&
+			 (thermal_throttle_active == false)
+			 )
+			||
+			(
+			 (throttle_n_per_chip > 1) &&
+			 (dimm_type != CDIMM) &&
+			 (thermal_throttle_active == true)
+			 )
+			||
+			(
+			 (throttle_n_per_chip > 1) &&
+			 (dimm_type == CDIMM)
+			 )
+			)
 		    {
 			if (dimm_type == CDIMM)
 			{
-			    // CDIMMs, use per chip throttling for any thermal or available power limits
+// CDIMMs, use per chip throttling for any thermal or available power limits
 			    throttle_n_per_chip--;
 			}
 			else
 			{
-			    // ISDIMMs, use per slot throttling for thermal power limits
+// ISDIMMs, use per slot throttling for thermal power limits
 			    if (thermal_throttle_active == true)
 			    {
-// per_mba throttling (ie.  per dimm for ISDIMMs) will limit performance if all traffic is sent to one dimm, so use the per_chip
-// This works as long as the other dimm is providing termination (for 2 dimms per channel)
-//    If the other dimm is not providing termination, then we would want to redefine the power curve in mss_eff_config_thermal and use the per_mba throttle here
-// It there is only one dimm on channel, then it will provide its own termination and the per_mba and per_chip will effectively do the same throttling (ie.  doesn't matter which one we do in this case)
-// Warning:  If this changes, then the two if statements above need to be modified
-//				throttle_n_per_mba--;
+// per_mba throttling (ie.  per dimm for ISDIMMs) will limit performance if all
+// traffic is sent to one dimm, so use the per_chip
+// This works as long as the other dimm is providing termination (for 2 dimms
+// per channel)
+//    If the other dimm is not providing termination, then we would want to
+//    redefine the power curve in mss_eff_config_thermal and use the per_mba
+//    throttle here
+// It there is only one dimm on channel, then it will provide its own
+// termination and the per_mba and per_chip will effectively do the same
+// throttling (ie.  doesn't matter which one we do in this case)
+// Warning:  If this changes, then the two if statements above need to be
+// modified
 				throttle_n_per_chip--;
 			    }
 			    else
 			    {
-				// ISDIMMs, use per mba throttling for available power limit
-// Warning:  If this changes, then the two if statements above need to be modified
+// ISDIMMs, use per mba throttling for available power limit
+// Warning:  If this changes, then the two if statements above need to be
+// modified
 				throttle_n_per_chip--;
 			    }
 			}
@@ -317,27 +460,47 @@ extern "C" {
 
 	FAPI_DBG("Final Throttle Settings [N_per_mba/N_per_chip/M %d/%d/%d]", throttle_n_per_mba, throttle_n_per_chip, throttle_d);
 
-
+//------------------------------------------------------------------------------
 // update output attributes
-	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, throttle_n_per_mba);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, throttle_n_per_chip);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR, &i_target_mba, throttle_d);
-	if(rc) return rc;
+	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			   &i_target_mba, throttle_n_per_mba);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			   &i_target_mba, throttle_n_per_chip);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR,
+			   &i_target_mba, throttle_d);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_MEM_THROTTLE_DENOMINATOR");
+	    return rc;
+	}
 
 	if (not_enough_available_power == true)
 	{
 	    FAPI_ERR("Not enough available memory power [Channel Pair Power %4.2f/%d cW]", channel_pair_power, channel_pair_watt_target);
+// Log an error against firmware (power subsystem does not have enough power
+// for all the hardware, or power allocation values in firmware are off).  Do
+// not deconfigure or gard.
+	    const fapi::Target & MEM_CHIP = i_target_mba;
+	    uint32_t FFDC_DATA_1 = (int)channel_pair_power;
+	    uint32_t FFDC_DATA_2 = channel_pair_watt_target;
+	    uint32_t FFDC_DATA_3 = throttle_n_per_mba;
+	    uint32_t FFDC_DATA_4 = throttle_n_per_chip;
+	    uint32_t FFDC_DATA_5 = throttle_d;
 	    FAPI_SET_HWP_ERROR(rc, RC_MSS_NOT_ENOUGH_AVAILABLE_DIMM_POWER);
 	    if (rc) fapiLogError(rc);
 	}
-	FAPI_INF("*** %s COMPLETE ***", procedure_name);
-	return rc;
 
+	FAPI_IMP("*** %s COMPLETE ***", procedure_name);
+	return rc;
     }
 
-
 } //end extern C
 
 
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.H b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.H
index 2b86242c8..a97daff05 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.H
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,8 +20,9 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_bulk_pwr_throttles.H,v 1.3 2012/10/15 13:05:17 pardeik Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_bulk_pwr_throttles.H,v $
+// $Id: mss_bulk_pwr_throttles.H,v 1.4 2012/12/12 20:10:44 pardeik Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/
+//          centaur/working/procedures/ipl/fapi/mss_bulk_pwr_throttles.H,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -42,31 +43,36 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//   1.4   | pardeik  |04-DEC-12| update lines to have a max width of 80 chars
+//         |          |         | removed variable names in typedef
 //   1.3   | pardeik  |11-OCT-12| change i_target to i_target_mba
 //   1.2   | pardeik  |03-APR-12| use mba target intead of mbs
 //   1.1   | pardeik  |11-NOV-11| First Draft.
 
 
-
 #ifndef MSS_BULK_PWR_THROTTLES_H_
 #define MSS_BULK_PWR_THROTTLES_H_
 
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 //  Includes
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 #include <fapi.H>
 
-typedef fapi::ReturnCode (*mss_bulk_pwr_throttles_FP_t)(const fapi::Target & i_target_mba);
+typedef fapi::ReturnCode (*mss_bulk_pwr_throttles_FP_t)
+(
+ const fapi::Target &
+ );
 
 extern "C"
 {
-/**
- * @brief mss_bulk_pwr_throttles procedure. Set dimm and channel throttle attributes based on available centaur mba port power
- *
- * @param[in]  i_target_mba  Reference to centaur mba target
- *
- * @return ReturnCode
- */
+//------------------------------------------------------------------------------
+// @brief mss_bulk_pwr_throttles procedure. Set dimm and channel
+// throttle attributes based on available centaur mba port power
+//
+// @param[in]  i_target_mba  Reference to centaur mba target
+//
+// @return ReturnCode
+//------------------------------------------------------------------------------
 
     fapi::ReturnCode mss_bulk_pwr_throttles(const fapi::Target & i_target_mba);
 
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_termination.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_termination.C
index 946da5294..616c9388b 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_termination.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_termination.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_eff_config_termination.C,v 1.8 2012/12/06 13:45:57 bellows Exp $
+// $Id: mss_eff_config_termination.C,v 1.11 2012/12/23 02:29:44 asaetow Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_eff_config_termination.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
@@ -42,7 +42,13 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
-//   1.9   |          |         |
+//   1.12  |          |         |
+//   1.11  | asaetow  |22-DEC-12| Added CDIMM workaround for EC10 ADR Centerlane race condition, subtract 32ticks.
+//         |          |         | NOTE: Need EC check for Centaur EC10 ADR Centerlane NWELL workaround.
+//   1.10  | asaetow  |22-DEC-12| Added Centaur EC10 ADR Centerlane PR=0x7F workaround for NWELL LVS issue.
+//         |          |         | NOTE: Need EC check for Centaur EC10 ADR Centerlane NWELL workaround.
+//         |          |         | Fixed (l_attr_is_simulation || 1) to (l_attr_is_simulation != 0) from v1.8 and v1.9.
+//   1.9   | bellows  |12-DEC-12| Changed phase rotators for sim to 0x40 for clocks
 //   1.8   | bellows  |06-DEC-12| Added sim leg for rotator values
 //   1.7   | asaetow  |18-NOV-12| Changed ATTR_MSS_CAL_STEP_ENABLE from 0x7F back to 0xFF. 
 //   1.6   | asaetow  |17-NOV-12| Fixed ATTR_EFF_ODT_WR for 4R RDIMMs.
@@ -892,6 +898,35 @@ fapi::ReturnCode mss_eff_config_termination(const fapi::Target i_target_mba) {
    for( int l_port = 0; l_port < PORT_SIZE; l_port += 1 ) {
       for( int l_pr_type_index = 0; l_pr_type_index < PR_TYPE_SIZE; l_pr_type_index += 1 ) {
          l_attr_eff_cen_phase_rot[l_pr_type_index][l_port] = PR_VALUE_U8ARRAY[l_port][l_pr_type_index][l_topo_index];
+         // AST HERE: Need EC check here for Centaur EC10 ADR Centerlane NWELL LVS issue PR=0x7F workaround.
+         if ((((l_target_mba_pos == 0) && (l_port == 0) && (l_pr_type_index == 16)) ||   // MA_CMD_A<12>
+              ((l_target_mba_pos == 0) && (l_port == 0) && (l_pr_type_index ==  4)) ||   // MA_CMS_A<0>
+              ((l_target_mba_pos == 0) && (l_port == 0) && (l_pr_type_index == 17)) ||   // MA_CMD_A<13>
+              ((l_target_mba_pos == 0) && (l_port == 0) && (l_pr_type_index == 20)) ||   // MA_CMD_BA<0>
+              ((l_target_mba_pos == 0) && (l_port == 1) && (l_pr_type_index == 34)) ||   // MB0_CNTL_CSN<2>
+              ((l_target_mba_pos == 0) && (l_port == 1) && (l_pr_type_index == 36)) ||   // MB0_CNTL_ODT<0>
+              ((l_target_mba_pos == 0) && (l_port == 1) && (l_pr_type_index == 15)) ||   // MB_CMD_A<11>
+              ((l_target_mba_pos == 0) && (l_port == 1) && (l_pr_type_index == 28)) ||   // MB0_CNTL_CKE<0>
+              ((l_target_mba_pos == 1) && (l_port == 0) && (l_pr_type_index ==  5)) ||   // MC_CMD_A<1>
+              ((l_target_mba_pos == 1) && (l_port == 0) && (l_pr_type_index == 10)) ||   // MC_CMD_A<6>
+              ((l_target_mba_pos == 1) && (l_port == 0) && (l_pr_type_index == 26)) ||   // MC_CMD_PAR
+              ((l_target_mba_pos == 1) && (l_port == 0) && (l_pr_type_index == 47)) ||   // MC1_CNTL_ODT<1>
+              ((l_target_mba_pos == 1) && (l_port == 1) && (l_pr_type_index == 32)) ||   // MD0_CNTL_CSN<0>
+              ((l_target_mba_pos == 1) && (l_port == 1) && (l_pr_type_index == 14)) ||   // MD_CMD_A<10>
+              ((l_target_mba_pos == 1) && (l_port == 1) && (l_pr_type_index == 44)) ||   // MD1_CNTL_CSN<2>
+              ((l_target_mba_pos == 1) && (l_port == 1) && (l_pr_type_index == 36))) &&  // MD0_CNTL_ODT<0>
+            (l_attr_is_simulation == 0)) {
+            FAPI_INF("WARNING: Centaur EC10 ADR Centerlane PR=0x7F workaround for NWELL LVS issue on CmdLaneIndex %d Port %d %s!", l_pr_type_index, l_port, i_target_mba.toEcmdString());
+            l_attr_eff_cen_phase_rot[l_pr_type_index][l_port] = 0x7F;
+         } else {
+            if (l_dimm_type_u8 == fapi::ENUM_ATTR_EFF_DIMM_TYPE_CDIMM) {
+               if ((l_attr_eff_cen_phase_rot[l_pr_type_index][l_port] - 32) >= 0) {
+                  l_attr_eff_cen_phase_rot[l_pr_type_index][l_port] = l_attr_eff_cen_phase_rot[l_pr_type_index][l_port] - 32;
+               } else {
+                  l_attr_eff_cen_phase_rot[l_pr_type_index][l_port] = 0;
+               }
+            }
+         }
       }
    }
 
@@ -920,14 +955,14 @@ fapi::ReturnCode mss_eff_config_termination(const fapi::Target i_target_mba) {
    rc = FAPI_ATTR_SET(ATTR_EFF_ODT_RD, &i_target_mba, l_attr_eff_odt_rd); if(rc) return rc;
    rc = FAPI_ATTR_SET(ATTR_EFF_ODT_WR, &i_target_mba, l_attr_eff_odt_wr); if(rc) return rc;
 
-   if(l_attr_is_simulation || 1) {
+   if(l_attr_is_simulation != 0) {
      FAPI_INF("In Sim Detected %s on %s value is %d", PROCEDURE_NAME, i_target_mba.toEcmdString(), l_attr_is_simulation);
 
      for(int i=0;i<2;i++) {
-       l_attr_eff_cen_phase_rot[0][i]=0;
-       l_attr_eff_cen_phase_rot[1][i]=0;
-       l_attr_eff_cen_phase_rot[2][i]=0;
-       l_attr_eff_cen_phase_rot[3][i]=0;
+       l_attr_eff_cen_phase_rot[0][i]=0x40;
+       l_attr_eff_cen_phase_rot[1][i]=0x40;
+       l_attr_eff_cen_phase_rot[2][i]=0x40;
+       l_attr_eff_cen_phase_rot[3][i]=0x40;
        l_attr_eff_cen_phase_rot[4][i]=0;
        l_attr_eff_cen_phase_rot[5][i]=0;
        l_attr_eff_cen_phase_rot[6][i]=0;
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C
index 30a69e334..fe3123344 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,8 +20,9 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_eff_config_thermal.C,v 1.13 2012/11/28 21:33:11 pardeik Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_eff_config_thermal.C,v $
+// $Id: mss_eff_config_thermal.C,v 1.14 2012/12/12 20:10:33 pardeik Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/
+//          centaur/working/procedures/ipl/fapi/mss_eff_config_thermal.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -36,11 +37,12 @@
 // applicable CQ component memory_screen
 //
 // DESCRIPTION:
-// The purpose of this procedure is to set the default throttle and power attributes for dimms in a given system
-// -- The power attributes are the slope/intercept values.  Note that these values are in cW.
-// -- The power values are determined by DRAM Generation and Width (with various uplifts/adders applied)
-//	-- Power will be per rank for a given dram generation and width
-//	-- Uplifts will be applied for dimm type, number of ranks
+// The purpose of this procedure is to set the default throttle and power
+// attributes for dimms in a given system
+// -- The power attributes are the slope/intercept values.  Note that these
+//    values are in cW.
+//    -- ISDIMM will calculate values based on various attributes
+//    -- CDIMM will get values from VPD
 // -- The throttle attributes will setup values for safemode and runtime
 //
 //
@@ -51,19 +53,42 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//   1.14  | pardeik  |03-DEC-12| update lines to have a max width of 80 chars
+//         |          |         | added FAPI_ERR before return code lines
+//         |          |         | made trace statements for procedures FAPI_IMP
+//         |          |         | changed some FAPI_INF to FAPI_DBG
+//         |          |         | set per_chip safemode throttles to 32
+//         |          |         | updates for FAPI_SET_HWP_ERROR
 //   1.13  | pardeik  |28-NOV-12| fixed hostboot compile errors
-//   1.12  | pardeik  |07-NOV-12| updated to use new SI attributes and their enums
-//   1.11  | pardeik  |22-OCT-12| Use the schmoo attributes to find wc termination, updated hwp errors, removed unneeded variables, added CQ component comment line, updated safemode throttle default values
-//   1.10  | pardeik  |19-OCT-12| Enable TYPE_1D for ODT mapping.  Set ISDIMM supplier power curve to master power curve
-//   1.9   | pardeik  |11-OCT-12| updated to use new attributes, termination power calculation added in
-//   1.8   | pardeik  |13-JUN-12| Major rewrite to have dimm power determined by dram generation and width, with uplifts applied (not based on dimm size lookup table any longer)
-//   1.7   | pardeik  |04-MAY-12| removed typedef from structures, use fapi to define dimm type enums
-//   1.6   | pardeik  |10-APR-12| update cdimm power/int default, change power_thermal_values_t to use int32_t instead of uint32_t in order to identify a negative value correctly, added dimm config to the messages printed out
-//   1.5   | pardeik  |03-APR-12| fix cdimm size/rank addition to cycle through both mba's
-//   1.4   | pardeik  |26-MAR-12| Rewrite to iterate through the MBA's using fapi functions
+//   1.12  | pardeik  |07-NOV-12| updated to use new SI attributes and their
+//         |          |         | enums
+//   1.11  | pardeik  |22-OCT-12| Use the schmoo attributes to find wc
+//         |          |         | termination, updated hwp errors, removed
+//         |          |         | unneeded variables, added CQ component comment
+//         |          |         | line, updated safemode throttle default values
+//   1.10  | pardeik  |19-OCT-12| Enable TYPE_1D for ODT mapping.  Set ISDIMM
+//         |          |         | supplier power curve to master power curve
+//   1.9   | pardeik  |11-OCT-12| updated to use new attributes, termination
+//         |          |         | power calculation added in
+//   1.8   | pardeik  |13-JUN-12| Major rewrite to have dimm power determined by
+//         |          |         | dram generation and width, with uplifts
+//         |          |         | applied (not based on dimm size lookup table
+//         |          |         | any longer)
+//   1.7   | pardeik  |04-MAY-12| removed typedef from structures, use fapi to
+//         |          |         | define dimm type enums
+//   1.6   | pardeik  |10-APR-12| update cdimm power/int default, change
+//         |          |         | power_thermal_values_t to use int32_t instead
+//         |          |         | of uint32_t in order to identify a negative
+//         |          |         | value correctly, added dimm config to the
+//         |          |         | messages printed out
+//   1.5   | pardeik  |03-APR-12| fix cdimm size/rank addition to cycle through
+//         |          |         | both mba's
+//   1.4   | pardeik  |26-MAR-12| Rewrite to iterate through the MBA's using
+//         |          |         | fapi functions
 //         | pardeik  |01-DEC-11| Updated to align with procedure definition
 //   1.3   | asaetow  |03-NOV-11| Fixed to comply with mss_eff_config_thermal.H
-//   1.2   | asaetow  |03-NOV-11| Changed format of file and made function lower case. 
+//   1.2   | asaetow  |03-NOV-11| Changed format of file and made function lower
+//         |          |         | case. 
 //   1.1   | pardeik  |01-NOV-11| First Draft.
 
 /*
@@ -73,9 +98,10 @@ Waiting for platinit attributes to enable sections in this procedure:
 1.  Power Curves to originate from CDIMM VPD (platinit)
 2.  Thermal memory power limit from MRW (platinit)
 3.  Safemode throttles from MRW (platinit)
-4.  ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO and ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO enable sections of this procedure when they are used
-5.  Need runtime throttles non-volatile and initialized to zero by firmware on the first IPL
-6.  Error callouts
+5.  Need runtime throttles non-volatile and initialized to zero by firmware on
+    the first IPL
+6.  Call out error for CDIMM and lab VPD power curves when it makes sense
+7.  Update power table after hardware measurements are done
 
 */
 
@@ -93,17 +119,19 @@ Waiting for platinit attributes to enable sections in this procedure:
 //------------------------------------------------------------------------------
 //  Constants
 //------------------------------------------------------------------------------
-const uint8_t NUM_PORTS = 2;				// number of ports per MBA
-const uint8_t NUM_DIMMS = 2;				// number of dimms per MBA port
-const uint8_t NUM_RANKS = 4;				// number of ranks per dimm
-const uint32_t ISDIMM_POWER_SLOPE_DEFAULT = 940;		// default power slope (cW/utilization)
-const uint32_t ISDIMM_POWER_INT_DEFAULT = 900;		// default power intercept (cW)
-const uint32_t CDIMM_POWER_SLOPE_DEFAULT = 0x8240;		// default power slope (cW/utilization)
-const uint32_t CDIMM_POWER_INT_DEFAULT = 0x80CE;		// default power intercept (cW)
-const uint8_t IDLE_DIMM_UTILIZATION = 0;		// DRAM data bus utilization percent for the idle power defined in table below - needs to be 0
-const uint8_t ACTIVE_DIMM_UTILIZATION = 70;		// DRAM data bus utilization percent for the active power defined in table below (reads+writes)
-const uint8_t DATA_BUS_READ_PERCENT = 66;		// read percentage of data bus
-const uint8_t DATA_BUS_WRITE_PERCENT = 34;		// write percentage of data bus
+const uint8_t NUM_PORTS = 2;
+const uint8_t NUM_DIMMS = 2;
+const uint8_t NUM_RANKS = 4;
+const uint32_t ISDIMM_POWER_SLOPE_DEFAULT = 940;
+const uint32_t ISDIMM_POWER_INT_DEFAULT = 900;
+const uint32_t CDIMM_POWER_SLOPE_DEFAULT = 0x8240;
+const uint32_t CDIMM_POWER_INT_DEFAULT = 0x80CE;
+// These are based on what was used when ISDIMM power values were taken from the
+// power calculator
+const uint8_t IDLE_DIMM_UTILIZATION = 0;
+const uint8_t ACTIVE_DIMM_UTILIZATION = 70;
+const uint8_t DATA_BUS_READ_PERCENT = 66;
+const uint8_t DATA_BUS_WRITE_PERCENT = 34;
 
 
 extern "C" {
@@ -115,54 +143,57 @@ extern "C" {
 //------------------------------------------------------------------------------
     fapi::ReturnCode mss_eff_config_thermal(const fapi::Target & i_target_mba);
 
-    fapi::ReturnCode mss_eff_config_thermal_term(
-						      const char nom_or_wc_term[4],
-						      uint8_t i_port,
-						      uint8_t i_dimm,
-						      uint8_t i_rank,
-						      uint32_t i_dimm_voltage,
-						      uint8_t i_dram_width,
-						      uint8_t i_dram_tdqs,
-						      uint8_t i_ibm_type[NUM_PORTS][NUM_DIMMS],
-						      uint8_t i_dimm_ranks_configed_array[NUM_PORTS][NUM_DIMMS],
-						      uint8_t i_dimm_dram_ron[NUM_PORTS][NUM_DIMMS],
-						      uint8_t i_dimm_rank_odt_rd[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						      uint8_t i_dimm_rank_odt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						      uint8_t i_dram_rtt_nom[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						      uint8_t i_dram_rtt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						      uint8_t i_cen_dq_dqs_rcv_imp[NUM_PORTS],
-						      uint8_t i_cen_dq_dqs_drv_imp[NUM_PORTS],
-						      float &o_dimm_power_adder_termination
-						      );
-
-    fapi::ReturnCode mss_eff_config_thermal_get_wc_term(
-							const fapi::Target &i_target_mba,
-							uint8_t i_port,
-							uint8_t &o_cen_dq_dqs_rcv_imp_wc,
-							uint8_t &o_cen_dq_dqs_drv_imp_wc
-							);
-
-    fapi::ReturnCode mss_eff_config_thermal_get_cen_drv_value(
-							      uint8_t i_cen_dq_dqs_drv_imp,
-							      uint8_t &o_cen_dq_dqs_drv_imp
-							      );
+    fapi::ReturnCode mss_eff_config_thermal_term
+      (
+       const char nom_or_wc_term[4],
+       uint8_t i_port,
+       uint8_t i_dimm,
+       uint8_t i_rank,
+       uint32_t i_dimm_voltage,
+       uint8_t i_dram_width,
+       uint8_t i_dram_tdqs,
+       uint8_t i_ibm_type[NUM_PORTS][NUM_DIMMS],
+       uint8_t i_dimm_ranks_configed_array[NUM_PORTS][NUM_DIMMS],
+       uint8_t i_dimm_dram_ron[NUM_PORTS][NUM_DIMMS],
+       uint8_t i_dimm_rank_odt_rd[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_dimm_rank_odt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_dram_rtt_nom[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_dram_rtt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_cen_dq_dqs_rcv_imp[NUM_PORTS],
+       uint8_t i_cen_dq_dqs_drv_imp[NUM_PORTS],
+       float &o_dimm_power_adder_termination
+       );
+
+    fapi::ReturnCode mss_eff_config_thermal_get_wc_term
+      (
+       const fapi::Target &i_target_mba,
+       uint8_t i_port,
+       uint8_t &o_cen_dq_dqs_rcv_imp_wc,
+       uint8_t &o_cen_dq_dqs_drv_imp_wc
+       );
+
+    fapi::ReturnCode mss_eff_config_thermal_get_cen_drv_value
+      (
+       uint8_t i_cen_dq_dqs_drv_imp,
+       uint8_t &o_cen_dq_dqs_drv_imp
+       );
 
 //------------------------------------------------------------------------------
-// @brief mss_eff_config_thermal(): This function determines the power and throttle attribute values to use
+// @brief mss_eff_config_thermal(): This function determines the power and
+// throttle attribute values to use
 //
-// @param    const fapi::Target & i_target_mba:  MBA Target passed in
+// @param[in]	const fapi::Target & i_target_mba:  MBA Target passed in
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
 
     fapi::ReturnCode mss_eff_config_thermal(const fapi::Target & i_target_mba)
     {
-
 	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
 
 	char procedure_name[32];
 	sprintf(procedure_name, "mss_eff_config_thermal");
-	FAPI_INF("*** Running %s ***", procedure_name);
+	FAPI_IMP("*** Running %s ***", procedure_name);
 
 	enum
 	{
@@ -176,7 +207,8 @@ extern "C" {
 	    X8 = fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X8,
 	};
 
-// Structure types for the table that holds dimm power and adjustment values that will be used
+// Structure types for the table that holds dimm power and adjustment values
+// that will be used
 
 	struct dimm_power_t
 	{
@@ -200,29 +232,41 @@ extern "C" {
 	    int32_t		dimm_frequency_base;	    
 	};
 
-// Master Ranks column uses the values in the same table entry for the number of master ranks specified.  Default is to have it use same power for each master rank, so that is why master ranks = 1.  If we need to separate power based on number of master ranks, then have the table setup for descending master rank values.  We always need an entry for master ranks of 1.  Table lookup will stop after first matching entry is found (DRAM Generation, DRAM Width, and Master Ranks = dimm_master_ranks_array OR 1)
+//------------------------------------------------------------------------------
+// Master Ranks column uses the values in the same table entry for the number of
+// master ranks specified.  Default is to have it use same power for each master
+// rank, so that is why master ranks = 1.  If we need to separate power based on
+// number of master ranks, then have the table setup for descending master rank
+// values.  We always need an entry for master ranks of 1.  Table lookup will
+// stop after first matching entry is found (DRAM Generation, DRAM Width, and
+// Master Ranks = dimm_master_ranks_array OR 1)
+//
+// These values need to cover the power of all IBM dimms.  Values will come from
+// the power calculator and be verified by hardware measurements.
 //
-//            DRAM	DRAM	Master	RankPower	DIMMTypeAdder	BaseVoltage	BaseFrequency
-//            GenerationWidth	Ranks	(cW)		(cW)		(mV)		(MHz)
-//            DDR3	X4	1	idle,full	UDIMM,LRDIMM,	1500,1350,1200	1066,1333,1600
-//            or	or				RDIMM		for values in	for values in
-//            DDR4	X8						this table	this table
-//				
+// Base Voltage and Base Frequency values need to match what mss_volt/mss_freq
+// uses.
+//
+//            DRAM  DRAM  Master RankPower  DIMMType    Base    Base
+//            Gen   Width Ranks	 idle,full  Adder       Volt    Freq
+//                               cW         U,LR,RDIMM  mV      MHz
+//------------------------------------------------------------------------------
 	power_data_t power_table[] =
 	{
-	    { DDR3,	X4,	1,	{ 70,373},	{0,93,104},	1350,		1066         },
-	    { DDR3,	X8,	1,	{ 52,300},	{0,93,104},	1350,		1066         },
-	    { DDR4,	X4,	1,	{ 70,373},	{0,93,104},	1350,		1066         },
-	    { DDR4,	X8,	1,	{ 52,300},	{0,93,104},	1350,		1066         },
+	    { DDR3, X4,   1,     { 70,373}, {0,93,104}, 1350,	1066 },
+	    { DDR3, X8,   1,     { 52,300}, {0,93,104}, 1350,	1066 },
+	    { DDR4, X4,   1,     { 70,373}, {0,93,104}, 1350,	1066 },
+	    { DDR4, X8,   1,     { 52,300}, {0,93,104}, 1350,	1066 },
 	};
 
-
 // other variables used in this function
 	fapi::Target target_chip;
 	std::vector<fapi::Target> target_mba_array;
 	std::vector<fapi::Target> target_dimm_array;
 	uint8_t port;
 	uint8_t dimm;
+	uint8_t mba_port;
+	uint8_t mba_dimm;
 	uint8_t rank;
 	uint8_t entry;
 	uint8_t dimm_type;
@@ -283,113 +327,244 @@ extern "C" {
 
 	power_table_size = (sizeof(power_table))/(sizeof(power_data_t));
 
+//------------------------------------------------------------------------------
 // Get input attributes
+//------------------------------------------------------------------------------
 	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN, &i_target_mba, dram_gen);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_GEN");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_TYPE, &i_target_mba, dimm_type);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DIMM_TYPE");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH, &i_target_mba, dram_width);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_WIDTH");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_TDQS, &i_target_mba, dram_tdqs);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, dimm_ranks_array);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, &i_target_mba, dimm_master_ranks_array);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_RANKS_CONFIGED, &i_target_mba, dimm_ranks_configed_array);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_TDQS");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM,
+			   &i_target_mba, dimm_ranks_array);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_NUM_RANKS_PER_DIMM");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM,
+			   &i_target_mba, dimm_master_ranks_array);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_RANKS_CONFIGED,
+			   &i_target_mba, dimm_ranks_configed_array);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DIMM_RANKS_CONFIGED");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RON, &i_target_mba, dimm_dram_ron);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_RON");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_ODT_RD, &i_target_mba, dimm_rank_odt_rd);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_ODT_RD");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_ODT_WR, &i_target_mba, dimm_rank_odt_wr);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS, &i_target_mba, cen_dq_dqs_rcv_imp);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba, cen_dq_dqs_drv_imp);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_ODT_WR");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS,
+			   &i_target_mba, cen_dq_dqs_rcv_imp);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_CEN_RCV_IMP_DQ_DQS");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS,
+			   &i_target_mba, cen_dq_dqs_drv_imp);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_CEN_DRV_IMP_DQ_DQS");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_NOM, &i_target_mba, dram_rtt_nom);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_RTT_NOM");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_RTT_WR, &i_target_mba, dram_rtt_wr);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_DRAM_RTT_WR");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_EFF_IBM_TYPE, &i_target_mba, ibm_type);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target_mba, num_dimms_on_port);
-	if(rc) return rc;
-// TODO:  use vpd values when power curve data is available from CDIMM VPD (platinit), remove hardcoding
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_IBM_TYPE");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT,
+			   &i_target_mba, num_dimms_on_port);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_NUM_DROPS_PER_PORT");
+	    return rc;
+	}
+// TODO:  use vpd values when power curve data is available from CDIMM VPD
+// (platinit), remove hardcoding
 	cdimm_master_power_slope = CDIMM_POWER_SLOPE_DEFAULT;
 	cdimm_master_power_intercept = CDIMM_POWER_INT_DEFAULT;
 	cdimm_supplier_power_slope = CDIMM_POWER_SLOPE_DEFAULT;
 	cdimm_supplier_power_intercept = CDIMM_POWER_INT_DEFAULT;
-//	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_MASTER_POWER_SLOPE, &i_target_mba, cdimm_master_power_slope);
-//	if(rc) return rc;
-//	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_MASTER_POWER_INTERCEPT, &i_target_mba, cdimm_master_power_intercept);
-//	if(rc) return rc;
-//	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_SUPPLIER_POWER_SLOPE, &i_target_mba, cdimm_supplier_power_slope);
-//	if(rc) return rc;
-//	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_SUPPLIER_POWER_INTERCEPT, &i_target_mba, cdimm_supplier_power_intercept);
-//	if(rc) return rc;
-// TODO:  Get Safemode throttles from MRW (platinit), hardcode until available - Keep here until cronus is able to set runtime memory throttles at the end of istep
+/*
+	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_MASTER_POWER_SLOPE,
+			   &i_target_mba, cdimm_master_power_slope);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_SPD_CDIMM_MASTER_POWER_SLOPE");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_MASTER_POWER_INTERCEPT,
+			   &i_target_mba, cdimm_master_power_intercept);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_SPD_CDIMM_MASTER_POWER_INTERCEPT");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_SUPPLIER_POWER_SLOPE,
+			   &i_target_mba, cdimm_supplier_power_slope);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_SPD_CDIMM_SUPPLIER_POWER_SLOPE");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_SPD_CDIMM_SUPPLIER_POWER_INTERCEPT,
+			   &i_target_mba, cdimm_supplier_power_intercept);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_SPD_CDIMM_SUPPLIER_POWER_INTERCEPT");
+	    return rc;
+	}
+*/
+// TODO:  Get Safemode throttles from MRW (platinit), hardcode until available
 	safemode_throttle_n_per_mba = 96;
-//	safemode_throttle_n_per_chip = 32;
-	safemode_throttle_n_per_chip = 96;
+	safemode_throttle_n_per_chip = 32;
 	safemode_throttle_d = 512;
-//	rc = FAPI_ATTR_GET(ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, safemode_throttle_n_per_mba);
-//	if(rc) return rc;
-//	rc = FAPI_ATTR_GET(ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, safemode_throttle_n_per_chip);
-//	if(rc) return rc;
-//	rc = FAPI_ATTR_GET(ATTR_MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR, &i_target_mba, safemode_throttle_d);
-//	if(rc) return rc;
+/*
+	rc = FAPI_ATTR_GET(ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			   &i_target_mba, safemode_throttle_n_per_mba);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			   &i_target_mba, safemode_throttle_n_per_chip);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR,
+			   &i_target_mba, safemode_throttle_d);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MRW_SAFEMODE_MEM_THROTTLE_DENOMINATOR");
+	    return rc;
+	}
+*/
 // TODO:  Get Thermal power Limit from MRW (platinit), hardcode until available
 	if (dimm_type == CDIMM)
 	{
 	    dimm_thermal_power_limit = 5000; // in cW, per CDIMM, high limit
-//	    dimm_thermal_power_limit = 2500; // in cW, per CDIMM
 	}
 	else
 	{
 	    dimm_thermal_power_limit = 2000; // in cW, per ISDIMM, high limit
-//	    dimm_thermal_power_limit = 600; // in cW, per ISDIMM
 	}
-//	rc = FAPI_ATTR_GET(ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT, &i_target_mba, dimm_thermal_power_limit);
-//	if(rc) return rc;
-
+/*
+	rc = FAPI_ATTR_GET(ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT,
+			   &i_target_mba, dimm_thermal_power_limit);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT");
+	    return rc;
+	}
+*/
 
 // Get Centaur target for the given MBA
 	rc = fapiGetParentChip(i_target_mba, target_chip);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error from fapiGetParentChip");
+	    return rc;
+	}
 // Get voltage and frequency attributes
 	rc = FAPI_ATTR_GET(ATTR_MSS_VOLT, &target_chip, dimm_voltage);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_VOLT");
+	    return rc;
+	}
 	rc = FAPI_ATTR_GET(ATTR_MSS_FREQ, &target_chip, dimm_frequency);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_FREQ");
+	    return rc;
+	}
+
 
 // get any attributes from DIMM SPD
 	if (dimm_type != CDIMM)
 	{
-	    rc = fapiGetAssociatedDimms(i_target_mba, target_dimm_array, fapi::TARGET_STATE_PRESENT);
-	    if(rc) return rc;
-	    for (dimm_index=0; dimm_index < target_dimm_array.size(); dimm_index++)
+	    rc = fapiGetAssociatedDimms(i_target_mba, target_dimm_array,
+					fapi::TARGET_STATE_PRESENT);
+	    if (rc) {
+		FAPI_ERR("Error from fapiGetAssociatedDimms");
+		return rc;
+	    }
+	    for (dimm_index=0;
+		 dimm_index < target_dimm_array.size();
+		 dimm_index++)
 	    {
-		rc = FAPI_ATTR_GET(ATTR_MBA_PORT, &target_dimm_array[dimm_index], port);
-		if(rc) return rc;
-		rc = FAPI_ATTR_GET(ATTR_MBA_DIMM, &target_dimm_array[dimm_index], dimm);
-		if(rc) return rc;
-		rc = FAPI_ATTR_GET(ATTR_SPD_NUM_OF_REGISTERS_USED_ON_RDIMM, &target_dimm_array[dimm_index], dimm_number_registers[port][dimm]);
-		if(rc) return rc;
+		rc = FAPI_ATTR_GET(ATTR_MBA_PORT,
+				   &target_dimm_array[dimm_index], port);
+		if (rc) {
+		    FAPI_ERR("Error getting attribute ATTR_MBA_PORT");
+		    return rc;
+		}
+		rc = FAPI_ATTR_GET(ATTR_MBA_DIMM,
+				   &target_dimm_array[dimm_index], dimm);
+		if (rc) {
+		    FAPI_ERR("Error getting attribute ATTR_MBA_DIMM");
+		    return rc;
+		}
+		rc = FAPI_ATTR_GET(ATTR_SPD_NUM_OF_REGISTERS_USED_ON_RDIMM,
+				   &target_dimm_array[dimm_index],
+				   dimm_number_registers[port][dimm]);
+		if (rc) {
+		    FAPI_ERR("Error getting attribute ATTR_SPD_NUM_OF_REGISTERS_USED_ON_RDIMM");
+		    return rc;
+		}
 	    }
 	}
 
 // Get number of Centaur MBAs that have dimms present
 	if (dimm_type == CDIMM)
 	{
-	    rc = fapiGetChildChiplets(target_chip, fapi::TARGET_TYPE_MBA_CHIPLET, target_mba_array, fapi::TARGET_STATE_PRESENT);
-	    if(rc) return rc;
+	    rc = fapiGetChildChiplets(target_chip,
+				      fapi::TARGET_TYPE_MBA_CHIPLET,
+				      target_mba_array,
+				      fapi::TARGET_STATE_PRESENT);
+	    if (rc) {
+		FAPI_ERR("Error from fapiGetChildChiplets");
+		return rc;
+	    }
 	    num_mba_with_dimms = 0;
 	    for (mba_index=0; mba_index < target_mba_array.size(); mba_index++)
 	    {
-		rc = fapiGetAssociatedDimms(target_mba_array[mba_index], target_dimm_array, fapi::TARGET_STATE_PRESENT);
-		if(rc) return rc;
+		rc = fapiGetAssociatedDimms(target_mba_array[mba_index],
+					    target_dimm_array,
+					    fapi::TARGET_STATE_PRESENT);
+		if (rc) {
+		    FAPI_ERR("Error from fapiGetAssociatedDimms");
+		    return rc;
+		}
 		if (target_dimm_array.size() > 0)
 		{
 		    num_mba_with_dimms++;
@@ -402,16 +577,18 @@ extern "C" {
 	{
 // get worst case termination values that will be used
 // Only look at Centaur DQ/DQS Driver and Receiver termination settings
-// Note that the DRAM rtt_nom, rtt_wr, and ron will not be allowed to change, all these will stay at the nominal settings
+// Note that the DRAM rtt_nom, rtt_wr, and ron will not be allowed to change,
+// all these will stay at the nominal settings
 	    for (port=0; port < NUM_PORTS; port++)
 	    {
-		rc = mss_eff_config_thermal_get_wc_term(
-							i_target_mba,
-							port,
-							cen_dq_dqs_rcv_imp_wc[port],
-							cen_dq_dqs_drv_imp_wc[port]
-							);
-		if(rc)
+		rc = mss_eff_config_thermal_get_wc_term
+		  (
+		   i_target_mba,
+		   port,
+		   cen_dq_dqs_rcv_imp_wc[port],
+		   cen_dq_dqs_drv_imp_wc[port]
+		   );
+		if (rc)
 		{
 		    FAPI_ERR("Error (0x%x) calling mss_eff_config_thermal_get_wc_term", static_cast<uint32_t>(rc));
 		    return rc;
@@ -419,9 +596,9 @@ extern "C" {
 	    }
 	}
 
-////////////////////////////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 // Power Curve Determination
-////////////////////////////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 // Iterate through the MBA ports to get power slope/intercept values
 	for (port=0; port < NUM_PORTS; port++)
 	{
@@ -438,69 +615,76 @@ extern "C" {
 		    for (rank=0; rank < NUM_RANKS; rank++)
 		    {
 // nominal termination
-			rc = mss_eff_config_thermal_term(
-							 "NOM",
-							 port,
-							 dimm,
-							 rank,
-							 dimm_voltage,
-							 dram_width,
-							 dram_tdqs,
-							 ibm_type,
-							 dimm_ranks_configed_array,
-							 dimm_dram_ron,
-							 dimm_rank_odt_rd,
-							 dimm_rank_odt_wr,
-							 dram_rtt_nom,
-							 dram_rtt_wr,
-							 cen_dq_dqs_rcv_imp,
-							 cen_dq_dqs_drv_imp,
-							 dimm_power_adder_termination
-							 );
-			if(rc)
+			rc = mss_eff_config_thermal_term
+			  (
+			   "NOM",
+			   port,
+			   dimm,
+			   rank,
+			   dimm_voltage,
+			   dram_width,
+			   dram_tdqs,
+			   ibm_type,
+			   dimm_ranks_configed_array,
+			   dimm_dram_ron,
+			   dimm_rank_odt_rd,
+			   dimm_rank_odt_wr,
+			   dram_rtt_nom,
+			   dram_rtt_wr,
+			   cen_dq_dqs_rcv_imp,
+			   cen_dq_dqs_drv_imp,
+			   dimm_power_adder_termination
+			   );
+			if (rc)
 			{
 			    FAPI_ERR("Error (0x%x) calling mss_eff_config_thermal_term", static_cast<uint32_t>(rc));
 			    return rc;
 			}
-			if (dimm_power_adder_termination > dimm_power_adder_termination_largest)
+			if (dimm_power_adder_termination >
+			    dimm_power_adder_termination_largest)
 			{
-			    dimm_power_adder_termination_largest = dimm_power_adder_termination;
+			    dimm_power_adder_termination_largest =
+			      dimm_power_adder_termination;
 			}
 
 // worst case termination
-			rc = mss_eff_config_thermal_term(
-							 "WC",
-							 port,
-							 dimm,
-							 rank,
-							 dimm_voltage,
-							 dram_width,
-							 dram_tdqs,
-							 ibm_type,
-							 dimm_ranks_configed_array,
-							 dimm_dram_ron,
-							 dimm_rank_odt_rd,
-							 dimm_rank_odt_wr,
-							 dram_rtt_nom,
-							 dram_rtt_wr,
-							 cen_dq_dqs_rcv_imp_wc,
-							 cen_dq_dqs_drv_imp_wc,
-							 dimm_power_adder_termination_wc
-							 );
-			if(rc)
+			rc = mss_eff_config_thermal_term
+			  (
+			   "WC",
+			   port,
+			   dimm,
+			   rank,
+			   dimm_voltage,
+			   dram_width,
+			   dram_tdqs,
+			   ibm_type,
+			   dimm_ranks_configed_array,
+			   dimm_dram_ron,
+			   dimm_rank_odt_rd,
+			   dimm_rank_odt_wr,
+			   dram_rtt_nom,
+			   dram_rtt_wr,
+			   cen_dq_dqs_rcv_imp_wc,
+			   cen_dq_dqs_drv_imp_wc,
+			   dimm_power_adder_termination_wc
+			   );
+			if (rc)
 			{
 			    FAPI_ERR("Error (0x%x) calling mss_eff_config_thermal_term", static_cast<uint32_t>(rc));
 			    return rc;
 			}
-			if (dimm_power_adder_termination_wc > dimm_power_adder_termination_largest_wc)
+			if (dimm_power_adder_termination_wc >
+			    dimm_power_adder_termination_largest_wc)
 			{
-			    dimm_power_adder_termination_largest_wc = dimm_power_adder_termination_wc;
+			    dimm_power_adder_termination_largest_wc =
+			      dimm_power_adder_termination_wc;
 			}
 		    }
 		}
 	    }
 
-// iterate through the dimms on each port again to determine power slope and intercept
+// iterate through the dimms on each port again to determine power slope and
+// intercept
 	    for (dimm=0; dimm < NUM_DIMMS; dimm++)
 	    {
 // initialize dimm entries to zero
@@ -516,88 +700,242 @@ extern "C" {
 // Data in VPD needs to be the power per virtual dimm on the CDIMM
 		    if (dimm_type == CDIMM)
 		    {
-			power_slope_array[port][dimm] = cdimm_master_power_slope;
-			power_int_array[port][dimm] = cdimm_master_power_intercept;
-			power_slope2_array[port][dimm] = cdimm_supplier_power_slope;
-			power_int2_array[port][dimm] = cdimm_supplier_power_intercept;
+			power_slope_array[port][dimm] =
+			  cdimm_master_power_slope;
+			power_int_array[port][dimm] =
+			  cdimm_master_power_intercept;
+			power_slope2_array[port][dimm] =
+			  cdimm_supplier_power_slope;
+			power_int2_array[port][dimm] =
+			  cdimm_supplier_power_intercept;
 
 // check to see if data is valid
-			if ((((cdimm_master_power_slope & 0x8000) != 0) && ((cdimm_master_power_intercept & 0x8000) != 0)) && (((cdimm_supplier_power_slope & 0x8000) != 0) && ((cdimm_supplier_power_intercept & 0x8000) != 0)))
+			if (
+			    (((cdimm_master_power_slope & 0x8000) != 0) &&
+			     ((cdimm_master_power_intercept & 0x8000) != 0))
+			    &&
+			    (((cdimm_supplier_power_slope & 0x8000) != 0) &&
+			     ((cdimm_supplier_power_intercept & 0x8000) != 0))
+			    )
 			{
-			    power_slope_array[port][dimm] = cdimm_master_power_slope & 0x1FFF;
-			    power_int_array[port][dimm] = cdimm_master_power_intercept & 0x1FFF;
-			    power_slope2_array[port][dimm] = cdimm_supplier_power_slope & 0x1FFF;
-			    power_int2_array[port][dimm] = cdimm_supplier_power_intercept & 0x1FFF;
+			    power_slope_array[port][dimm] =
+			      cdimm_master_power_slope & 0x1FFF;
+			    power_int_array[port][dimm] =
+			      cdimm_master_power_intercept & 0x1FFF;
+			    power_slope2_array[port][dimm] =
+			      cdimm_supplier_power_slope & 0x1FFF;
+			    power_int2_array[port][dimm] =
+			      cdimm_supplier_power_intercept & 0x1FFF;
 // check to see if data is lab data
-			    if ((((cdimm_master_power_slope & 0x4000) == 0) || ((cdimm_master_power_intercept & 0x4000) == 0)) || (((cdimm_supplier_power_slope & 0x4000) == 0) || ((cdimm_supplier_power_intercept & 0x4000) == 0)))
+			    if (
+				(((cdimm_master_power_slope & 0x4000) == 0) ||
+				 ((cdimm_master_power_intercept & 0x4000) == 0))
+				||
+				(((cdimm_supplier_power_slope & 0x4000) == 0) ||
+				 ((cdimm_supplier_power_intercept &
+				   0x4000) == 0))
+				)
 			    {
-//TODO:  enable error reporting for this when it makes sense to do (after ship level power curve data is known), remove warning message.  Log error and allow IPL to continue and use the lab data if it is there.
-				FAPI_INF("WARNING:  power curve data is lab data, not ship level data");
-//				FAPI_ERR("power curve data is lab data, not ship level data");
-//				FAPI_SET_HWP_ERROR(rc, RC_MSS_DIMM_POWER_CURVE_DATA_LAB);
-//				if (rc) fapiLogError(rc);
+// TODO:  enable error reporting for this when it makes sense to do (after ship
+// level power curve data is known), remove warning message.  Log error and
+// allow IPL to continue and use the lab data if it is there.
+				FAPI_INF("WARNING:  power curve data is lab data, not ship level data. Using data anyways.");
+/*
+				power_slope_array[port][dimm] =
+				  CDIMM_POWER_SLOPE_DEFAULT;
+				power_int_array[port][dimm] =
+				  CDIMM_POWER_INT_DEFAULT;
+				power_slope2_array[port][dimm] =
+				  CDIMM_POWER_SLOPE_DEFAULT;
+				power_int2_array[port][dimm] =
+				  CDIMM_POWER_INT_DEFAULT;
+				FAPI_ERR("power curve data is lab data, not ship level data.  Use default values");
+				const fapi::Target & MEM_CHIP = target_chip;
+				uint32_t FFDC_DATA_1 = cdimm_master_power_slope;
+				uint32_t FFDC_DATA_2 =
+				  cdimm_master_power_intercept;
+				uint32_t FFDC_DATA_3 =
+				  cdimm_supplier_power_slope;
+				uint32_t FFDC_DATA_4 =
+				  cdimm_supplier_power_intercept;
+				FAPI_SET_HWP_ERROR
+				  (rc, RC_MSS_DIMM_POWER_CURVE_DATA_LAB);
+				if (rc) fapiLogError(rc);
+*/
 			    }
 			}
 			else
 			{
-			    power_slope_array[port][dimm] = CDIMM_POWER_SLOPE_DEFAULT;
-			    power_int_array[port][dimm] = CDIMM_POWER_INT_DEFAULT;
-			    power_slope2_array[port][dimm] = CDIMM_POWER_SLOPE_DEFAULT;
-			    power_int2_array[port][dimm] = CDIMM_POWER_INT_DEFAULT;
+			    power_slope_array[port][dimm] =
+			      CDIMM_POWER_SLOPE_DEFAULT;
+			    power_int_array[port][dimm] =
+			      CDIMM_POWER_INT_DEFAULT;
+			    power_slope2_array[port][dimm] =
+			      CDIMM_POWER_SLOPE_DEFAULT;
+			    power_int2_array[port][dimm] =
+			      CDIMM_POWER_INT_DEFAULT;
 			    FAPI_ERR("power curve data not valid, use default values");
-			    FAPI_SET_HWP_ERROR(rc, RC_MSS_DIMM_POWER_CURVE_DATA_INVALID);
+			    const fapi::Target & MEM_CHIP = target_chip;
+			    uint32_t FFDC_DATA_1 = cdimm_master_power_slope;
+			    uint32_t FFDC_DATA_2 = cdimm_master_power_intercept;
+			    uint32_t FFDC_DATA_3 = cdimm_supplier_power_slope;
+			    uint32_t FFDC_DATA_4 =
+			      cdimm_supplier_power_intercept;
+			    FAPI_SET_HWP_ERROR
+			      (rc, RC_MSS_DIMM_POWER_CURVE_DATA_INVALID);
 			    if (rc) fapiLogError(rc);
 			}
-
-			FAPI_INF("CDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]);
+			FAPI_DBG("CDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]);
 		    }
 // ISDIMM power slope/intercept will come from equation
 		    else
 		    {
-// Get the dimm power from table and add on any adjustments (if not found in table - should never happen - then default values will be used)
-			power_slope_array[port][dimm] = ISDIMM_POWER_SLOPE_DEFAULT;
+// Get the dimm power from table and add on any adjustments (if not found in
+//  table - should never happen - then default values will be used)
+			power_slope_array[port][dimm] =
+			  ISDIMM_POWER_SLOPE_DEFAULT;
 			power_int_array[port][dimm] = ISDIMM_POWER_INT_DEFAULT;
 
 			found_entry_in_table = 0;
 			for (entry = 0; entry < power_table_size; entry++)
 			{
-			    if ((power_table[entry].dram_generation == dram_gen) && (power_table[entry].dram_width == dram_width) && ((power_table[entry].dimm_ranks == dimm_master_ranks_array[port][dimm]) || (power_table[entry].dimm_ranks == 1)))
+			    if (
+				(power_table[entry].dram_generation == dram_gen)
+				&&
+				(power_table[entry].dram_width == dram_width)
+				&&
+				((power_table[entry].dimm_ranks ==
+				  dimm_master_ranks_array[port][dimm]) ||
+				 (power_table[entry].dimm_ranks == 1))
+				)
 			    {
 // get adder for dimm type
 				if (dimm_type == UDIMM)
 				{
-				    dimm_power_adder_type = power_table[entry].dimm_type_adder.udimm;
+				    dimm_power_adder_type =
+				      power_table[entry].dimm_type_adder.udimm;
 				}
 				else if (dimm_type == LRDIMM)
 				{
-				    dimm_power_adder_type = power_table[entry].dimm_type_adder.lrdimm;
+				    dimm_power_adder_type =
+				      power_table[entry].dimm_type_adder.lrdimm;
 				}
 				else // RDIMM
 				{
-				    dimm_power_adder_type = power_table[entry].dimm_type_adder.rdimm;
+				    dimm_power_adder_type =
+				      power_table[entry].dimm_type_adder.rdimm;
 				}
 
 
 				if (dimm_type == RDIMM) {
-				    dimm_power_adder_type = dimm_power_adder_type * dimm_number_registers[port][dimm];
+				    dimm_power_adder_type =
+				      dimm_power_adder_type *
+				      dimm_number_registers[port][dimm];
 				}
 
 // get adder for dimm voltage
-				dimm_power_multiplier_volt = ((float(dimm_voltage) / power_table[entry].dimm_voltage_base) * (float(dimm_voltage) / power_table[entry].dimm_voltage_base));
+				dimm_power_multiplier_volt =
+				  (
+				   (float(dimm_voltage) /
+				    power_table[entry].dimm_voltage_base)
+				   *
+				   (float(dimm_voltage) /
+				    power_table[entry].dimm_voltage_base)
+				   );
 // get adder for dimm frequency
-				dimm_power_mulitiplier_freq = (float(dimm_frequency) / power_table[entry].dimm_frequency_base);
+				dimm_power_mulitiplier_freq =
+				  (float(dimm_frequency) /
+				   power_table[entry].dimm_frequency_base);
 // get adder for termination using equation (in cW)
-				dimm_power_adder_termination = dimm_power_adder_termination_largest * 100;
-				dimm_power_adder_termination_wc = dimm_power_adder_termination_largest_wc * 100;
-// add up power for each dimm on channel and divide by number of dimms to get an average power for each dimm
-// calculate idle and active dimm power (active power includes worst case termination power)
-				dimm_idle_power = ((float(((power_table[entry].rank_power.idle * (dimm_master_ranks_array[port][dimm] + (dimm_ranks_array[port][dimm] - dimm_master_ranks_array[port][dimm])) + dimm_power_adder_type) * (dimm_power_multiplier_volt) * (dimm_power_mulitiplier_freq)) * num_dimms_on_port) / (num_dimms_on_port)));
-				dimm_active_power = ((float((((power_table[entry].rank_power.idle * (dimm_master_ranks_array[port][dimm] + (dimm_ranks_array[port][dimm] - dimm_master_ranks_array[port][dimm])) + (power_table[entry].rank_power.active - power_table[entry].rank_power.idle)) + dimm_power_adder_type) * (dimm_power_multiplier_volt) * (dimm_power_mulitiplier_freq)) * num_dimms_on_port - (power_table[entry].rank_power.active - power_table[entry].rank_power.idle) * (num_dimms_on_port - 1) + dimm_power_adder_termination + (dimm_power_adder_termination_wc - dimm_power_adder_termination)) / (num_dimms_on_port)));
-// calculate dimm power slope and intercept (add on 0.5 so value is effectively rounded to nearest integer)
-				power_slope_array[port][dimm] = int((dimm_active_power - dimm_idle_power) / (float(ACTIVE_DIMM_UTILIZATION - IDLE_DIMM_UTILIZATION) / 100) + 0.5);
-				power_int_array[port][dimm] = int(dimm_idle_power + 0.5);
-				power_slope2_array[port][dimm] = power_slope_array[port][dimm];
-				power_int2_array[port][dimm] = power_int_array[port][dimm];
+				dimm_power_adder_termination =
+				  dimm_power_adder_termination_largest * 100;
+				dimm_power_adder_termination_wc =
+				  dimm_power_adder_termination_largest_wc * 100;
+// add up power for each dimm on channel and divide by number of dimms to get an
+// average power for each dimm
+// calculate idle and active dimm power (active power includes worst case
+// termination power)
+				dimm_idle_power =
+				  (
+				   (float(
+					  (
+					   (
+					    power_table[entry].rank_power.idle
+					    *
+					    (
+					     dimm_master_ranks_array[port][dimm]
+					     + (dimm_ranks_array[port][dimm] -
+						dimm_master_ranks_array
+						[port][dimm])
+					     ) + dimm_power_adder_type
+					    )
+					   * (dimm_power_multiplier_volt)
+					   * (dimm_power_mulitiplier_freq)
+					   )
+					  *
+					  num_dimms_on_port
+					  )
+				    / (num_dimms_on_port)
+				    )
+				   );
+//------------------------------------------------------------------------------
+				dimm_active_power =
+				  (
+				   (float(
+					  (
+					   (
+					    (power_table[entry].rank_power.idle
+					     *
+					     (
+					      dimm_master_ranks_array[port][dimm]
+					      +
+					      (
+					       dimm_ranks_array[port][dimm] -
+					       dimm_master_ranks_array
+					       [port][dimm]
+					       )
+					      )
+					     +
+					     (
+					      power_table[entry].rank_power.active
+					      -
+					      power_table[entry].rank_power.idle
+					      )
+					     )
+					    +
+					    dimm_power_adder_type
+					    )
+					   * (dimm_power_multiplier_volt)
+					   * (dimm_power_mulitiplier_freq)
+					   )
+					  * num_dimms_on_port -
+					  (power_table[entry].rank_power.active
+					   - power_table[entry].rank_power.idle)
+					  * (num_dimms_on_port - 1)
+					  + dimm_power_adder_termination
+					  + (dimm_power_adder_termination_wc -
+					     dimm_power_adder_termination)
+					  )
+				    /
+				    (num_dimms_on_port)
+				    )
+				   );
+//------------------------------------------------------------------------------
+// calculate dimm power slope and intercept (add on 0.5 so value is effectively
+// rounded to nearest integer)
+				power_slope_array[port][dimm] =
+				  int(
+				      (dimm_active_power - dimm_idle_power) /
+				      (float(ACTIVE_DIMM_UTILIZATION -
+					     IDLE_DIMM_UTILIZATION) / 100)
+				      + 0.5
+				      );
+				power_int_array[port][dimm] =
+				  int(dimm_idle_power + 0.5);
+				power_slope2_array[port][dimm] =
+				  power_slope_array[port][dimm];
+				power_int2_array[port][dimm] =
+				  power_int_array[port][dimm];
 				if (power_table[entry].dram_generation == DDR3)
 				{
 				    sprintf(dram_gen_str, "DDR3");
@@ -610,15 +948,48 @@ extern "C" {
 				found_entry_in_table = 1;
 				FAPI_DBG("FOUND ENTRY:  GEN=%s WIDTH=X%d RANK=%d IDLE(%d%%)=%d ACTIVE(%d%%)=%d ADDER[TYPE=%d WCTERM=%4.2f] Multiplier[VOLT=%4.2f FREQ=%4.2f]", dram_gen_str, power_table[entry].dram_width, power_table[entry].dimm_ranks, IDLE_DIMM_UTILIZATION, power_table[entry].rank_power.idle, ACTIVE_DIMM_UTILIZATION, power_table[entry].rank_power.active, dimm_power_adder_type, dimm_power_adder_termination_wc, dimm_power_multiplier_volt, dimm_power_mulitiplier_freq);
 				FAPI_DBG("ISDIMM Power [P%d:D%d][%s:X%d:R%d/%d:%d:%d][IDLE(%d%%)=%4.2f:ACTIVE(%d%%)=%4.2f cW][SLOPE=%d:INT=%d cW]", port, dimm, dram_gen_str, power_table[entry].dram_width, dimm_master_ranks_array[port][dimm], (dimm_ranks_array[port][dimm] - dimm_master_ranks_array[port][dimm]), dimm_voltage, dimm_frequency, IDLE_DIMM_UTILIZATION, dimm_idle_power, ACTIVE_DIMM_UTILIZATION, dimm_active_power, power_slope_array[port][dimm], power_int_array[port][dimm]);
-				FAPI_INF("ISDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]);
+				FAPI_DBG("ISDIMM Power [P%d:D%d][SLOPE=%d:INT=%d cW][SLOPE2=%d:INT2=%d cW]", port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm], power_slope2_array[port][dimm], power_int2_array[port][dimm]);
 				break;
 			    }
 
 			}
+//------------------------------------------------------------------------------
 			if (found_entry_in_table == 0)
 			{
-			    FAPI_ERR( "Failed to Find DIMM Power Values on %s.  Default values will be used [P%d:D%d][Slope=%d:INT=%d cW]", i_target_mba.toEcmdString(), port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm] );
-			    FAPI_SET_HWP_ERROR(rc, RC_MSS_DIMM_NOT_FOUND_IN_POWER_TABLE);
+			    FAPI_ERR("Failed to Find DIMM Power Values on %s.  Default values will be used [P%d:D%d][Slope=%d:INT=%d cW]", i_target_mba.toEcmdString(), port, dimm, power_slope_array[port][dimm], power_int_array[port][dimm]);
+
+// get dimm target, we should always find a valid dimm target from this
+// since we have ranks present on this dimm if we are here in the code
+			    for (dimm_index=0;
+				 dimm_index < target_dimm_array.size();
+				 dimm_index++)
+			    {
+				rc = FAPI_ATTR_GET
+				  (ATTR_MBA_PORT,
+				   &target_dimm_array[dimm_index], mba_port);
+				if (rc) {
+				    FAPI_ERR("Error getting attribute ATTR_MBA_PORT");
+				    return rc;
+				}
+				rc = FAPI_ATTR_GET
+				  (ATTR_MBA_DIMM,
+				   &target_dimm_array[dimm_index], mba_dimm);
+				if (rc) {
+				    FAPI_ERR("Error getting attribute ATTR_MBA_DIMM");
+				    return rc;
+				}
+				if ( (mba_port == port) && (mba_dimm == dimm)) {
+				    break;
+				}
+			    }
+			    const fapi::Target & MEM_DIMM =
+			      target_dimm_array[dimm_index];
+			    uint32_t FFDC_DATA_1 = dram_gen;
+			    uint32_t FFDC_DATA_2 = dram_width;
+			    uint8_t  FFDC_DATA_3 =
+			      dimm_master_ranks_array[port][dimm];
+			    FAPI_SET_HWP_ERROR
+			      (rc, RC_MSS_DIMM_NOT_FOUND_IN_POWER_TABLE);
 			    if (rc) fapiLogError(rc);
 			}
 		    }
@@ -627,66 +998,125 @@ extern "C" {
 	}
 
 // write output attributes
-	rc = FAPI_ATTR_SET(ATTR_MSS_POWER_SLOPE, &i_target_mba, power_slope_array);
-	if(rc) return rc;
+	rc = FAPI_ATTR_SET(ATTR_MSS_POWER_SLOPE,
+			   &i_target_mba, power_slope_array);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_POWER_SLOPE");
+	    return rc;
+	}
 	rc = FAPI_ATTR_SET(ATTR_MSS_POWER_INT, &i_target_mba, power_int_array);
-	if(rc) return rc;
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_POWER_INT");
+	    return rc;
+	}
 
-	rc = FAPI_ATTR_SET(ATTR_MSS_POWER_SLOPE2, &i_target_mba, power_slope2_array);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_POWER_INT2, &i_target_mba, power_int2_array);
-	if(rc) return rc;
+	rc = FAPI_ATTR_SET(ATTR_MSS_POWER_SLOPE2,
+			   &i_target_mba, power_slope2_array);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_POWER_SLOPE2");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_POWER_INT2,
+			   &i_target_mba, power_int2_array);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_POWER_INT2");
+	    return rc;
+	}
 
 
-////////////////////////////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 // Memory Throttle Determination
-////////////////////////////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 
-// Runtime throttles will be non-volatile, so don't recalculate them if they have already been set
+// Runtime throttles will be non-volatile, so don't recalculate them if they
+// have already been set
 
-// TODO:  remove this section when firmware initializes attributes to zero AND runtime throttles are non-volatile
+// TODO:  remove this section when firmware initializes attributes to zero AND
+// runtime throttles are non-volatile
 	runtime_throttle_n_per_mba = 0;
 	runtime_throttle_n_per_chip = 0;
 	runtime_throttle_d = 0;
-	rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, runtime_throttle_n_per_mba);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, runtime_throttle_n_per_chip);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR, &i_target_mba, runtime_throttle_d);
-	if(rc) return rc;
+	rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			   &i_target_mba, runtime_throttle_n_per_mba);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			   &i_target_mba, runtime_throttle_n_per_chip);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR,
+			   &i_target_mba, runtime_throttle_d);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR");
+	    return rc;
+	}
 
 // Get the runtime throttle attributes here
-	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, runtime_throttle_n_per_mba);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, runtime_throttle_n_per_chip);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR, &i_target_mba, runtime_throttle_d);
-	if(rc) return rc;
+	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			   &i_target_mba, runtime_throttle_n_per_mba);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			   &i_target_mba, runtime_throttle_n_per_chip);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR,
+			   &i_target_mba, runtime_throttle_d);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR");
+	    return rc;
+	}
 // check to see if runtime throttles are all zero here
-	if ((runtime_throttle_n_per_mba == 0) && (runtime_throttle_n_per_chip == 0) && (runtime_throttle_d == 0))
+	if (
+	    (runtime_throttle_n_per_mba == 0) &&
+	    (runtime_throttle_n_per_chip == 0) &&
+	    (runtime_throttle_d == 0)
+	    )
 	{
 // Values have not been initialized, so get them initialized
-
-// Determine the thermal power limit to use, which represents a single channel pair power limit for the dimms on that channel pair (ie.  power for all dimms attached to one MBA).   The procedure mss_bulk_power_throttles takes the input of channel pair power to determine throttles.
-// CDIMM thermal power limit from MRW is per CDIMM, so divide by number of mbas that have dimms to get channel pair power
-// CDIMM:  Allow all commands to be directed toward one MBA to achieve the power limit
-//   This means that the power limit for a MBA channel pair must be the total CDIMM power limit minus the idle power of the other MBAs logical dimms
+//------------------------------------------------------------------------------
+// Determine the thermal power limit to use, which represents a single channel
+// pair power limit for the dimms on that channel pair (ie.  power for all dimms
+// attached to one MBA).   The procedure mss_bulk_power_throttles takes the
+// input of channel pair power to determine throttles.
+// CDIMM thermal power limit from MRW is per CDIMM, so divide by number of mbas
+// that have dimms to get channel pair power
+// CDIMM:  Allow all commands to be directed toward one MBA to achieve the power
+// limit
+//   This means that the power limit for a MBA channel pair must be the total
+// CDIMM power limit minus the idle power of the other MBAs logical dimms
+//------------------------------------------------------------------------------
 	    if (dimm_type == CDIMM)
 	    {
-		channel_pair_thermal_power_limit = dimm_thermal_power_limit / num_mba_with_dimms;
+		channel_pair_thermal_power_limit =
+		  dimm_thermal_power_limit / num_mba_with_dimms;
 	    }
 // ISDIMMs thermal power limit from MRW is per DIMM, so multiply by number of dimms on channel to get channel power and multiply by 2 to get channel pair power
 	    else
 	    {
 		// ISDIMMs
-		channel_pair_thermal_power_limit = dimm_thermal_power_limit * num_dimms_on_port * 2;
+		channel_pair_thermal_power_limit =
+		  dimm_thermal_power_limit * num_dimms_on_port * 2;
 	    }
 
 // Update the channel pair power limit attribute
-	    rc = FAPI_ATTR_SET(ATTR_MSS_MEM_WATT_TARGET, &i_target_mba, channel_pair_thermal_power_limit);
-	    if(rc) return rc;
+	    rc = FAPI_ATTR_SET(ATTR_MSS_MEM_WATT_TARGET,
+			       &i_target_mba, channel_pair_thermal_power_limit);
+	    if (rc) {
+		FAPI_ERR("Error writing attribute ATTR_MSS_MEM_WATT_TARGET");
+		return rc;
+	    }
 
-// Call the procedure function that takes a channel pair power limit and converts it to throttle values
+// Call the procedure function that takes a channel pair power limit and
+// converts it to throttle values
 
 	    FAPI_EXEC_HWP(rc, mss_bulk_pwr_throttles, i_target_mba);
 	    if (rc)
@@ -696,86 +1126,140 @@ extern "C" {
 	    }
 
 // Read back in the updated throttle attribute values (these are now set to values that will give dimm/channel power underneath the thermal power limit)
-	    rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, runtime_throttle_n_per_mba);
-	    if(rc) return rc;
-	    rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, runtime_throttle_n_per_chip);
-	    if(rc) return rc;
-	    rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR, &i_target_mba, runtime_throttle_d);
-	    if(rc) return rc;
+	    rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			       &i_target_mba, runtime_throttle_n_per_mba);
+	    if (rc) {
+		FAPI_ERR("Error getting attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA");
+		return rc;
+	    }
+	    rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			       &i_target_mba, runtime_throttle_n_per_chip);
+	    if (rc) {
+		FAPI_ERR("Error getting attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+		return rc;
+	    }
+	    rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR,
+			       &i_target_mba, runtime_throttle_d);
+	    if (rc) {
+		FAPI_ERR("Error getting attribute ATTR_MSS_MEM_THROTTLE_DENOMINATOR");
+		return rc;
+	    }
 
 // update output attributes
-	    rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, runtime_throttle_n_per_mba);
-	    if(rc) return rc;
-	    rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, runtime_throttle_n_per_chip);
-	    if(rc) return rc;
-	    rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR, &i_target_mba, runtime_throttle_d);
-	    if(rc) return rc;
+	    rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			       &i_target_mba, runtime_throttle_n_per_mba);
+	    if (rc) {
+		FAPI_ERR("Error writing attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA");
+		return rc;
+	    }
+	    rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			       &i_target_mba, runtime_throttle_n_per_chip);
+	    if (rc) {
+		FAPI_ERR("Error writing attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+		return rc;
+	    }
+	    rc = FAPI_ATTR_SET(ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR,
+			       &i_target_mba, runtime_throttle_d);
+	    if (rc) {
+		FAPI_ERR("Error writing attribute ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR");
+		return rc;
+	    }
 
 	}
 
-// Initialize the generic throttle attributes to safemode throttles (since the IPL will be done at the safemode throttles)
+// Initialize the generic throttle attributes to safemode throttles (since the
+// IPL will be done at the safemode throttles)
 	throttle_n_per_mba = safemode_throttle_n_per_mba;
 	throttle_n_per_chip = safemode_throttle_n_per_chip;
 	throttle_d = safemode_throttle_d;
 
 // write output attributes
-	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, throttle_n_per_mba);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, throttle_n_per_chip);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR, &i_target_mba, throttle_d);
-	if(rc) return rc;
-
-	FAPI_INF("*** %s COMPLETE ***", procedure_name);
+	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			   &i_target_mba, throttle_n_per_mba);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			   &i_target_mba, throttle_n_per_chip);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR,
+			   &i_target_mba, throttle_d);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_MEM_THROTTLE_DENOMINATOR");
+	    return rc;
+	}
+
+	FAPI_IMP("*** %s COMPLETE ***", procedure_name);
 	return rc;
     }
 
 //------------------------------------------------------------------------------
-// @brief mss_eff_config_thermal_term(): This function calculates the data bus termination power
+// @brief mss_eff_config_thermal_term(): This function calculates the data bus
+// termination power
+//
+// @param[in]   const char i_nom_or_wc_term[4]:  description of what is being
+//              calculated (ie.  NOM or WC)
+// @param[in]   uint8_t i_port:  MBA port being worked on
+// @param[in]   uint8_t i_dimm:  DIMM being worked on
+// @param[in]   uint8_t i_rank:  Rank being worked on
+// @param[in]   uint32_t i_dimm_voltage:  DIMM Voltage
+// @param[in]   uint8_t i_dram_width:  DRAM Width
+// @param[in]   uint8_t i_dram_tdqs:  DRAM TDQS enable/disable
+// @param[in]   uint8_t i_ibm_type[NUM_PORTS][NUM_DIMMS]:  IBM bus topology
+//              type
+// @param[in]   uint8_t i_dimm_ranks_configed_array[NUM_PORTS][NUM_DIMMS]:
+//              Master Ranks configured
+// @param[in]   uint8_t i_dimm_dram_ron[NUM_PORTS][NUM_DIMMS]:  DRAM RON driver
+//              impedance
+// @param[in]   uint8_t i_dimm_rank_odt_rd[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:
+//              Read ODT
+// @param[in]   uint8_t i_dimm_rank_odt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:
+//              Write ODT
+// @param[in]   uint8_t i_dram_rtt_nom[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:  DRAM
+//              RTT NOM
+// @param[in]   uint8_t i_dram_rtt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:  DRAM
+//              RTT WR
+// @param[in]   uint8_t i_cen_dq_dqs_rcv_imp[NUM_PORTS]:  Centaur DQ/DQS 
+//              receiver impedance
+// @param[in]	uint8_t i_cen_dq_dqs_drv_imp[NUM_PORTS]:  Centaur DQ/DQS driver
+//              impedance
+// @param[out]  float &o_dimm_power_adder_termination:  Termination Power
+//              Calculated in Watts
 //
-// @param    const char i_nom_or_wc_term[4]:  description of what is being calculated (ie.  NOM or WC)
-// @param    uint8_t i_port:  MBA port being worked on
-// @param    uint8_t i_dimm:  DIMM being worked on
-// @param    uint8_t i_rank:  Rank being worked on
-// @param    uint32_t i_dimm_voltage:  DIMM Voltage
-// @param    uint8_t i_dram_width:  DRAM Width
-// @param    uint8_t i_dram_tdqs:  DRAM TDQS enable/disable
-// @param    uint8_t i_ibm_type[NUM_PORTS][NUM_DIMMS]:  IBM bus topology type
-// @param    uint8_t i_dimm_ranks_configed_array[NUM_PORTS][NUM_DIMMS]:  Master Ranks configured
-// @param    uint8_t i_dimm_dram_ron[NUM_PORTS][NUM_DIMMS]:  DRAM RON driver impedance
-// @param    uint8_t i_dimm_rank_odt_rd[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:  Read ODT
-// @param    uint8_t i_dimm_rank_odt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:  Write ODT
-// @param    uint8_t i_dram_rtt_nom[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:  DRAM RTT NOM
-// @param    uint8_t i_dram_rtt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS]:  DRAM RTT WR
-// @param    uint8_t i_cen_dq_dqs_rcv_imp[NUM_PORTS]:  Centaur DQ/DQS receiver impedance
-// @param    uint8_t i_cen_dq_dqs_drv_imp[NUM_PORTS]:  Centaur DQ/DQS driver impedance
-// @param    float &o_dimm_power_adder_termination:  Termination Power Calculated in Watts
-
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
 
-    fapi::ReturnCode mss_eff_config_thermal_term(
-						 const char i_nom_or_wc_term[4],
-						 uint8_t i_port,
-						 uint8_t i_dimm,
-						 uint8_t i_rank,
-						 uint32_t i_dimm_voltage,
-						 uint8_t i_dram_width,
-						 uint8_t i_dram_tdqs,
-						 uint8_t i_ibm_type[NUM_PORTS][NUM_DIMMS],
-						 uint8_t i_dimm_ranks_configed_array[NUM_PORTS][NUM_DIMMS],
-						 uint8_t i_dimm_dram_ron[NUM_PORTS][NUM_DIMMS],
-						 uint8_t i_dimm_rank_odt_rd[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						 uint8_t i_dimm_rank_odt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						 uint8_t i_dram_rtt_nom[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						 uint8_t i_dram_rtt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
-						 uint8_t i_cen_dq_dqs_rcv_imp[NUM_PORTS],
-						 uint8_t i_cen_dq_dqs_drv_imp[NUM_PORTS],
-						 float &o_dimm_power_adder_termination
-						 )
+    fapi::ReturnCode mss_eff_config_thermal_term
+      (
+       const char i_nom_or_wc_term[4],
+       uint8_t i_port,
+       uint8_t i_dimm,
+       uint8_t i_rank,
+       uint32_t i_dimm_voltage,
+       uint8_t i_dram_width,
+       uint8_t i_dram_tdqs,
+       uint8_t i_ibm_type[NUM_PORTS][NUM_DIMMS],
+       uint8_t i_dimm_ranks_configed_array[NUM_PORTS][NUM_DIMMS],
+       uint8_t i_dimm_dram_ron[NUM_PORTS][NUM_DIMMS],
+       uint8_t i_dimm_rank_odt_rd[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_dimm_rank_odt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_dram_rtt_nom[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_dram_rtt_wr[NUM_PORTS][NUM_DIMMS][NUM_RANKS],
+       uint8_t i_cen_dq_dqs_rcv_imp[NUM_PORTS],
+       uint8_t i_cen_dq_dqs_drv_imp[NUM_PORTS],
+       float &o_dimm_power_adder_termination
+       )
     {
-
 	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
+
+	char procedure_name[32];
+	sprintf(procedure_name, "mss_eff_config_thermal_term");
+	FAPI_IMP("*** Running %s ***", procedure_name);
+
 	uint8_t number_nets_term_rd;
 	uint8_t number_nets_term_wr;
 	uint8_t ma0odt01_dimm;
@@ -793,31 +1277,38 @@ extern "C" {
 	float term_odt_mult_wr;
 	uint8_t cen_dq_dqs_drv_imp_value;
 
-// Get number of nets that will have termination applied from ODT (DQ,DQS,DM,TDQS)
+// Get number of nets that will have termination applied from ODT (DQ,DQS,DM,
+// TDQS)
 // number of nets for DQ (9 DRAMs x 8 bits each, or 18 DRAMs x 4 bits each = 72)
 	number_nets_term_rd = 72;
 	number_nets_term_wr = 72;
-// add in number of nets for DQS + DM + TDQS (TDQS only supported for X8, DM only used for writes)
+// add in number of nets for DQS + DM + TDQS (TDQS only supported for X8, DM
+// only used for writes)
 	if (i_dram_width == fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X4)
 	{
 	    number_nets_term_rd = number_nets_term_rd + 36 + 0 + 0;
 	    number_nets_term_wr = number_nets_term_wr + 36 + 0 + 0;
 	}
-	else if ((i_dram_width == fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X8) && (i_dram_tdqs == fapi::ENUM_ATTR_EFF_DRAM_TDQS_DISABLE))
+	else if ((i_dram_width == fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X8) &&
+		 (i_dram_tdqs == fapi::ENUM_ATTR_EFF_DRAM_TDQS_DISABLE))
 	{
 	    number_nets_term_rd = number_nets_term_rd + 18 + 0 + 0;
 	    number_nets_term_wr = number_nets_term_wr + 18 + 9 + 0;
 	}
-	else if ((i_dram_width == fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X8) && (i_dram_tdqs == fapi::ENUM_ATTR_EFF_DRAM_TDQS_ENABLE))
+	else if ((i_dram_width == fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X8) &&
+		 (i_dram_tdqs == fapi::ENUM_ATTR_EFF_DRAM_TDQS_ENABLE))
 	{
 	    number_nets_term_rd = number_nets_term_rd + 18 + 0 + 18;
 	    number_nets_term_wr = number_nets_term_wr + 18 + 0 + 18;
 	}
 
-// which rank is mapped to the [01]ODT[01] nets, from centaur spec, every type uses Ranks 0,1,4,5, with the following exceptions
+// which rank is mapped to the [01]ODT[01] nets, from centaur spec, every type
+// uses Ranks 0,1,4,5, with the following exceptions
 // Type 1D used Ranks 0,2,4,6 in that order (0_ODT0,0_ODT1,1_ODT0,1_ODT1)
-// expect that EFF_ODT_RD and EFF_ODT_WR will be setup correctly so we just need to add up any termination in parallel for the bits set in these attributes
-// Also need to consider if ODT is tied high for writes (if rtt_wr is set for the rank being written to, then it will be assumed that ODT is tied high)
+// expect that EFF_ODT_RD and EFF_ODT_WR will be setup correctly so we just need
+// to add up any termination in parallel for the bits set in these attributes
+// Also need to consider if ODT is tied high for writes (if rtt_wr is set for
+// the rank being written to, then it will be assumed that ODT is tied high)
 
 	if (i_ibm_type[i_port][i_dimm] == fapi::ENUM_ATTR_EFF_IBM_TYPE_TYPE_1D)
 	{
@@ -838,7 +1329,8 @@ extern "C" {
 	    ma1odt1_rank = 1;
 	}
 
-// check to see if rank is configured, only get termination power for these ranks
+// check to see if rank is configured, only get termination power for these
+// ranks
 	rank_mask = 0x00;
 	if (i_rank == 0)
 	{
@@ -858,90 +1350,179 @@ extern "C" {
 	}
 	if ((i_dimm_ranks_configed_array[i_port][i_dimm] & rank_mask) != 0)
 	{
-// effective net termination = [(active termination in parallel || driver impedance) + active termination in parallel]
+// effective net termination = [(active termination in parallel || driver
+// impedance) + active termination in parallel]
 
 
 
-////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 // calculate out effective termination for reads
-////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 	    eff_term_rd = 0;
 
+//------------------------------------------------------------------------------
 // 0ODT0
-	    if (((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x80) != 0) && (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+	    if (
+		((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x80) != 0)
+		&&
+		(i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank] !=
+		 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		)
 	    {
 		if (eff_term_rd == 0)
 		{
-		    eff_term_rd = i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank];
+		    eff_term_rd =
+		      i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank];
 		}
 		else
 		{
-		    eff_term_rd = (eff_term_rd * i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]) / (eff_term_rd + i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]);
+		    eff_term_rd =
+		      (eff_term_rd *
+		       i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank])
+		      /
+		      (eff_term_rd +
+		       i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]);
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 0ODT0 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]);
 
 	    }
+//------------------------------------------------------------------------------
 // 0ODT1
-	    if (((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x40) != 0) && (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+	    if (
+		((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x40) != 0)
+		&&
+		(i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank] !=
+		 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		)
 	    {
 		if (eff_term_rd == 0)
 		{
-		    eff_term_rd = i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank];
+		    eff_term_rd =
+		      i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank];
 		}
 		else
 		{
-		    eff_term_rd = (eff_term_rd * i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]) / (eff_term_rd + i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]);
+		    eff_term_rd =
+		      (eff_term_rd *
+		       i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank])
+		      /
+		      (eff_term_rd +
+		       i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]);
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 0ODT1 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]);
 	    }
+//------------------------------------------------------------------------------
 // 1ODT0
-	    if (((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x20) != 0) && (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+	    if (
+		((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x20) != 0)
+		&&
+		(i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank] !=
+		 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		)
 	    {
 		if (eff_term_rd == 0)
 		{
-		    eff_term_rd = i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank];
+		    eff_term_rd =
+		      i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank];
 		}
 		else
 		{
-		    eff_term_rd = (eff_term_rd * i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]) / (eff_term_rd + i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]);
+		    eff_term_rd =
+		      (eff_term_rd *
+		       i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank])
+		      /
+		      (eff_term_rd +
+		       i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]);
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 1ODT0 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]);
 	    }
+//------------------------------------------------------------------------------
 // 1ODT1
-	    if (((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x10) != 0) && (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+	    if (
+		((i_dimm_rank_odt_rd[i_port][i_dimm][i_rank] & 0x10) != 0)
+		&&
+		(i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank] !=
+		 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		)
 	    {
 		if (eff_term_rd == 0)
 		{
-		    eff_term_rd = i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank];
+		    eff_term_rd =
+		      i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank];
 		}
 		else
 		{
-		    eff_term_rd = (eff_term_rd * i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]) / (eff_term_rd + i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]);
+		    eff_term_rd =
+		      (eff_term_rd *
+		       i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank])
+		      /
+		      (eff_term_rd +
+		       i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]);
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 1ODT1 RD TERMINATION = %4.2f (%d)", i_port, i_dimm, i_rank, eff_term_rd, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]);
 	    }
-		// calculate out effective read termination
+
+// calculate out effective read termination
 	    if (eff_term_rd != 0)
 	    {
-		eff_net_term_rd = (float((float(eff_term_rd * i_cen_dq_dqs_rcv_imp[i_port]) / (eff_term_rd + i_cen_dq_dqs_rcv_imp[i_port])) * i_dimm_dram_ron[i_port][i_dimm]) / ((float(eff_term_rd * i_cen_dq_dqs_rcv_imp[i_port]) / (eff_term_rd + i_cen_dq_dqs_rcv_imp[i_port])) + i_dimm_dram_ron[i_port][i_dimm])) + (float(eff_term_rd * i_cen_dq_dqs_rcv_imp[i_port]) / (eff_term_rd + i_cen_dq_dqs_rcv_imp[i_port]));
+		eff_net_term_rd =
+		  (float(
+			 (float(eff_term_rd * i_cen_dq_dqs_rcv_imp[i_port]) /
+			  (eff_term_rd + i_cen_dq_dqs_rcv_imp[i_port]))
+			 * i_dimm_dram_ron[i_port][i_dimm]
+			 )
+		   /
+		   (
+		    (float(eff_term_rd * i_cen_dq_dqs_rcv_imp[i_port]) /
+		     (eff_term_rd + i_cen_dq_dqs_rcv_imp[i_port])
+		     )
+		    + i_dimm_dram_ron[i_port][i_dimm]
+		    )
+		   )
+		  +
+		  (float(eff_term_rd * i_cen_dq_dqs_rcv_imp[i_port]) /
+		   (eff_term_rd + i_cen_dq_dqs_rcv_imp[i_port]));
 		term_odt_mult_rd = 1.25;
 	    }
 	    else
 	    {
-		eff_net_term_rd = (float((i_cen_dq_dqs_rcv_imp[i_port]) * i_dimm_dram_ron[i_port][i_dimm]) / ((i_cen_dq_dqs_rcv_imp[i_port]) + i_dimm_dram_ron[i_port][i_dimm])) + (i_cen_dq_dqs_rcv_imp[i_port]);
+		eff_net_term_rd =
+		  (float((i_cen_dq_dqs_rcv_imp[i_port]) *
+			 i_dimm_dram_ron[i_port][i_dimm])
+		   / ((i_cen_dq_dqs_rcv_imp[i_port]) +
+		      i_dimm_dram_ron[i_port][i_dimm])
+		   )
+		  +
+		  (i_cen_dq_dqs_rcv_imp[i_port]);
 		term_odt_mult_rd = 1;
 	    }
 // writes
-/////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 // calculate out effective termination for writes
-/////////////////////////////////////////////////
+//------------------------------------------------------------------------------
 	    eff_term_wr = 0;
 
-// check to see if ODT is tied high (rank is not one of the ranks that get ODT driven to it, and rtt_wr or rtt_nom are enabled)
-	    if (((((i_rank != ma0odt0_rank) && (i_rank != ma0odt1_rank)) && (i_dimm == 0)) || (((i_rank != ma1odt0_rank) && (i_rank != ma1odt1_rank)) && (i_dimm == 1))) && ((i_dram_rtt_wr[i_port][i_dimm][i_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) || (i_dram_rtt_nom[i_port][i_dimm][i_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)))
+// check to see if ODT is tied high (rank is not one of the ranks that get ODT
+// driven to it, and rtt_wr or rtt_nom are enabled)
+	    if (
+		(
+		 (((i_rank != ma0odt0_rank) && (i_rank != ma0odt1_rank)) &&
+		  (i_dimm == 0))
+		 ||
+		 (((i_rank != ma1odt0_rank) && (i_rank != ma1odt1_rank)) &&
+		  (i_dimm == 1))
+		 )
+		&&
+		((i_dram_rtt_wr[i_port][i_dimm][i_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) ||
+		 (i_dram_rtt_nom[i_port][i_dimm][i_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+		)
 	    {
-		// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has it enabled)
-		if (i_dram_rtt_wr[i_port][i_dimm][i_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE)
+// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has
+// it enabled)
+		if (i_dram_rtt_wr[i_port][i_dimm][i_rank] !=
+		    fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE)
 		{
 		    if (eff_term_wr == 0)
 		    {
@@ -949,11 +1530,16 @@ extern "C" {
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_wr[i_port][i_dimm][i_rank]) / (eff_term_wr + i_dram_rtt_wr[i_port][i_dimm][i_rank]);
+			eff_term_wr =
+			  (eff_term_wr * i_dram_rtt_wr[i_port][i_dimm][i_rank])
+			  /
+			  (eff_term_wr + i_dram_rtt_wr[i_port][i_dimm][i_rank]);
 		    }
 		}
+
 		// dynamic ODT disabled, so use rtt_nom
-		else if (i_dram_rtt_nom[i_port][i_dimm][i_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		else if (i_dram_rtt_nom[i_port][i_dimm][i_rank] !=
+			 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
 		{
 		    if (eff_term_wr == 0)
 		    {
@@ -961,139 +1547,253 @@ extern "C" {
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_nom[i_port][i_dimm][i_rank]) / (eff_term_wr + i_dram_rtt_nom[i_port][i_dimm][i_rank]);
+			eff_term_wr =
+			  (eff_term_wr * i_dram_rtt_nom[i_port][i_dimm][i_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_nom[i_port][i_dimm][i_rank]);
 		    }
 
 		}
 		FAPI_DBG("[P%d:D%d:R%d] WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_wr[i_port][i_dimm][i_rank], i_dram_rtt_nom[i_port][i_dimm][i_rank]);
 	    }
-/// 0ODT0
-	    if (((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x80) != 0) && ((i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) || (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)))
+//------------------------------------------------------------------------------
+// 0ODT0
+	    if (
+		((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x80) != 0)
+		&&
+		((i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) ||
+		 (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+		)
 	    {
-		// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has it enabled)
-		if ((i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) && (i_dimm == 0) && (i_rank == ma0odt0_rank))
+// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has
+// it enabled)
+		if (
+		    (i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank] !=
+		     fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE)
+		    && (i_dimm == 0)
+		    && (i_rank == ma0odt0_rank)
+		    )
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank];
+			eff_term_wr =
+			  i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank]) / (eff_term_wr + i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank]);
 		    }
 		}
 		// dynamic ODT disabled, so use rtt_nom
-		else if (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		else if (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank] !=
+			 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank];
+			eff_term_wr =
+			  i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]) / (eff_term_wr + i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank]);
 		    }
 
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 0ODT0 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt0_rank], i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt0_rank]);
 	    }
+//------------------------------------------------------------------------------
 // 0ODT1
-	    if (((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x40) != 0) && ((i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) || (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)))
+	    if (
+		((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x40) != 0)
+		&&
+		((i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) ||
+		 (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+		)
 	    {
-		// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has it enabled)
-		if ((i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) && (i_dimm == 0) && (i_rank == ma0odt1_rank))
+// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has
+// it enabled)
+		if (
+		    (i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank] !=
+		     fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE)
+		    && (i_dimm == 0)
+		    && (i_rank == ma0odt1_rank)
+		    )
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank];
+			eff_term_wr =
+			  i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank]) / (eff_term_wr + i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank]);
 		    }
 		}
-		// dynamic ODT disabled, so use rtt_nom
-		else if (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+// dynamic ODT disabled, so use rtt_nom
+		else if (i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank] !=
+			 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank];
+			eff_term_wr =
+			  i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]) / (eff_term_wr + i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank]);
 		    }
 
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 0ODT1 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma0odt01_dimm][ma0odt1_rank], i_dram_rtt_wr[i_port][ma0odt01_dimm][ma0odt1_rank]);
 	    }
+//------------------------------------------------------------------------------
 // 1ODT0
-	    if (((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x20) != 0) && ((i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) || (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)))
+	    if (
+		((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x20) != 0)
+		&&
+		((i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) ||
+		 (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+		)
 	    {
-		// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has it enabled)
-		if ((i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) && (i_dimm == 1) && (i_rank == ma1odt0_rank))
+// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has
+// it enabled)
+		if (
+		    (i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank] !=
+		     fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE)
+		    && (i_dimm == 1)
+		    && (i_rank == ma1odt0_rank)
+		    )
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank];
+			eff_term_wr =
+			  i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank]) / (eff_term_wr + i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank]);
 		    }
 		}
 		// dynamic ODT disabled, so use rtt_nom
-		else if (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		else if (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank] !=
+			 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank];
+			eff_term_wr =
+			  i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]) / (eff_term_wr + i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank]);
 		    }
 
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 1ODT0 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt0_rank], i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt0_rank]);
 	    }
+//------------------------------------------------------------------------------
 // 1ODT1
-	    if (((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x10) != 0) && ((i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) || (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)))
+	    if (
+		((i_dimm_rank_odt_wr[i_port][i_dimm][i_rank] & 0x10) != 0)
+		&&
+		((i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) ||
+		 (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank] !=
+		  fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE))
+		)
 	    {
-		// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has it enabled)
-		if ((i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE) && (i_dimm == 1) && (i_rank == ma1odt1_rank))
+// dynamic ODT enabled, so use rtt_wr (only if the rank being written to has
+// it enabled)
+		if (
+		    (i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank] !=
+		     fapi::ENUM_ATTR_EFF_DRAM_RTT_WR_DISABLE)
+		    && (i_dimm == 1)
+		    && (i_rank == ma1odt1_rank)
+		    )
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank];
+			eff_term_wr =
+			  i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank]) / (eff_term_wr + i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank]);
 		    }
 		}
 		// dynamic ODT disabled, so use rtt_nom
-		else if (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank] != fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
+		else if (i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank] !=
+			 fapi::ENUM_ATTR_EFF_DRAM_RTT_NOM_DISABLE)
 		{
 		    if (eff_term_wr == 0)
 		    {
-			eff_term_wr = i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank];
+			eff_term_wr =
+			  i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank];
 		    }
 		    else
 		    {
-			eff_term_wr = (eff_term_wr * i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]) / (eff_term_wr + i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]);
+			eff_term_wr =
+			  (eff_term_wr *
+			   i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank])
+			  /
+			  (eff_term_wr +
+			   i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank]);
 		    }
 
 		}
 		FAPI_DBG("[P%d:D%d:R%d] 1ODT1 WR TERMINATION = %4.2f (%d/%d)", i_port, i_dimm, i_rank, eff_term_wr, i_dram_rtt_nom[i_port][ma1odt01_dimm][ma1odt1_rank], i_dram_rtt_wr[i_port][ma1odt01_dimm][ma1odt1_rank]);
 	    }
 
+
 // Translate enum value to a resistance value for i_cen_dq_dqs_drv_imp[i_port]
-	    rc = mss_eff_config_thermal_get_cen_drv_value(
-							  i_cen_dq_dqs_drv_imp[i_port],
-							  cen_dq_dqs_drv_imp_value
-							  );
-	    if(rc)
+	    rc = mss_eff_config_thermal_get_cen_drv_value
+	      (
+	       i_cen_dq_dqs_drv_imp[i_port],
+	       cen_dq_dqs_drv_imp_value
+	       );
+	    if (rc)
 	    {
 		FAPI_ERR("Error (0x%x) calling mss_eff_config_thermal_get_cen_drv_value", static_cast<uint32_t>(rc));
 		return rc;
@@ -1101,7 +1801,9 @@ extern "C" {
 
 	    if (eff_term_wr != 0)
 	    {
-		eff_net_term_wr = (float(eff_term_wr * cen_dq_dqs_drv_imp_value) / (eff_term_wr + cen_dq_dqs_drv_imp_value)) + eff_term_wr;
+		eff_net_term_wr =
+		  (float(eff_term_wr * cen_dq_dqs_drv_imp_value) /
+		   (eff_term_wr + cen_dq_dqs_drv_imp_value)) + eff_term_wr;
 		term_odt_mult_wr = 1.25;
 	    }
 	    else
@@ -1110,41 +1812,69 @@ extern "C" {
 		term_odt_mult_wr = 1;
 	    }
 
+//------------------------------------------------------------------------------
 // From Warren:
-// Termination power = (voltage/net termination) * number of nets * (% of traffic on bus*1.25)
-// The net termination is the effective termination that exists between the power rail and ground. So in my calculations this is all the active termination in parallel with the driver impedance + all the active termination in parallel. The value is different for reads and writes. 
+// Termination power = (voltage/net termination) * number of nets *
+// (% of traffic on bus*1.25)
+// The net termination is the effective termination that exists between the
+// power rail and ground. So in my calculations this is all the active
+// termination in parallel with the driver impedance + all the active
+//  termination in parallel. The value is different for reads and writes. 
 // Number of nets includes the strobe nets (2 nets per strobe)
-// % of traffic on bus is the % of the bus used for data traffic split out from reads and writes. The 1.25 factor is due to the odt_en signals being active longer then the data windows.
+// % of traffic on bus is the % of the bus used for data traffic split out from
+// reads and writes. The 1.25 factor is due to the odt_en signals being active
+// longer then the data windows.
 // Value here is in Watts (W)
-	    o_dimm_power_adder_termination = float(i_dimm_voltage) / 1000 * (((float(i_dimm_voltage) / 1000 / eff_net_term_rd) * (number_nets_term_rd) * (float(ACTIVE_DIMM_UTILIZATION) / 100) * (float(DATA_BUS_READ_PERCENT) / 100) * (term_odt_mult_rd)) + ((float(i_dimm_voltage) / 1000 / eff_net_term_wr) * (number_nets_term_wr) * (float(ACTIVE_DIMM_UTILIZATION) / 100) * (float(DATA_BUS_WRITE_PERCENT) / 100) * (term_odt_mult_wr)));
+	    o_dimm_power_adder_termination =
+	      float(i_dimm_voltage) / 1000
+	      *
+	      (
+	       ((float(i_dimm_voltage) / 1000 / eff_net_term_rd) *
+		(number_nets_term_rd) *
+		(float(ACTIVE_DIMM_UTILIZATION) / 100) *
+		(float(DATA_BUS_READ_PERCENT) / 100) * (term_odt_mult_rd))
+	       +
+	       ((float(i_dimm_voltage) / 1000 / eff_net_term_wr) *
+		(number_nets_term_wr) *
+		(float(ACTIVE_DIMM_UTILIZATION) / 100) *
+		(float(DATA_BUS_WRITE_PERCENT) / 100) * (term_odt_mult_wr))
+	       );
 	    FAPI_DBG("%s TERM:[P%d:D%d:R%d] CEN[DRV=%d RCV=%d] DRAM[DRV=%d ODT_RD=%4.2f ODT_WR=%4.2f]", i_nom_or_wc_term, i_port, i_dimm, i_rank, cen_dq_dqs_drv_imp_value, i_cen_dq_dqs_rcv_imp[i_port], i_dimm_dram_ron[i_port][i_dimm], eff_term_rd, eff_term_wr);
 	    FAPI_DBG("%s TERM POWER:[P%d:D%d:R%d] RD[Nets=%d EffTerm=%3.2f ODTMult=%1.2f] WR[Nets=%d EffTerm=%3.2f ODTMult=%1.2f] TermPower(%d%%)=%2.2f W", i_nom_or_wc_term, i_port, i_dimm, i_rank, number_nets_term_rd, eff_net_term_rd, term_odt_mult_rd, number_nets_term_wr, eff_net_term_wr, term_odt_mult_wr, ACTIVE_DIMM_UTILIZATION, o_dimm_power_adder_termination);
 	}	
 
+	FAPI_IMP("*** %s COMPLETE ***", procedure_name);
 	return rc;
     }
 
 //------------------------------------------------------------------------------
-// @brief mss_eff_config_thermal_get_wc_term(): This function finds the worst case termination settings possible for a given set
-//           of termination settings
+// @brief mss_eff_config_thermal_get_wc_term(): This function finds the worst
+// case termination settings possible for a given set of termination settings
 //
-// @param    const fapi::Target &i_target_mba:  MBA Target
-// @param    uint8_t i_port:  MBA port being worked on
-// @param    uint8_t &o_cen_dq_dqs_rcv_imp_wc:  Worst Case Centaur DQ/DQS receiver impedance (output)
-// @param    uint8_t &o_cen_dq_dqs_drv_imp_wc:  Worst Case Centaur DQ/DQS driver impedance (output)
+// @param[in]	const fapi::Target &i_target_mba:  MBA Target
+// @param[in]   uint8_t i_port:  MBA port being worked on
+// @param[out]  uint8_t &o_cen_dq_dqs_rcv_imp_wc:  Worst Case Centaur DQ/DQS
+//              receiver impedance (output)
+// @param[out]  uint8_t &o_cen_dq_dqs_drv_imp_wc:  Worst Case Centaur DQ/DQS 
+//              driver impedance (output)
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
 
-    fapi::ReturnCode mss_eff_config_thermal_get_wc_term(
-							const fapi::Target &i_target_mba,
-							uint8_t i_port,
-							uint8_t &o_cen_dq_dqs_rcv_imp_wc,
-							uint8_t &o_cen_dq_dqs_drv_imp_wc
-							)
+    fapi::ReturnCode mss_eff_config_thermal_get_wc_term
+      (
+       const fapi::Target &i_target_mba,
+       uint8_t i_port,
+       uint8_t &o_cen_dq_dqs_rcv_imp_wc,
+       uint8_t &o_cen_dq_dqs_drv_imp_wc
+       )
     {
 	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
 
+	char procedure_name[32];
+	sprintf(procedure_name, "mss_eff_config_thermal_get_wc_term");
+	FAPI_IMP("*** Running %s ***", procedure_name);
+
 	uint8_t l_cen_dq_dqs_rcv_imp[NUM_PORTS];
 	uint8_t l_cen_dq_dqs_drv_imp[NUM_PORTS];
 	uint32_t l_cen_dq_dqs_rcv_imp_schmoo[NUM_PORTS];
@@ -1152,8 +1882,10 @@ extern "C" {
 	uint32_t l_loop;
 	uint32_t l_schmoo_mask;
 
-// This lists out the number and enum values for the centaur dq/dqs receiver and driver impedance.  Have the list go from strongest to weakest termination.
-// If the size changes at all, then updates are needed below to get the correct mask
+// This lists out the number and enum values for the centaur dq/dqs receiver and
+// driver impedance.  Have the list go from strongest to weakest termination.
+// If the size changes at all, then updates are needed below to get the correct
+// mask
 
 	const uint8_t MAX_CEN_RCV_IMP = 10;
 	uint8_t cen_rcv_imp_array[] = {
@@ -1189,21 +1921,39 @@ extern "C" {
 	    fapi::ENUM_ATTR_EFF_CEN_DRV_IMP_DQ_DQS_OHM40_FFE120
 	};
 
+
 // Get attributes for nominal settings and possible settings to choose from
-	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS, &i_target_mba, l_cen_dq_dqs_rcv_imp);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS, &i_target_mba, l_cen_dq_dqs_drv_imp);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_cen_dq_dqs_rcv_imp_schmoo);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO, &i_target_mba, l_cen_dq_dqs_drv_imp_schmoo);
-	if(rc) return rc;
+	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS,
+			   &i_target_mba, l_cen_dq_dqs_rcv_imp);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_CEN_RCV_IMP_DQ_DQS");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS,
+			   &i_target_mba, l_cen_dq_dqs_drv_imp);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_CEN_DRV_IMP_DQ_DQS");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO,
+			   &i_target_mba, l_cen_dq_dqs_rcv_imp_schmoo);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO,
+			   &i_target_mba, l_cen_dq_dqs_drv_imp_schmoo);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO");
+	    return rc;
+	}
 
 // initialize to default values in case below does not find a match
 	o_cen_dq_dqs_rcv_imp_wc = l_cen_dq_dqs_rcv_imp[i_port];
 	o_cen_dq_dqs_drv_imp_wc = l_cen_dq_dqs_drv_imp[i_port];
 
-// find strongest termination setting that could be used, if none found, then use nominal
+// find strongest termination setting that could be used, if none found, then
+// use nominal
 	l_schmoo_mask = 0x00000000;
 	for (l_loop=0; l_loop < MAX_CEN_RCV_IMP; l_loop++)
 	{
@@ -1312,27 +2062,35 @@ extern "C" {
 	    }
 	}
 
+	FAPI_IMP("*** %s COMPLETE ***", procedure_name);
 	return rc;
     }
 
 
 //------------------------------------------------------------------------------
-// @brief mss_eff_config_thermal_get_cen_drv_value(): This function will translate
-//           the centaur driver impedance enum value to a termination resistance
+// @brief mss_eff_config_thermal_get_cen_drv_value(): This function will
+// translate the centaur driver impedance enum value to a termination resistance
 //
-// @param    uint8_t &i_cen_dq_dqs_drv_imp:  Centaur DQ/DQS driver impedance enum setting (input)
-// @param    uint8_t &o_cen_dq_dqs_drv_imp:  Centaur DQ/DQS driver impedance value (output)
+// @param[in]	uint8_t &i_cen_dq_dqs_drv_imp:  Centaur DQ/DQS driver impedance
+//           enum setting (input)
+// @param[out]  uint8_t &o_cen_dq_dqs_drv_imp:  Centaur DQ/DQS driver impedance
+//           value (output)
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
 
-    fapi::ReturnCode mss_eff_config_thermal_get_cen_drv_value(
-							      uint8_t i_cen_dq_dqs_drv_imp,
-							      uint8_t &o_cen_dq_dqs_drv_imp
-							      )
+    fapi::ReturnCode mss_eff_config_thermal_get_cen_drv_value
+      (
+       uint8_t i_cen_dq_dqs_drv_imp,
+       uint8_t &o_cen_dq_dqs_drv_imp
+       )
     {
 	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
 
+	char procedure_name[32];
+	sprintf(procedure_name, "mss_eff_config_thermal_get_cen_drv_value");
+	FAPI_IMP("*** Running %s ***", procedure_name);
+
 	switch (i_cen_dq_dqs_drv_imp)
 	{
 	    case fapi::ENUM_ATTR_EFF_CEN_DRV_IMP_DQ_DQS_OHM24_FFE0:
@@ -1387,6 +2145,7 @@ extern "C" {
 		o_cen_dq_dqs_drv_imp = 24;
 	}
 
+	FAPI_IMP("*** %s COMPLETE ***", procedure_name);
 	return rc;
     }
 
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.H b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.H
index f4d7c7861..5c80a9451 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.H
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,8 +20,9 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_eff_config_thermal.H,v 1.4 2012/10/15 13:05:10 pardeik Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_eff_config_thermal.H,v $
+// $Id: mss_eff_config_thermal.H,v 1.5 2012/12/12 20:10:37 pardeik Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/
+//          centaur/working/procedures/ipl/fapi/mss_eff_config_thermal.H,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -42,6 +43,8 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//   1.5   | pardeik  |03-DEC-12| update lines to have a max width of 80 chars
+//         |          |         | removed variable names in typedef
 //   1.4   | pardeik  |11-OCT-12| change i_target to i_target_mba
 //   1.3   | pardeik  |03-APR-12| use mba target instead of mbs
 //   1.2   | pardeik  |26-MAR-12| Removed structure (going into .C file)
@@ -49,27 +52,29 @@
 //   1.1   | asaetow  |03-NOV-11| First Draft.
 
 
-
 #ifndef MSS_EFF_CONFIG_THERMAL_H_
 #define MSS_EFF_CONFIG_THERMAL_H_
 
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 //  Includes
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 #include <fapi.H>
 
-
-typedef fapi::ReturnCode (*mss_eff_config_thermal_FP_t)(const fapi::Target & i_target_mba);
+typedef fapi::ReturnCode (*mss_eff_config_thermal_FP_t)
+(
+ const fapi::Target &
+ );
 
 
 extern "C" {
-/**
- * @brief mss_eff_config_thermal procedure. Sets up dimm power curve attributes and dimm and channel throttle attributes
- *
- * @param[in]  i_target_mba  Reference to centaur mba target
- *
- * @return ReturnCode
- */
+//------------------------------------------------------------------------------
+// @brief mss_eff_config_thermal procedure. Sets up dimm power curve attributes
+//  and dimm and channel throttle attributes
+//
+// @param[in]  i_target_mba  Reference to centaur mba target
+//
+// @return ReturnCode
+//------------------------------------------------------------------------------
 
     fapi::ReturnCode mss_eff_config_thermal(const fapi::Target & i_target_mba);
 
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C
index b8c1211dd..5fc5e4d70 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,8 +20,9 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_throttle_to_power.C,v 1.8 2012/10/31 13:40:27 pardeik Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_throttle_to_power.C,v $
+// $Id: mss_throttle_to_power.C,v 1.9 2012/12/12 20:10:47 pardeik Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/
+//          centaur/working/procedures/ipl/fapi/mss_throttle_to_power.C,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -36,7 +37,8 @@
 // applicable CQ component memory_screen
 //
 // DESCRIPTION:
-// The purpose of this procedure is to set the power attributes for each dimm and channel pair
+// The purpose of this procedure is to set the power attributes for each dimm
+// and channel pair
 //
 //------------------------------------------------------------------------------
 // Don't forget to create CVS comments when you check in your changes!
@@ -45,16 +47,28 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
-//   1.8   | pardeik  |25-OCT-12| updated FAPI_ERR sections, added CQ component comment line
-//   1.7   | pardeik  |19-OCT-12| use ATTR_MSS_CHANNEL_PAIR_MAXPOWER instead of ATTR_MSS_CHANNEL_MAXPOWER
-//         | pardeik  |19-OCT-12| multiple throttle N values by 4 to get dram utilization
-//   1.6   | pardeik  |11-OCT-12| updated to use new throttle attributes, made function mss_throttle_to_power_calc
+//   1.9   | pardeik  |04-DEC-12| update lines to have a max width of 80 chars
+//         |          |         | added FAPI_ERR before return code lines
+//         |          |         | made trace statements for procedures FAPI_IMP
+//   1.8   | pardeik  |25-OCT-12| updated FAPI_ERR sections, added CQ component
+//         |          |         | comment line
+//   1.7   | pardeik  |19-OCT-12| use ATTR_MSS_CHANNEL_PAIR_MAXPOWER instead of
+//         |          |         | ATTR_MSS_CHANNEL_MAXPOWER
+//         | pardeik  |19-OCT-12| multiple throttle N values by 4 to get dram
+//         |          |         | utilization
+//   1.6   | pardeik  |11-OCT-12| updated to use new throttle attributes, made
+//         |          |         | function mss_throttle_to_power_calc
 //   1.5   | pardeik  |10-APR-12| power calculation updates and fixes
 //   1.5   | pardeik  |10-APR-12| power calculation updates and fixes
-//   1.4   | pardeik  |04-APR-12| moved cdimm power calculation to end of section instead of having it in multiple places
-//   1.3   | pardeik  |04-APR-12| use else if instead of if after checking throttle denominator to zero
-//   1.2   | pardeik  |03-APR-12| use mba target intead of mbs, added cdimm power calculation for half of cdimm
-//   1.1   | pardeik  |01-APR-11| Updated to use attributes and fapi functions to loop through ports/dimms
+//   1.4   | pardeik  |04-APR-12| moved cdimm power calculation to end of
+//         |          |         | section instead of having it in multiple
+//         |          |         | places
+//   1.3   | pardeik  |04-APR-12| use else if instead of if after checking
+//         |          |         | throttle denominator to zero
+//   1.2   | pardeik  |03-APR-12| use mba target intead of mbs, added cdimm
+//         |          |         | power calculation for half of cdimm
+//   1.1   | pardeik  |01-APR-11| Updated to use attributes and fapi functions
+//         |          |         | to loop through ports/dimms
 //         | pardeik  |01-DEC-11| First Draft.
 
 
@@ -63,9 +77,9 @@
 //------------------------------------------------------------------------------
 #include <mss_throttle_to_power.H>
 
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 //  Includes
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 #include <fapi.H>
 
 
@@ -79,19 +93,22 @@ extern "C" {
 //------------------------------------------------------------------------------
     fapi::ReturnCode mss_throttle_to_power(const fapi::Target & i_target_mba);
 
-    fapi::ReturnCode mss_throttle_to_power_calc(
-						const fapi::Target &i_target_mba,
-						uint32_t i_throttle_n_per_mba,
-						uint32_t i_throttle_n_per_chip,
-						uint32_t i_throttle_d,
-						float &channel_pair_power
-						);
+    fapi::ReturnCode mss_throttle_to_power_calc
+      (
+       const fapi::Target &i_target_mba,
+       uint32_t i_throttle_n_per_mba,
+       uint32_t i_throttle_n_per_chip,
+       uint32_t i_throttle_d,
+       float &channel_pair_power
+       );
 
 
 //------------------------------------------------------------------------------
-// @brief mss_throttle_to_power(): This function will get the throttle attributes and call another function to determine the dimm and channel pair power based on those throttles
+// @brief mss_throttle_to_power(): This function will get the throttle
+// attributes and call another function to determine the dimm and channel pair
+// power based on those throttles
 //
-// @param    const fapi::Target &i_target_mba:  MBA Target
+// @param[in]	const fapi::Target &i_target_mba:  MBA Target
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
@@ -102,7 +119,7 @@ extern "C" {
 
 	char procedure_name[32];
 	sprintf(procedure_name, "mss_throttle_to_power");
-	FAPI_INF("*** Running %s ***", procedure_name);
+	FAPI_IMP("*** Running %s ***", procedure_name);
 
 	uint32_t throttle_n_per_mba;
 	uint32_t throttle_n_per_chip;
@@ -110,12 +127,24 @@ extern "C" {
 	float channel_pair_power;
 
 // Get input attributes
-	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA, &i_target_mba, throttle_n_per_mba);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP, &i_target_mba, throttle_n_per_chip);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR, &i_target_mba, throttle_d);
-	if(rc) return rc;
+	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA,
+			   &i_target_mba, throttle_n_per_mba);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP,
+			   &i_target_mba, throttle_n_per_chip);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_MEM_THROTTLE_DENOMINATOR,
+			   &i_target_mba, throttle_d);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_MEM_THROTTLE_DENOMINATOR");
+	    return rc;
+	}
 
 // Call function mss_throttle_to_power_calc
 	rc = mss_throttle_to_power_calc(
@@ -125,13 +154,13 @@ extern "C" {
 					throttle_d,
 					channel_pair_power
 					);
-	if(rc)
+	if (rc)
 	{
 	    FAPI_ERR("Error (0x%x) calling mss_throttle_to_power_calc", static_cast<uint32_t>(rc));
 	    return rc;
 	}
 
-	FAPI_INF("*** %s COMPLETE ***", procedure_name);
+	FAPI_IMP("*** %s COMPLETE ***", procedure_name);
 	return rc;
 
     }
@@ -139,31 +168,41 @@ extern "C" {
 
 
 //------------------------------------------------------------------------------
-// @brief mss_throttle_to_power_calc(): This function will calculate the dimm and channel pair power and update attributes with the power values
+// @brief mss_throttle_to_power_calc(): This function will calculate the dimm
+// and channel pair power and update attributes with the power values
 //
-// @param    const fapi::Target &i_target_mba:  MBA Target
-// @param    uint32_t i_throttle_n_per_mba:  Throttle value for cfg_nm_n_per_mba
-// @param    uint32_t i_throttle_n_per_chip:  Throttle value for cfg_nm_n_per_chip
-// @param    uint32_t i_throttle_d:  Throttle value for cfg_nm_m
-// @param    float &o_channel_pair_power:  channel pair power at these throttle settings
+// @param[in]   const fapi::Target &i_target_mba:  MBA Target
+// @param[in]   uint32_t i_throttle_n_per_mba:  Throttle value for
+//              cfg_nm_n_per_mba
+// @param[in]   uint32_t i_throttle_n_per_chip:  Throttle value for
+//              cfg_nm_n_per_chip
+// @param[in]	uint32_t i_throttle_d:  Throttle value for cfg_nm_m
+// @param[out]  float &o_channel_pair_power:  channel pair power at these
+//              throttle settings
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
 
-    fapi::ReturnCode mss_throttle_to_power_calc(
-						const fapi::Target &i_target_mba,
-						uint32_t i_throttle_n_per_mba,
-						uint32_t i_throttle_n_per_chip,
-						uint32_t i_throttle_d,
-						float &o_channel_pair_power
-						)
+    fapi::ReturnCode mss_throttle_to_power_calc
+      (
+       const fapi::Target &i_target_mba,
+       uint32_t i_throttle_n_per_mba,
+       uint32_t i_throttle_n_per_chip,
+       uint32_t i_throttle_d,
+       float &o_channel_pair_power
+       )
     {
 	fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS;
 
-	const uint8_t MAX_NUM_PORTS = 2;			// number of ports per MBA
-	const uint8_t MAX_NUM_DIMMS = 2;			// number of dimms per MBA port
+	char procedure_name[32];
+	sprintf(procedure_name, "mss_throttle_to_power_calc");
+	FAPI_IMP("*** Running %s ***", procedure_name);
+
+	const uint8_t MAX_NUM_PORTS = 2;
+	const uint8_t MAX_NUM_DIMMS = 2;
+// Maximum theoretical data bus utilization (percent of max) (for ceiling)
 // If this is changed, also change mss_bulk_pwr_throttles MAX_UTIL
-	const float MAX_UTIL = 75;				// Maximum theoretical data bus utilization (percent of max) (for ceiling)
+	const float MAX_UTIL = 75;				
 
 	uint32_t l_power_slope_array[MAX_NUM_PORTS][MAX_NUM_DIMMS];
 	uint32_t l_power_int_array[MAX_NUM_PORTS][MAX_NUM_DIMMS];
@@ -179,16 +218,33 @@ extern "C" {
 	uint8_t l_num_dimms_on_port;
 
 // get input attributes
-	rc = FAPI_ATTR_GET(ATTR_MSS_POWER_SLOPE, &i_target_mba, l_power_slope_array);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_MSS_POWER_INT, &i_target_mba, l_power_int_array);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM, &i_target_mba, l_dimm_ranks_array);
-	if(rc) return rc;
-	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT, &i_target_mba, l_num_dimms_on_port);
-	if(rc) return rc;
-
-// add up the power from all dimms for this MBA (across both channels) using the throttle values
+	rc = FAPI_ATTR_GET(ATTR_MSS_POWER_SLOPE,
+			   &i_target_mba, l_power_slope_array);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_POWER_SLOPE");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_MSS_POWER_INT,
+			   &i_target_mba, l_power_int_array);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_MSS_POWER_INT");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM,
+			   &i_target_mba, l_dimm_ranks_array);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_NUM_RANKS_PER_DIMM");
+	    return rc;
+	}
+	rc = FAPI_ATTR_GET(ATTR_EFF_NUM_DROPS_PER_PORT,
+			   &i_target_mba, l_num_dimms_on_port);
+	if (rc) {
+	    FAPI_ERR("Error getting attribute ATTR_EFF_NUM_DROPS_PER_PORT");
+	    return rc;
+	}
+
+// add up the power from all dimms for this MBA (across both channels) using the
+// throttle values
 	o_channel_pair_power = 0;
 	l_channel_pair_power_integer = 0;
 	for (l_port = 0; l_port < MAX_NUM_PORTS; l_port++)
@@ -204,73 +260,114 @@ extern "C" {
 // See if there are any ranks present on the dimm (configured or deconfigured)
 		if (l_dimm_ranks_array[l_port][l_dimm] > 0)
 		{
-// N/M throttling has the dimm0 and dimm1 throttles the same for DIMM level throttling, which we plan to use
-// MBA or chip level throttling could limit the commands to a dimm (used along with the dimm level throttling)
+// N/M throttling has the dimm0 and dimm1 throttles the same for DIMM level
+// throttling, which we plan to use
+// MBA or chip level throttling could limit the commands to a dimm (used along
+// with the dimm level throttling)
 // If MBA/chip throttle is less than dimm throttle, then use MBA/chip throttle
-// If MBA/chip throttle is greater than dimm throttle, then use the dimm throttle
+// If MBA/chip throttle is greater than dimm throttle, then use the dimm
+// throttle
 // If either of these are above the MAX_UTIL, then use MAX_UTIL
 // Get power from each dimm here
-// Note that the MAX_UTIL effectively is the percent of maximum bandwidth for that dimm
+// Note that the MAX_UTIL effectively is the percent of maximum bandwidth for
+// that dimm
 
 		    if (i_throttle_d == 0)
 		    {
-			    // throttle denominator is zero (N/M throttling disabled), set dimm power to the maximum
+// throttle denominator is zero (N/M throttling disabled), set dimm power to the
+// maximum
 			FAPI_DBG("N/M Throttling is disabled (M=0).  Use Max DIMM Power");
-			l_dimm_power_array[l_port][l_dimm] = (l_power_slope_array[l_port][l_dimm] * ((float)MAX_UTIL / 100) + l_power_int_array[l_port][l_dimm]);
+			l_dimm_power_array[l_port][l_dimm] =
+			  (l_power_slope_array[l_port][l_dimm] *
+			   ((float)MAX_UTIL / 100) +
+			   l_power_int_array[l_port][l_dimm]);
 			l_utilization = (float)MAX_UTIL;
 		    }
-		    else if ((((float)i_throttle_n_per_mba * 100 * 4) / i_throttle_d * l_num_dimms_on_port) > (((float)i_throttle_n_per_chip * 100 * 4) / i_throttle_d))
+		    else if (
+			     (
+			      ((float)i_throttle_n_per_mba * 100 * 4) /
+			      i_throttle_d *
+			      l_num_dimms_on_port
+			      )
+			     >
+			     (((float)i_throttle_n_per_chip * 100 * 4) /
+			      i_throttle_d)
+			     )
 		    {
-			// limited by the mba/chip throttles (ie.  cfg_nm_n_per_chip)
-			if ((((float)i_throttle_n_per_chip * 100 * 4) / i_throttle_d) > MAX_UTIL)
+// limited by the mba/chip throttles (ie.  cfg_nm_n_per_chip)
+			if ((((float)i_throttle_n_per_chip * 100 * 4) /
+			     i_throttle_d) > MAX_UTIL)
 			{
-			    // limited by the maximum utilization
-			    l_dimm_power_array[l_port][l_dimm] = (l_power_slope_array[l_port][l_dimm] * ((float)MAX_UTIL / 100) + l_power_int_array[l_port][l_dimm]);
+// limited by the maximum utilization
+			    l_dimm_power_array[l_port][l_dimm] =
+			      (l_power_slope_array[l_port][l_dimm] *
+			       ((float)MAX_UTIL / 100) +
+			       l_power_int_array[l_port][l_dimm]);
 			    l_utilization = (float)MAX_UTIL;
 			}
 			else
 			{
-			    // limited by the per chip throttles
-			    l_dimm_power_array[l_port][l_dimm] = (l_power_slope_array[l_port][l_dimm] * (((float)i_throttle_n_per_chip * 4) / i_throttle_d) + l_power_int_array[l_port][l_dimm]);
-			    l_utilization = (((float)i_throttle_n_per_chip * 100 * 4) / i_throttle_d);
+// limited by the per chip throttles
+			    l_dimm_power_array[l_port][l_dimm] =
+			      (l_power_slope_array[l_port][l_dimm] *
+			       (((float)i_throttle_n_per_chip * 4)
+				/ i_throttle_d) +
+			       l_power_int_array[l_port][l_dimm]);
+			    l_utilization = (((float)i_throttle_n_per_chip *
+					      100 * 4) / i_throttle_d);
 			}
 		    }
 		    else
 		    {
-			// limited by the per mba throttles (ie.  cfg_nm_n_per_mba)
-			if ((((float)i_throttle_n_per_mba * 100 * 4) / i_throttle_d * l_num_dimms_on_port) > MAX_UTIL)
+// limited by the per mba throttles (ie.  cfg_nm_n_per_mba)
+			if ((((float)i_throttle_n_per_mba * 100 * 4) /
+			     i_throttle_d * l_num_dimms_on_port) > MAX_UTIL)
 			{
-			    // limited by the maximum utilization
-			    l_dimm_power_array[l_port][l_dimm] = (l_power_slope_array[l_port][l_dimm] * ((float)MAX_UTIL / 100) + l_power_int_array[l_port][l_dimm]);
+// limited by the maximum utilization
+			    l_dimm_power_array[l_port][l_dimm] =
+			      (l_power_slope_array[l_port][l_dimm] *
+			       ((float)MAX_UTIL / 100) +
+			       l_power_int_array[l_port][l_dimm]);
 			    l_utilization = (float)MAX_UTIL;
 			}
 			else
 			{
-			    // limited by the per mba throttles
-			    // multiply by number of dimms on port since other dimm has same throttle value
-			    l_dimm_power_array[l_port][l_dimm] = (l_power_slope_array[l_port][l_dimm] * (((float)i_throttle_n_per_mba * 4) / i_throttle_d * l_num_dimms_on_port) + l_power_int_array[l_port][l_dimm]);
-			    l_utilization = (((float)i_throttle_n_per_mba * 100 * 4) / i_throttle_d * l_num_dimms_on_port);
+// limited by the per mba throttles
+// multiply by number of dimms on port since other dimm has same throttle value
+			    l_dimm_power_array[l_port][l_dimm] =
+			      (l_power_slope_array[l_port][l_dimm] *
+			       (((float)i_throttle_n_per_mba * 4) /
+				i_throttle_d * l_num_dimms_on_port) +
+			       l_power_int_array[l_port][l_dimm]);
+			    l_utilization =
+			      (((float)i_throttle_n_per_mba * 100 * 4) /
+			       i_throttle_d * l_num_dimms_on_port);
 			}
 		    }
 		}
 // Get dimm power in integer format (add on 1 since value will get truncated)
 		if (l_dimm_power_array[l_port][l_dimm] > 0)
 		{
-		    l_dimm_power_array_integer[l_port][l_dimm] = (int)l_dimm_power_array[l_port][l_dimm] + 1;
+		    l_dimm_power_array_integer[l_port][l_dimm] =
+		      (int)l_dimm_power_array[l_port][l_dimm] + 1;
 		}
 // calculate channel power by adding up the power of each dimm
-		l_channel_power_array[l_port] = l_channel_power_array[l_port] + l_dimm_power_array[l_port][l_dimm];
+		l_channel_power_array[l_port] = l_channel_power_array[l_port] +
+		  l_dimm_power_array[l_port][l_dimm];
 		FAPI_DBG("[P%d:D%d][CH Util %4.2f/%4.2f][Slope:Int %d:%d][Power %4.2f cW]", l_port, l_dimm, l_utilization, MAX_UTIL, l_power_slope_array[l_port][l_dimm], l_power_int_array[l_port][l_dimm], l_dimm_power_array[l_port][l_dimm]);
 	    }
 	    FAPI_DBG("[P%d][Power %4.2f cW]", l_port, l_channel_power_array[l_port]);
 	}
-// get the channel pair power for this MBA (add on 1 since value will get truncated)
+// get the channel pair power for this MBA (add on 1 since value will get
+// truncated)
 	for (l_port = 0; l_port < MAX_NUM_PORTS; l_port++)
 	{
-	    o_channel_pair_power = o_channel_pair_power + l_channel_power_array[l_port];
+	    o_channel_pair_power = o_channel_pair_power +
+	      l_channel_power_array[l_port];
 	    if (l_channel_power_array_integer[l_port] > 0)
 	    {
-		l_channel_power_array_integer[l_port] = (int)l_channel_power_array[l_port] + 1;
+		l_channel_power_array_integer[l_port] =
+		  (int)l_channel_power_array[l_port] + 1;
 	    }
 	}
 	FAPI_DBG("Channel Pair Power %4.2f cW]", o_channel_pair_power);
@@ -279,13 +376,22 @@ extern "C" {
 	{
 	    l_channel_pair_power_integer = (int)o_channel_pair_power + 1;
 	}
-
+//------------------------------------------------------------------------------
 // Update output attributes
-	rc = FAPI_ATTR_SET(ATTR_MSS_DIMM_MAXPOWER, &i_target_mba, l_dimm_power_array_integer);
-	if(rc) return rc;
-	rc = FAPI_ATTR_SET(ATTR_MSS_CHANNEL_PAIR_MAXPOWER, &i_target_mba, l_channel_pair_power_integer);
-	if(rc) return rc;
+	rc = FAPI_ATTR_SET(ATTR_MSS_DIMM_MAXPOWER,
+			   &i_target_mba, l_dimm_power_array_integer);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_DIMM_MAXPOWER");
+	    return rc;
+	}
+	rc = FAPI_ATTR_SET(ATTR_MSS_CHANNEL_PAIR_MAXPOWER,
+			   &i_target_mba, l_channel_pair_power_integer);
+	if (rc) {
+	    FAPI_ERR("Error writing attribute ATTR_MSS_CHANNEL_PAIR_MAXPOWER");
+	    return rc;
+	}
 
+	FAPI_IMP("*** %s COMPLETE ***", procedure_name);
 	return rc;
     }
 
diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.H b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.H
index ee9398e70..a46512dc7 100644
--- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.H
+++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2012                   */
+/* COPYRIGHT International Business Machines Corp. 2012,2013              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -20,8 +20,9 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_throttle_to_power.H,v 1.3 2012/10/15 13:05:23 pardeik Exp $
-// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_throttle_to_power.H,v $
+// $Id: mss_throttle_to_power.H,v 1.4 2012/12/12 20:10:50 pardeik Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/
+//          centaur/working/procedures/ipl/fapi/mss_throttle_to_power.H,v $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -42,6 +43,8 @@
 //------------------------------------------------------------------------------
 // Version:|  Author: |  Date:  | Comment:
 //---------|----------|---------|-----------------------------------------------
+//   1.4   | pardeik  |04-DEC-12| update lines to have a max width of 80 chars
+//         |          |         | removed variable names in typedef's
 //   1.3   | pardeik  |11-OCT-12| change i_target to i_target_mba
 //   1.2   | pardeik  |03-APR-12| use mba target instead of mbs
 //   1.1   | pardeik  |01-DEC-11| First Draft.
@@ -51,28 +54,31 @@
 #ifndef MSS_THROTTLE_TO_POWER_H_
 #define MSS_THROTTLE_TO_POWER_H_
 
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 //  Includes
-//----------------------------------------------------------------------
+//------------------------------------------------------------------------------
 #include <fapi.H>
 
-typedef fapi::ReturnCode (*mss_throttle_to_power_FP_t)(const fapi::Target & i_target_mba);
+typedef fapi::ReturnCode (*mss_throttle_to_power_FP_t)(const fapi::Target &);
 
-typedef fapi::ReturnCode (*mss_throttle_to_power_calc_FP_t)(
-						const fapi::Target &i_target_mba,
-						uint32_t i_throttle_n_per_mba,
-						uint32_t i_throttle_n_per_chip,
-						uint32_t i_throttle_d,
-						float &channel_pair_power
-						);
+typedef fapi::ReturnCode (*mss_throttle_to_power_calc_FP_t)
+(
+ const fapi::Target &,
+ uint32_t,
+ uint32_t,
+ uint32_t,
+ float &
+ );
 
 extern "C"
 {
 
 //------------------------------------------------------------------------------
-// @brief mss_throttle_to_power(): This function will get the throttle attributes and call another function to determine the dimm and channel pair power based on those throttles
+// @brief mss_throttle_to_power(): This function will get the throttle
+// attributes and call another function to determine the dimm and channel pair
+// power based on those throttles
 //
-// @param    const fapi::Target &i_target_mba:  MBA Target
+// @param[in]	const fapi::Target &i_target_mba:  MBA Target
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
@@ -80,24 +86,29 @@ extern "C"
     fapi::ReturnCode mss_throttle_to_power(const fapi::Target & i_target_mba);
 
 //------------------------------------------------------------------------------
-// @brief mss_throttle_to_power_calc(): This function will calculate the dimm and channel pair power and update attributes with the power values
+// @brief mss_throttle_to_power_calc(): This function will calculate the dimm
+// and channel pair power and update attributes with the power values
 //
-// @param    const fapi::Target &i_target_mba:  MBA Target
-// @param    uint32_t i_throttle_n_per_mba:  Throttle value for cfg_nm_n_per_mba
-// @param    uint32_t i_throttle_n_per_chip:  Throttle value for cfg_nm_n_per_chip
-// @param    uint32_t i_throttle_d:  Throttle value for cfg_nm_m
-// @param    float &o_channel_pair_power:  channel pair power at these throttle settings
+// @param[in]   const fapi::Target &i_target_mba:  MBA Target
+// @param[in]   uint32_t i_throttle_n_per_mba:  Throttle value for
+//              cfg_nm_n_per_mba
+// @param[in]   uint32_t i_throttle_n_per_chip:  Throttle value for
+//              cfg_nm_n_per_chip
+// @param[in]   uint32_t i_throttle_d:  Throttle value for cfg_nm_m
+// @param[out]	float &o_channel_pair_power:  channel pair power at these
+//              throttle settings
 //
 // @return fapi::ReturnCode
 //------------------------------------------------------------------------------
 
-    fapi::ReturnCode mss_throttle_to_power_calc(
-						const fapi::Target &i_target_mba,
-						uint32_t i_throttle_n_per_mba,
-						uint32_t i_throttle_n_per_chip,
-						uint32_t i_throttle_d,
-						float &channel_pair_power
-						);
+    fapi::ReturnCode mss_throttle_to_power_calc
+      (
+       const fapi::Target &i_target_mba,
+       uint32_t i_throttle_n_per_mba,
+       uint32_t i_throttle_n_per_chip,
+       uint32_t i_throttle_d,
+       float &channel_pair_power
+       );
 
 } // extern "C"