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author | Thi Tran <thi@us.ibm.com> | 2013-10-30 07:29:18 -0500 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-11-07 14:32:55 -0600 |
commit | b358e678ef4d95c662965a776b4cbd130e138c85 (patch) | |
tree | 7bbacda350a5c0d0ef7b043ce79defca1f96ba1a /src/usr/hwpf/hwp/dram_training | |
parent | a411f996155b49b049c898af8f68766311316e01 (diff) | |
download | talos-hostboot-b358e678ef4d95c662965a776b4cbd130e138c85.tar.gz talos-hostboot-b358e678ef4d95c662965a776b4cbd130e138c85.zip |
INITPROC: Hostboot - SW230152 mcbist bug fix
Change-Id: I7bf26c87da8bb45d69c542491c03cb0e6ae05275
CQ:SW230152
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6955
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training')
-rw-r--r-- | src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C | 88 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C | 18 |
2 files changed, 97 insertions, 9 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C index e7b4ab1bd..01b24dcee 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_access_delay_reg.C,v 1.19 2013/10/09 11:28:41 sasethur Exp $ +// $Id: mss_access_delay_reg.C,v 1.20 2013/10/22 06:17:40 sasethur Exp $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 // *! All Rights Reserved -- Property of IBM @@ -3170,6 +3170,92 @@ fapi::ReturnCode mss_c4_phy(const fapi::Target & i_target_mba,uint8_t i_port, ui // out.scom_addr=l_scom_address_64; // out.start_bit=l_start_bit; // out.bit_length=l_len; + } else if (i_input_type_e==RD_DQS || i_input_type_e==DQS_GATE || i_input_type_e==RDCLK || i_input_type_e==DQSCLK) + { + + + if(i_port==0 && l_mbapos==0) + { + l_dq=dqs_dq_lane_p0[i_input_index]; + l_block=block_dqs_p0[i_input_index]; + } + + else if(i_port==1 && l_mbapos==0) + { + l_dq=dqs_dq_lane_p1[i_input_index]; + l_block=block_dqs_p1[i_input_index]; + } + else if(i_port==0 && l_mbapos==1) + { + l_dq=dqs_dq_lane_p2[i_input_index]; + l_block=block_dqs_p2[i_input_index]; + } + else + { + l_dq=dqs_dq_lane_p3[i_input_index]; + l_block=block_dqs_p3[i_input_index]; + } + + if(i_verbose==1) + { + FAPI_INF("block=%d",l_block); + FAPI_INF("dqs_dq_lane=%d",l_dq); + } + if(l_dq==0) + { + l_lane=16; + } + + else if(l_dq==4) + { + l_lane=18; + } + + else if (l_dq==8) + { + l_lane=20; + } + + else + { + l_lane=22; + } + //FAPI_INF("here"); + + if (i_input_type_e==DQS_GATE) + { + l_input_type=DQS_GATE_t; + } + + else if(i_input_type_e==RDCLK) + { + l_input_type=RDCLK_t; + } + + else if(i_input_type_e==RD_DQS) + { + l_input_type=RD_DQS_t; + } + + else + { + l_input_type=DQSCLK_t; + } + + if(i_verbose==1) + { + FAPI_INF("lane is=%d",l_lane); + } + + if(flag==0){ + phy_lane=l_lane; + phy_block=l_block; + } + + // rc=get_address(i_target_mba,i_port,i_rank_pair,l_input_type,l_block,l_lane,l_scom_address_64,l_start_bit,l_len); if(rc) return rc; + // out.scom_addr=l_scom_address_64; + // out.start_bit=l_start_bit; + // out.bit_length=l_len; } else diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C index da2f6784e..9e9962619 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_mcbist_common.C,v 1.53 2013/10/04 06:32:33 sasethur Exp $ +// $Id: mss_mcbist_common.C,v 1.55 2013/10/24 15:04:44 sasethur Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM @@ -38,6 +38,8 @@ //------------------------------------------------------------------------------ // Version:|Author: | Date: | Comment: // --------|--------|--------|-------------------------------------------------- +// 1.55 |aditya |10/24/13|Removed DD2.0 attribute check for ECC setup +// 1.54 |aditya |10/17/13|Minor fix in byte mask function // 1.53 |aditya |10/05/13|Updated fw comments // 1.52 |aditya |09/27/13|Updated for Host Boot Compile // 1.51 |aditya |09/18/13|Updated parameters for random seed attribute and Error map masking @@ -183,12 +185,12 @@ fapi::ReturnCode setup_mcbist(const fapi::Target & i_target_mba,mcbist_byte_mask Target i_target_centaur; - uint8_t l_attr_centaur_ec_mcbist_random_data_gen = 0; + //uint8_t l_attr_centaur_ec_mcbist_random_data_gen = 0; rc = fapiGetParentChip(i_target_mba, i_target_centaur); if(rc) return rc; rc = FAPI_ATTR_GET(ATTR_MCBIST_PATTERN, &i_target_mba,i_mcbpatt); if(rc) return rc;//-----------i_mcbpatt------->run rc = FAPI_ATTR_GET(ATTR_MCBIST_TEST_TYPE, &i_target_mba, i_mcbtest); if(rc) return rc;//---------i_mcbtest------->run - rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_MCBIST_RANDOM_DATA_GEN, &i_target_centaur, l_attr_centaur_ec_mcbist_random_data_gen); if(rc) return rc;//---------i_mcbtest------->run + //rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_MCBIST_RANDOM_DATA_GEN, &i_target_centaur, l_attr_centaur_ec_mcbist_random_data_gen); if(rc) return rc;//---------i_mcbtest------->run rc = mss_conversion_testtype(i_target_mba,i_mcbtest, i_mcbtest1);if(rc) return rc; rc = mss_conversion_data(i_target_mba,i_mcbpatt,i_mcbpatt1);if(rc) return rc; @@ -212,8 +214,8 @@ rc = FAPI_ATTR_GET(ATTR_MCBIST_ERROR_CAPTURE, &i_target_mba,l_bit32); if(rc) ret } - if(l_attr_centaur_ec_mcbist_random_data_gen == 0) - { + // if(l_attr_centaur_ec_mcbist_random_data_gen == 0) + //{ //FIFO work around for random data //################################### //# WRQ and RRQ set to FIFO mode OFF @@ -241,7 +243,7 @@ rc = FAPI_ATTR_GET(ATTR_MCBIST_ERROR_CAPTURE, &i_target_mba,l_bit32); if(rc) ret //End //power bus ECC setting for random data -//# MBA01_MBA_WRD_MODE - dsibale powerbus ECC checking and correction +//# MBA01_MBA_WRD_MODE - disbale powerbus ECC checking and correction rc = fapiGetScom(i_target_mba,0x03010449,l_data_buffer_64); if(rc) return rc; rc_num = l_data_buffer_64.setBit(0);if (rc_num){FAPI_ERR( "Error in function start_mcb:");rc.setEcmdError(rc_num);return rc;} rc_num = l_data_buffer_64.setBit(1);if (rc_num){FAPI_ERR( "Error in function start_mcb:");rc.setEcmdError(rc_num);return rc;} @@ -259,7 +261,7 @@ rc = FAPI_ATTR_GET(ATTR_MCBIST_ERROR_CAPTURE, &i_target_mba,l_bit32); if(rc) ret rc = fapiPutScom(i_target_mba,0x0201148a,l_data_buffer_64); if(rc) return rc; //end of power bus ECC setting for random data - } + //} rc = fapiGetScom(i_target_mba,MBA01_CCS_MODEQ_0x030106a7, l_data_buffer_64); if(rc) return rc; rc_num = l_data_buffer_64.clearBit(29); if (rc_num){FAPI_ERR( "Error in function setup_mcb:");rc.setEcmdError(rc_num);return rc;} @@ -2135,7 +2137,7 @@ fapi::ReturnCode cfg_byte_mask(const fapi::Target & i_target_mba) uint8_t l_dqBitmap[DIMM_DQ_RANK_BITMAP_SIZE]; uint8_t l_dq[8]={0}; - uint16_t l_sp[2]={0}; + uint8_t l_sp[2]={0}; uint16_t l_index0=0; uint8_t l_index_sp=0; //uint16_t l_sp_mask=0x0000; |