INITPROC: Hostboot - SW230152 mcbist bug fix

Change-Id: I7bf26c87da8bb45d69c542491c03cb0e6ae05275
CQ:SW230152
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6955
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

4 files changed, 150 insertions, 38 deletions

diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C
index e7b4ab1bd..01b24dcee 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_access_delay_reg.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_access_delay_reg.C,v 1.19 2013/10/09 11:28:41 sasethur Exp $
+// $Id: mss_access_delay_reg.C,v 1.20 2013/10/22 06:17:40 sasethur Exp $
 //------------------------------------------------------------------------------
 // *! (C) Copyright International Business Machines Corp. 2011
 // *! All Rights Reserved -- Property of IBM
@@ -3170,6 +3170,92 @@ fapi::ReturnCode mss_c4_phy(const fapi::Target & i_target_mba,uint8_t i_port, ui
 	  // out.scom_addr=l_scom_address_64;
       // out.start_bit=l_start_bit;
       // out.bit_length=l_len; 
+   } else if (i_input_type_e==RD_DQS || i_input_type_e==DQS_GATE || i_input_type_e==RDCLK || i_input_type_e==DQSCLK)	    
+   {
+      
+      
+      if(i_port==0 && l_mbapos==0)
+      {
+         l_dq=dqs_dq_lane_p0[i_input_index];
+         l_block=block_dqs_p0[i_input_index]; 
+      }
+             
+      else if(i_port==1 && l_mbapos==0)
+      {
+         l_dq=dqs_dq_lane_p1[i_input_index];   
+         l_block=block_dqs_p1[i_input_index]; 
+      }   
+      else if(i_port==0 && l_mbapos==1)
+      {
+         l_dq=dqs_dq_lane_p2[i_input_index];   
+         l_block=block_dqs_p2[i_input_index]; 
+      }
+      else
+      {
+         l_dq=dqs_dq_lane_p3[i_input_index];   
+         l_block=block_dqs_p3[i_input_index]; 
+      }
+      
+      if(i_verbose==1)
+      {
+         FAPI_INF("block=%d",l_block);
+         FAPI_INF("dqs_dq_lane=%d",l_dq);
+      }   
+      if(l_dq==0)
+      {
+         l_lane=16;
+      }
+         
+      else if(l_dq==4)
+      {
+         l_lane=18;
+      }
+         
+      else if (l_dq==8)
+      {
+         l_lane=20;
+      }
+         
+      else
+      {
+         l_lane=22;
+      }
+      //FAPI_INF("here");
+      
+      if (i_input_type_e==DQS_GATE)
+      {
+         l_input_type=DQS_GATE_t;
+      }
+      
+      else if(i_input_type_e==RDCLK)
+      {
+         l_input_type=RDCLK_t;
+      }
+      
+      else if(i_input_type_e==RD_DQS)
+      {
+         l_input_type=RD_DQS_t;
+      }
+      
+      else
+      {
+         l_input_type=DQSCLK_t;
+      }
+      
+      if(i_verbose==1)
+      {
+         FAPI_INF("lane is=%d",l_lane);
+      }
+	  
+	  if(flag==0){
+	 phy_lane=l_lane;
+	  phy_block=l_block;
+	  }
+      
+      // rc=get_address(i_target_mba,i_port,i_rank_pair,l_input_type,l_block,l_lane,l_scom_address_64,l_start_bit,l_len); if(rc) return rc; 		 
+      // out.scom_addr=l_scom_address_64;
+      // out.start_bit=l_start_bit;
+      // out.bit_length=l_len; 
    }   
       
    else
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C
index da2f6784e..9e9962619 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_mcbist_common.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_mcbist_common.C,v 1.53 2013/10/04 06:32:33 sasethur Exp $
+// $Id: mss_mcbist_common.C,v 1.55 2013/10/24 15:04:44 sasethur Exp $
 // *!***************************************************************************
 // *! (C) Copyright International Business Machines Corp. 1997, 1998
 // *!           All Rights Reserved -- Property of IBM
@@ -38,6 +38,8 @@
 //------------------------------------------------------------------------------
 // Version:|Author: | Date:  | Comment:
 // --------|--------|--------|--------------------------------------------------
+//   1.55  |aditya  |10/24/13|Removed DD2.0 attribute check  for  ECC setup 
+//   1.54  |aditya  |10/17/13|Minor fix in byte mask function
 //   1.53  |aditya  |10/05/13|Updated fw comments
 //   1.52  |aditya  |09/27/13|Updated for Host Boot Compile
 //   1.51  |aditya  |09/18/13|Updated parameters for random seed attribute and Error map masking
@@ -183,12 +185,12 @@ fapi::ReturnCode setup_mcbist(const fapi::Target & i_target_mba,mcbist_byte_mask
 	
 	
 	Target i_target_centaur;
-	uint8_t l_attr_centaur_ec_mcbist_random_data_gen = 0;
+	//uint8_t l_attr_centaur_ec_mcbist_random_data_gen = 0;
 		rc = fapiGetParentChip(i_target_mba, i_target_centaur); if(rc) return rc;
 	
 	rc = FAPI_ATTR_GET(ATTR_MCBIST_PATTERN, &i_target_mba,i_mcbpatt); if(rc) return rc;//-----------i_mcbpatt------->run
 	rc = FAPI_ATTR_GET(ATTR_MCBIST_TEST_TYPE, &i_target_mba, i_mcbtest); if(rc) return rc;//---------i_mcbtest------->run
-	rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_MCBIST_RANDOM_DATA_GEN, &i_target_centaur, l_attr_centaur_ec_mcbist_random_data_gen); if(rc) return rc;//---------i_mcbtest------->run
+	//rc = FAPI_ATTR_GET(ATTR_CENTAUR_EC_MCBIST_RANDOM_DATA_GEN, &i_target_centaur, l_attr_centaur_ec_mcbist_random_data_gen); if(rc) return rc;//---------i_mcbtest------->run
 
 	rc = mss_conversion_testtype(i_target_mba,i_mcbtest, i_mcbtest1);if(rc) return rc;
     rc = mss_conversion_data(i_target_mba,i_mcbpatt,i_mcbpatt1);if(rc) return rc;
@@ -212,8 +214,8 @@ rc = FAPI_ATTR_GET(ATTR_MCBIST_ERROR_CAPTURE, &i_target_mba,l_bit32); if(rc) ret
 	
 	}
 
-   if(l_attr_centaur_ec_mcbist_random_data_gen == 0)
-   {    
+  // if(l_attr_centaur_ec_mcbist_random_data_gen == 0)
+   //{    
 		//FIFO work around for random data	
 		//###################################
 		//# WRQ and RRQ set to FIFO mode OFF
@@ -241,7 +243,7 @@ rc = FAPI_ATTR_GET(ATTR_MCBIST_ERROR_CAPTURE, &i_target_mba,l_bit32); if(rc) ret
 //End	
 //power bus ECC setting for random data
 
-//# MBA01_MBA_WRD_MODE - dsibale powerbus ECC checking and correction
+//# MBA01_MBA_WRD_MODE - disbale powerbus ECC checking and correction
 		rc = fapiGetScom(i_target_mba,0x03010449,l_data_buffer_64); if(rc) return rc; 
 		rc_num =  l_data_buffer_64.setBit(0);if (rc_num){FAPI_ERR( "Error in function  start_mcb:");rc.setEcmdError(rc_num);return rc;}
 		rc_num =  l_data_buffer_64.setBit(1);if (rc_num){FAPI_ERR( "Error in function  start_mcb:");rc.setEcmdError(rc_num);return rc;}
@@ -259,7 +261,7 @@ rc = FAPI_ATTR_GET(ATTR_MCBIST_ERROR_CAPTURE, &i_target_mba,l_bit32); if(rc) ret
 		rc = fapiPutScom(i_target_mba,0x0201148a,l_data_buffer_64); if(rc) return rc;
 
 		//end of power bus ECC setting for random data
-	}
+	//}
    
     rc = fapiGetScom(i_target_mba,MBA01_CCS_MODEQ_0x030106a7, l_data_buffer_64);  if(rc) return rc;   
     rc_num =  l_data_buffer_64.clearBit(29); if (rc_num){FAPI_ERR( "Error in function setup_mcb:");rc.setEcmdError(rc_num);return rc;}
@@ -2135,7 +2137,7 @@ fapi::ReturnCode  cfg_byte_mask(const fapi::Target & i_target_mba)
 
     uint8_t l_dqBitmap[DIMM_DQ_RANK_BITMAP_SIZE];
     uint8_t l_dq[8]={0};
-    uint16_t l_sp[2]={0};
+    uint8_t l_sp[2]={0};
     uint16_t l_index0=0;
     uint8_t l_index_sp=0;
     //uint16_t l_sp_mask=0x0000;
diff --git a/src/usr/hwpf/hwp/initfiles/mba_def.initfile b/src/usr/hwpf/hwp/initfiles/mba_def.initfile
index d07c06c79..fc1065bb1 100644
--- a/src/usr/hwpf/hwp/initfiles/mba_def.initfile
+++ b/src/usr/hwpf/hwp/initfiles/mba_def.initfile
@@ -1,9 +1,10 @@
 
-#-- $Id: mba_def.initfile,v 1.48 2013/09/30 21:29:38 yctschan Exp $
+#-- $Id: mba_def.initfile,v 1.49 2013/10/24 18:49:51 yctschan Exp $
 #-- CHANGE HISTORY:
 #--------------------------------------------------------------------------------
 #-- Version:|Author: | Date:  | Comment:
 #-- --------|--------|--------|--------------------------------------------------
+#--     1.49|tschang |10/24/13|added ATTR_MSS_THROTTLE_CONTROL_RAS_WEIGHT, ATTR_MSS_THROTTLE_CONTROL_CAS_WEIGHT to throttle settings
 #--     1.48|tschang | 9/30/13|add 10% margin to refresh check interval calculations
 #--     1.47|tschang | 8/15/13| HW259719 - dd2 only fix - ATTR_CENTAUR_EC_ENABLE_TRACE_LCL_CLK_GATE_CTRL to turn on clock gates
 #--     1.46|tschang | 7/17/13|updated refresh interval and refresh check interval calculations
@@ -1687,6 +1688,9 @@ define  def_mcb_addr_total22_max25  = (((ATTR_EFF_NUM_RANKS_PER_DIMM[0][0] - ATT
 #		31:44	cfg_nm_m	MSS_MEM_THROTTLE_DENOMINATOR
 #		51	cfg_nm_per_slot_enabled	1
 #		52	cfg_nm_count_other_mba_dis	Set to 0 for CDIMM, Set to 1 for everything else
+#cfg_nm_ras_weight, bits 45:47 = ATTR_MSS_THROTTLE_CONTROL_RAS_WEIGHT
+#cfg_nm_cas_weight, bits 48:50 = ATTR_MSS_THROTTLE_CONTROL_CAS_WEIGHT
+
 
 
 scom 0x03010416     {
@@ -1694,6 +1698,8 @@ scom 0x03010416     {
     0:14    ,   ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA   ,            1            ,     any;          # cfg_nm_n_per_mba	MSS_MEM_THROTTLE_NUMERATOR_PER_MBA
     15:30   ,   ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP  ,            1            ,     any;          # cfg_nm_n_per_chip	MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP
     31:44   ,   ATTR_MSS_MEM_THROTTLE_DENOMINATOR         ,            1            ,     any;          # cfg_nm_m	MSS_MEM_THROTTLE_DENOMINATOR
+    45:47   ,   ATTR_MSS_THROTTLE_CONTROL_RAS_WEIGHT      ,            1            ,     any;          # cfg_nm_ras_weight
+    48:50   ,   ATTR_MSS_THROTTLE_CONTROL_CAS_WEIGHT      ,            1            ,     any;          # cfg_nm_cas_weight
 #    51      ,   0b1                                       ,            1            ,     any;          # cfg_nm_per_slot_enabled	1
     51      ,   0b0                                       ,            1            ,     (ATTR_EFF_DIMM_TYPE == 0);          # cfg_nm_per_slot_enabled	Set to 0 for CDIMM, Set to 1 for everything else
     51      ,   0b1                                       ,            1            ,     ((ATTR_EFF_DIMM_TYPE == 1) || (ATTR_EFF_DIMM_TYPE == 2) || (ATTR_EFF_DIMM_TYPE == 3));          # cfg_nm_per_slot_enabled	Set to 0 for CDIMM, Set to 1 for everything else
diff --git a/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C b/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
index 994650b30..12f15df6f 100644
--- a/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
+++ b/src/usr/hwpf/hwp/utility_procedures/mss_unmask_errors.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_unmask_errors.C,v 1.3 2013/03/08 22:03:00 gollub Exp $
+// $Id: mss_unmask_errors.C,v 1.4 2013/10/22 18:55:06 gollub Exp $
 //------------------------------------------------------------------------------
 // Don't forget to create CVS comments when you check in your changes!
 //------------------------------------------------------------------------------
@@ -34,6 +34,8 @@
 //         |          |         | so they will be masked during memdiags, and
 //         |          |         | unmasked before scrub is started.
 //   1.3   | 03/08/13 | gollub  | Masking MBSPA[0] for DD1, and using MBSPA[8] instead.
+//   1.4   | 10/22/13 | gollub  | Keep maint ECC errors masked, since PRD intends
+//         |          |         | to use cmd complete attention instead.
 
 //------------------------------------------------------------------------------
 //  Includes
@@ -1707,28 +1709,32 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
         // on when cmd stops on error, but can't be set to do both. 
         l_ecmd_rc |= l_mbaspa_mask.setBit(0);            
 
-        // 1	Hard_CE_ETE_Attn                             mask (until after memdiags)
-        // NOTE: FW memdiags needs this masked because they want to wait till
-        // cmd gets to end of rank before getting any attention.
+        // 1	Hard_CE_ETE_Attn                             mask (forever)
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
         // NOTE: Hards counted during super fast read, but can't be called 
         // true hard CEs since super fast read doesn't write back and read again.
         l_ecmd_rc |= l_mbaspa_mask.setBit(1);            
 
-        // 2	Soft_CE_ETE_Attn                             mask (until after memdiags)
-        // NOTE: FW memdiags needs this masked because they want to wait till
-        // cmd gets to end of rank before getting any attention.
+        // 2	Soft_CE_ETE_Attn                             mask (forever)
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
         // NOTE: Softs not counted during super fast read.
         l_ecmd_rc |= l_mbaspa_mask.setBit(2);            
 
-        // 3	Intermittent_ETE_Attn                        mask (until after memdiags)
-        // NOTE: FW memdiags needs this masked because they want to wait till
-        // cmd gets to end of rank before getting any attention.
+        // 3	Intermittent_ETE_Attn                        mask (forever)
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
         // NOTE: Intermittents not counted during super fast read.
         l_ecmd_rc |= l_mbaspa_mask.setBit(3);            
 
-        // 4	RCE_ETE_Attn                                 mask (until after memdiags)
-        // NOTE: FW memdiags needs this masked because they want to wait till
-        // cmd gets to end of rank before getting any attention.
+        // 4	RCE_ETE_Attn                                 mask (forever)
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
         // NOTE: RCEs not counted during super fast read.
         l_ecmd_rc |= l_mbaspa_mask.setBit(4);            
 
@@ -1865,9 +1871,10 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
         l_ecmd_rc |= l_mbeccfir_action1.setBit(19);
         l_ecmd_rc |= l_mbeccfir_mask_or.setBit(19);
 
-        // 20:27	Maint MPE Rank 0:7      recoverable         mask (until after memdiags)
-        // NOTE: FW memdiags needs this masked because they want to wait till
-        // cmd gets to end of rank before getting any attention.
+        // 20:27	Maint MPE Rank 0:7      recoverable         mask (forever)
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
         l_ecmd_rc |= l_mbeccfir_action0.clearBit(20,8);            
         l_ecmd_rc |= l_mbeccfir_action1.setBit(20,8);
         l_ecmd_rc |= l_mbeccfir_mask_or.setBit(20,8);
@@ -1906,9 +1913,10 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
         l_ecmd_rc |= l_mbeccfir_action1.setBit(40);
         l_ecmd_rc |= l_mbeccfir_mask_or.setBit(40);
 
-        // 41	Maintenance UE              recoverable         mask (until after memdiags)
-        // NOTE: FW memdiags needs this masked because they want to wait till
-        // cmd gets to end of rank before getting any attention.
+        // 41	Maintenance UE              recoverable         mask (forever)
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
         l_ecmd_rc |= l_mbeccfir_action0.clearBit(41);            
         l_ecmd_rc |= l_mbeccfir_action1.setBit(41);
         l_ecmd_rc |= l_mbeccfir_mask_or.setBit(41);
@@ -1954,12 +1962,12 @@ fapi::ReturnCode mss_unmask_maint_errors(const fapi::Target & i_target,
         l_ecmd_rc |= l_mbeccfir_action1.clearBit(49);
         l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(49);
 
-        // 50	internal scom error         recovereble         mask (tbd)
+        // 50	internal scom error         recovereble         mask
         l_ecmd_rc |= l_mbeccfir_action0.clearBit(50);            
         l_ecmd_rc |= l_mbeccfir_action1.setBit(50);
         l_ecmd_rc |= l_mbeccfir_mask_or.setBit(50);
 
-        // 51	internal scom error clone   recovereble         mask (tbd)
+        // 51	internal scom error clone   recovereble         mask
         l_ecmd_rc |= l_mbeccfir_action0.clearBit(51);            
         l_ecmd_rc |= l_mbeccfir_action1.setBit(51);
         l_ecmd_rc |= l_mbeccfir_mask_or.setBit(51);
@@ -2479,7 +2487,7 @@ fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
     ecmdDataBufferBase l_mbeccfir_mask(64);
     ecmdDataBufferBase l_mbeccfir_mask_and(64);
 
-    ecmdDataBufferBase l_mbaspa_mask(64);
+    //ecmdDataBufferBase l_mbaspa_mask(64);
 
     // Get associated functional MBAs on this centaur
     l_rc = fapiGetChildChiplets(i_target,
@@ -2508,12 +2516,16 @@ fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
         }    
     
 
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
+        
         //*************************
         //*************************
         // MBASPA
         //*************************
         //*************************        
-                
+        /*        
         // Read mask
         l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
                                    MBA01_MBSPAMSKQ_0x03010614,
@@ -2529,8 +2541,8 @@ fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
         //       them. But typically we are expecting the bit set at this point
         //       to be valid errors for PRD to log.
 
-
-        // 1	Hard_CE_ETE_Attn                             unmask
+        
+        // 1	Hard_CE_ETE_Attn                             unmask       
         // NOTE: Unmasking, but PRD responsible for setting and enabling the threshold.
         l_ecmd_rc |= l_mbaspa_mask.clearBit(1);            
 
@@ -2545,7 +2557,6 @@ fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
         // 4	RCE_ETE_Attn                                 unmask
         // NOTE: Unmasking, but PRD responsible for setting and enabling the threshold.
         l_ecmd_rc |= l_mbaspa_mask.clearBit(4);            
-                    
 
         if(l_ecmd_rc)
         {
@@ -2566,9 +2577,10 @@ fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
             if (i_bad_rc) fapiLogError(i_bad_rc);        
             return l_rc;
         }
-
+        */
         //************************************************    
         // DEBUG: read them all back to verify
+        /*
         l_rc = fapiGetScom_w_retry(l_mbaChiplets[i],
                                    MBA01_MBSPAMSKQ_0x03010614,
                                    l_mbaspa_mask);
@@ -2578,8 +2590,9 @@ fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
             if (i_bad_rc) fapiLogError(i_bad_rc);        
             return l_rc;
         }
+        */
         //************************************************    
-
+        
 
 
         //*************************
@@ -2627,11 +2640,16 @@ fapi::ReturnCode mss_unmask_fetch_errors(const fapi::Target & i_target,
         // 19	Memory UE                   recoverable         unmask
         l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(19);
         
+        // NOTE: FW wants to mask these and rely instead on detecting the 
+        // cmd complete attention, then checking these manually to see if 
+        // they cause the cmd to stop
+        /*
         // 20:27	Maint MPE Rank 0:7      recoverable         unmask
         l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(20,8);
         
         // 41	Maintenance UE              recoverable         unmask
         l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(41);
+        */
         
         // 43	Prefetch Memory UE          recoverable         unmask
         l_ecmd_rc |= l_mbeccfir_mask_and.clearBit(43);