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author | Thi Tran <thi@us.ibm.com> | 2014-02-06 15:25:19 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-02-14 15:21:34 -0600 |
commit | 9ea4a28823a5c17d8adc448635fdec1e18c5ce5d (patch) | |
tree | 5332b389deb70163f026ce3056f07db3c6935a61 /src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset | |
parent | 687aff211d6a018a3361124f8213ff102c9ef121 (diff) | |
download | talos-hostboot-9ea4a28823a5c17d8adc448635fdec1e18c5ce5d.tar.gz talos-hostboot-9ea4a28823a5c17d8adc448635fdec1e18c5ce5d.zip |
INITPROC: Hostboot SW244672 RAS Review updates
Change-Id: I57642650e977d106a5078d5a8bc1ec4d9aec2f96
CQ:SW244672
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8633
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset')
3 files changed, 61 insertions, 25 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml index 9fd61dc8b..df9156550 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml +++ b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/memory_mss_ddr_phy_reset.xml @@ -20,8 +20,9 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> + <hwpErrors> -<!-- $Id: memory_mss_ddr_phy_reset.xml,v 1.2 2014/01/16 20:55:42 mfred Exp $ --> +<!-- $Id: memory_mss_ddr_phy_reset.xml,v 1.3 2014/01/31 15:08:07 mfred Exp $ --> <!-- For file ../../ipl/fapi/mss_ddr_phy_reset.C --> <!-- // *! OWNER NAME : Mark Fredrickson Email: mfred@us.ibm.com --> <!-- // *! BACKUP NAME : Mark Bellows Email: bellows@us.ibm.com --> @@ -39,6 +40,13 @@ <target>MBA_IN_ERROR</target> <priority>HIGH</priority> </callout> + <callout> + <hw> + <hwid>MEM_REF_CLOCK</hwid> + <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget> + </hw> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>MBA_IN_ERROR</target> </deconfigure> @@ -60,6 +68,13 @@ <target>MBA_IN_ERROR</target> <priority>HIGH</priority> </callout> + <callout> + <hw> + <hwid>MEM_REF_CLOCK</hwid> + <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget> + </hw> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>MBA_IN_ERROR</target> </deconfigure> @@ -81,6 +96,13 @@ <target>MBA_IN_ERROR</target> <priority>HIGH</priority> </callout> + <callout> + <hw> + <hwid>MEM_REF_CLOCK</hwid> + <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget> + </hw> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>MBA_IN_ERROR</target> </deconfigure> @@ -102,6 +124,13 @@ <target>MBA_IN_ERROR</target> <priority>HIGH</priority> </callout> + <callout> + <hw> + <hwid>MEM_REF_CLOCK</hwid> + <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget> + </hw> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>MBA_IN_ERROR</target> </deconfigure> diff --git a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C index 30ef0fb7e..052c10ff9 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C +++ b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C @@ -20,7 +20,8 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_ddr_phy_reset.C,v 1.27 2014/01/16 20:54:48 mfred Exp $ + +// $Id: mss_ddr_phy_reset.C,v 1.28 2014/01/31 15:09:03 mfred Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_ddr_phy_reset.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -430,6 +431,7 @@ fapi::ReturnCode mss_ddr_phy_reset_cloned(const fapi::Target & i_target) const uint16_t & EXPECTED_STATUS = DP18_PLL_EXP_LOCK_STATUS; const uint16_t ACTUAL_STATUS = dp_p0_lock_data.getHalfWord(3); const fapi::Target & MBA_IN_ERROR = i_target; + const fapi::Target & MEMBUF_CHIP_IN_ERROR = l_centaurTarget; FAPI_SET_HWP_ERROR(rc, RC_MSS_DP18_0_PLL_FAILED_TO_LOCK); break; } @@ -453,6 +455,7 @@ fapi::ReturnCode mss_ddr_phy_reset_cloned(const fapi::Target & i_target) const uint16_t & EXPECTED_STATUS = DP18_PLL_EXP_LOCK_STATUS; const uint16_t ACTUAL_STATUS = dp_p1_lock_data.getHalfWord(3); const fapi::Target & MBA_IN_ERROR = i_target; + const fapi::Target & MEMBUF_CHIP_IN_ERROR = l_centaurTarget; FAPI_SET_HWP_ERROR(rc, RC_MSS_DP18_1_PLL_FAILED_TO_LOCK); break; } @@ -468,6 +471,7 @@ fapi::ReturnCode mss_ddr_phy_reset_cloned(const fapi::Target & i_target) const uint16_t & EXPECTED_STATUS = AD32S_PLL_EXP_LOCK_STATUS; const uint16_t ACTUAL_STATUS = ad_p0_lock_data.getHalfWord(3); const fapi::Target & MBA_IN_ERROR = i_target; + const fapi::Target & MEMBUF_CHIP_IN_ERROR = l_centaurTarget; FAPI_SET_HWP_ERROR(rc, RC_MSS_AD32S_0_PLL_FAILED_TO_LOCK); break; } @@ -479,6 +483,7 @@ fapi::ReturnCode mss_ddr_phy_reset_cloned(const fapi::Target & i_target) const uint16_t & EXPECTED_STATUS = AD32S_PLL_EXP_LOCK_STATUS; const uint16_t ACTUAL_STATUS = ad_p1_lock_data.getHalfWord(3); const fapi::Target & MBA_IN_ERROR = i_target; + const fapi::Target & MEMBUF_CHIP_IN_ERROR = l_centaurTarget; FAPI_SET_HWP_ERROR(rc, RC_MSS_AD32S_1_PLL_FAILED_TO_LOCK); break; } @@ -1174,6 +1179,9 @@ This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: mss_ddr_phy_reset.C,v $ +Revision 1.28 2014/01/31 15:09:03 mfred +Mike Jones added statements to pass target into XML for callouts. + Revision 1.27 2014/01/16 20:54:48 mfred Updates for passing more data to error handler. From Mike Jones. diff --git a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.H b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.H index 9ef643a3c..4a96fa503 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.H +++ b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.H @@ -1,26 +1,25 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.H $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2012,2014 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ // $Id: mss_ddr_phy_reset.H,v 1.2 2012/03/21 18:12:28 mfred Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_ddr_phy_reset.H,v $ //------------------------------------------------------------------------------ |