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authorRichard J. Knight <rjknight@us.ibm.com>2013-06-14 18:05:30 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-07-02 15:23:23 -0500
commitb152baa74e1df1d85951ddcbbf0ae393544f68b6 (patch)
treed0abab1dbee0eb449f0805a514a4bc7cdd1d119e /src/usr/hwpf/hwp/dmi_training
parent4c3292e066ded88bb475db3339ae0b98c976768e (diff)
downloadtalos-hostboot-b152baa74e1df1d85951ddcbbf0ae393544f68b6.tar.gz
talos-hostboot-b152baa74e1df1d85951ddcbbf0ae393544f68b6.zip
SW209368 : INITPROC: Hostboot - High Priority HW Init Procedures for week of 6/11
proc_stop_deadman_timer.C (v1.8) proc_cen_frame_lock.C (v1.16) cen_scom_addresses.H (v1.61) p8_ocb_init.C (v1.7) p8_pmc_init.C (v1.35) Change-Id: I5cf18c5a7027f2b2b1fb1466cd688674c13f7de3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5036 Tested-by: Jenkins Server Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/dmi_training')
-rw-r--r--src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C31
1 files changed, 16 insertions, 15 deletions
diff --git a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C
index a26cb6b68..5de100b6f 100644
--- a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C
+++ b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-/// $Id: proc_cen_framelock.C,v 1.13 2013/04/28 05:48:24 baysah Exp $
+/// $Id: proc_cen_framelock.C,v 1.16 2013/06/05 18:15:39 baysah Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_cen_framelock.C,v $
//------------------------------------------------------------------------------
// *|
@@ -2007,7 +2007,7 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
}
- // Return bad code from while loops here, before the get overwritten by the procedure EXIT scoms below
+ // Return bad code from while loops here, before it gets overwritten by the procedure EXIT scoms below
if (l_rc)
{
//FAPI_DBG(" HELLO...THIS IS A BAD RETURN CODE");
@@ -2043,14 +2043,14 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
FAPI_ERR("proc_cen_framelock: Error 0x%x setting up data buffers to set MCI FIR actions",
l_ecmdRc);
l_rc.setEcmdError(l_ecmdRc);
- // return l_rc;
+ return l_rc;
}
l_rc = proc_cen_framelock_set_pu_mci_firact0_reg(i_pu_target, mci_data, mci_mask);
if (l_rc)
{
FAPI_ERR("proc_cen_framelock: Error writing P8 MCI Fir Action0 Register");
- // return l_rc;
+ return l_rc;
}
@@ -2069,24 +2069,25 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
l_ecmdRc |= mci_data.setBit(20); //Scom Register parity error
l_ecmdRc |= mci_data.setBit(22); //mcicfgq parity error
l_ecmdRc |= mci_data.setBit(23); //Replay Buffer Overrun
+ l_ecmdRc |= mci_data.setBit(24); //MCIFIRQ_MCS_RECOVERABLE_ERROR
l_ecmdRc |= mci_data.setBit(27); //MCS Command List Timeout due to PowerBus
l_ecmdRc |= mci_data.setBit(35); //PowerBus Write Data Buffer CE
l_ecmdRc |= mci_data.setBit(36); //PowerBus Write Data Buffer UE
- l_ecmdRc |= mci_data.setBit(40); //MCS Channel Timeout Error
+ //l_ecmdRc |= mci_data.setBit(40); //MCS Channel Timeout Error (On 5/06/2013 changed this fir to xstop, have to re-eval for Murano dd2)
l_ecmdRc |= mci_data.copy(mci_mask);
if (l_ecmdRc)
{
FAPI_ERR("proc_cen_framelock: Error 0x%x setting up data buffers to set MCI FIR actions",
l_ecmdRc);
l_rc.setEcmdError(l_ecmdRc);
- //return l_rc;
+ return l_rc;
}
l_rc = proc_cen_framelock_set_pu_mci_firact1_reg(i_pu_target, mci_data, mci_mask);
if (l_rc)
{
FAPI_ERR("proc_cen_framelock: Error writing P8 MCI Fir Action1 Register");
- //return l_rc;
+ return l_rc;
}
@@ -2106,14 +2107,14 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
FAPI_ERR("proc_cen_framelock: Error 0x%x setting up data buffers to set MCS Mode4 Register",
l_ecmdRc);
l_rc.setEcmdError(l_ecmdRc);
- //return l_rc;
+ return l_rc;
}
l_rc = proc_cen_framelock_set_pu_mcs_mode4_reg(i_pu_target, mci_data, mci_mask);
if (l_rc)
{
FAPI_ERR("proc_cen_framelock: Error writing P8 MCS Mode4 Register");
- //return l_rc;
+ return l_rc;
}
@@ -2180,14 +2181,14 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
FAPI_ERR("proc_cen_framelock: Error 0x%x setting up data buffers to mask MCI FIRs",
l_ecmdRc);
l_rc.setEcmdError(l_ecmdRc);
- // return l_rc;
+ return l_rc;
}
l_rc = proc_cen_framelock_set_pu_mci_firmask_reg(i_pu_target, mci_data, mci_mask);
if (l_rc)
{
FAPI_ERR("proc_cen_framelock: Error writing P8 MCI Fir Mask Register");
- //return l_rc;
+ return l_rc;
}
@@ -2210,14 +2211,14 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
FAPI_ERR("proc_cen_framelock: Error 0x%x setting up data buffers to set MBI FIR actions",
l_ecmdRc);
l_rc.setEcmdError(l_ecmdRc);
- //return l_rc;
+ return l_rc;
}
l_rc = proc_cen_framelock_set_cen_mbi_firact1_reg(i_mem_target, mbi_data, mbi_mask);
if (l_rc)
{
FAPI_ERR("proc_cen_framelock: Error writing Centaur MBI Fir Action1 Register");
- //return l_rc;
+ return l_rc;
}
@@ -2251,14 +2252,14 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target,
FAPI_ERR("proc_cen_framelock: Error 0x%x setting up data buffers to mask MBI FIRs",
l_ecmdRc);
l_rc.setEcmdError(l_ecmdRc);
- // return l_rc;
+ return l_rc;
}
l_rc = proc_cen_framelock_set_cen_mbi_firmask_reg(i_mem_target, mbi_data, mbi_mask);
if (l_rc)
{
FAPI_ERR("proc_cen_framelock: Error writing Centaur MBI Fir Mask Register");
- //return l_rc;
+ return l_rc;
}
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