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| author | Van Lee <vanlee@us.ibm.com> | 2012-10-04 19:03:07 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-10-10 10:56:21 -0500 |
| commit | c093ffb2f52adae60468cfa466e9939ad9026a62 (patch) | |
| tree | 9ebd4d8a489240fc221350cec2575e6cd75b0293 /src/usr/hwpf/hwp/L2_L3_attributes.xml | |
| parent | 167b115362297b549ac9459b5301698ee2a86b4f (diff) | |
| download | talos-hostboot-c093ffb2f52adae60468cfa466e9939ad9026a62.tar.gz talos-hostboot-c093ffb2f52adae60468cfa466e9939ad9026a62.zip | |
HWP: integrate proc_build_smp into Hostboot
RTC: 42153
Change-Id: I2d68a5d3614480e7fc9113c276c5a6b5440f9990
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1836
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/L2_L3_attributes.xml')
| -rw-r--r-- | src/usr/hwpf/hwp/L2_L3_attributes.xml | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/src/usr/hwpf/hwp/L2_L3_attributes.xml b/src/usr/hwpf/hwp/L2_L3_attributes.xml index 750081ad4..4e47071f7 100644 --- a/src/usr/hwpf/hwp/L2_L3_attributes.xml +++ b/src/usr/hwpf/hwp/L2_L3_attributes.xml @@ -1,25 +1,25 @@ -<!-- IBM_PROLOG_BEGIN_TAG - This is an automatically generated prolog. - - $Source: src/usr/hwpf/hwp/L2_L3_attributes.xml $ - - IBM CONFIDENTIAL - - COPYRIGHT International Business Machines Corp. 2012 - - p1 - - Object Code Only (OCO) source materials - Licensed Internal Code Source Materials - IBM HostBoot Licensed Internal Code - - The source code for this program is not published or other- - wise divested of its trade secrets, irrespective of what has - been deposited with the U.S. Copyright Office. - - Origin: 30 - - IBM_PROLOG_END --> +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/L2_L3_attributes.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2012 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> <!-- XML file specifying HWPF attributes. These are L2/L3 non-platInit attributes associated with proc EX chiplets @@ -30,7 +30,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L2_R_T0_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L2 tier0 read epsilon register value.</description> <valueType>uint32</valueType> <writeable/> @@ -39,7 +39,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L2_R_T1_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L2 tier1 read epsilon register value.</description> <valueType>uint32</valueType> <writeable/> @@ -48,7 +48,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L2_R_T2_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L2 tier2 read epsilon register value.</description> <valueType>uint32</valueType> <writeable/> @@ -57,7 +57,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L2_FORCE_R_T2_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L2 force tier2 read epsilon protect (all tiers).</description> <valueType>uint8</valueType> <enum>OFF = 0x00, ON = 0x01</enum> @@ -67,7 +67,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L2_W_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L2 write epsilon register value.</description> <valueType>uint32</valueType> <writeable/> @@ -76,7 +76,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L3_R_T0_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L3 tier0 read epsilon register value.</description> <valueType>uint32</valueType> <writeable/> @@ -85,7 +85,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L3_R_T1_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L3 tier1 read epsilon register value.</description> <valueType>uint32</valueType> <writeable/> @@ -94,7 +94,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L3_R_T2_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L3 tier2 read epsilon register value.</description> <valueType>uint32</valueType> <writeable/> @@ -103,7 +103,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L3_FORCE_R_T2_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L3 force tier2 read epsilon protect (all tiers).</description> <valueType>uint8</valueType> <enum>OFF = 0x00, ON = 0x01</enum> @@ -113,7 +113,7 @@ <!-- ********************************************************************* --> <attribute> <id>ATTR_L3_W_EPS</id> - <targetType>TARGET_TYPE_EX_CHIPLET</targetType> + <targetType>TARGET_TYPE_SYSTEM</targetType> <description>L3 write epsilon register value.</description> <valueType>uint32</valueType> <writeable/> |
