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| author | nagurram-in <nagendra.g@in.ibm.com> | 2017-03-13 15:30:06 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2017-03-15 14:14:16 -0400 |
| commit | d5358edf5e5ff7835099e4503e4bcf1518e24024 (patch) | |
| tree | 5df9bd341cdeb117b027895f11e104827747557e /src/usr/hdat/hdatiohub.C | |
| parent | cc74a4cc29b2cb768b15e3af9f91cc245eacff8f (diff) | |
| download | talos-hostboot-d5358edf5e5ff7835099e4503e4bcf1518e24024.tar.gz talos-hostboot-d5358edf5e5ff7835099e4503e4bcf1518e24024.zip | |
PCIe max speed support and risk level support in HDAT structures
Change-Id: I6b3e4a5edca007ca08a83bae6f424c9c5402ce07
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37874
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: VENKATESH SAINATH <venkatesh.sainath@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jayashankar Padath <jayashankar.padath@in.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr/hdat/hdatiohub.C')
| -rw-r--r-- | src/usr/hdat/hdatiohub.C | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/usr/hdat/hdatiohub.C b/src/usr/hdat/hdatiohub.C index 6b3643670..cf7e40df9 100644 --- a/src/usr/hdat/hdatiohub.C +++ b/src/usr/hdat/hdatiohub.C @@ -247,6 +247,8 @@ uint8_t * HdatIoHubFru::setIOHub(uint8_t * io_virt_addr, { l_hdatHubEntry->hdatIoHubId = this->iv_hubArray[l_cnt].hdatIoHubId; + l_hdatHubEntry->hdatMaxPCIeLinkSpeed = + this->iv_hubArray[l_cnt].hdatMaxPCIeLinkSpeed; l_hdatHubEntry->hdatModuleId = this->iv_hubArray[l_cnt].hdatModuleId; l_hdatHubEntry->hdatEcLvl = @@ -735,6 +737,32 @@ errlHndl_t hdatLoadIoData(const hdatMsAddr_t &i_msAddr, HDAT_ERR("Chip is not in Nimbus,Cumulus"); } + TARGETING::Target *l_pSysTarget = NULL; + (void) TARGETING::targetService().getTopLevelTarget(l_pSysTarget); + + if(l_pSysTarget == NULL) + { + HDAT_ERR("Error in getting Top Level Target"); + assert(l_pSysTarget != NULL); + } + + // DD1 workaround for Nimbus + if((l_procEcLevel & HDAT_PROC_EC_DD1) && (l_model == TARGETING::MODEL_NIMBUS)) + { + if(l_pSysTarget->getAttr<ATTR_DD1_SLOW_PCI_REF_CLOCK>()) + { + l_hub->hdatMaxPCIeLinkSpeed = HDAT_PCIE_MAX_SPEED_GEN4; + } + else + { + l_hub->hdatMaxPCIeLinkSpeed = HDAT_PCIE_MAX_SPEED_GEN2; + } + } + else + { + l_hub->hdatMaxPCIeLinkSpeed = HDAT_PCIE_MAX_SPEED_GEN4; + } + l_hub->hdatEcLvl = l_procEcLevel; l_hub->hdatProcChipID = l_procOrdId; l_hub->hdatHardwareTopology = l_pProcTarget-> |
