Make MURANO config work in Simics

This is work for Task 38048
-Updated bbuild to an 810 build with the latest Simics support
-Pulled support for Salerno from build tools
-Changed DEFAULT_MACHINE to MURANO
-Updated testcases to follow error logging guidelines
-Fixed up some FSI error handling bugs
-Disabled FSI loopback on VENICE (fix with Task 39187)
-Disabled a few testcases (see Impediment 39188)

Verified both MURANO and VENICE configurations

Change-Id: Ie7761f49c9e653489c8c4dad261b1c8852fa7548
RTC: 35596
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/791
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

2 files changed, 15 insertions, 13 deletions

diff --git a/src/usr/fsi/fsidd.C b/src/usr/fsi/fsidd.C
index fef1e47b0..94423c3da 100644
--- a/src/usr/fsi/fsidd.C
+++ b/src/usr/fsi/fsidd.C
@@ -716,8 +716,12 @@ errlHndl_t FsiDD::read(const FsiAddrInfo_t& i_addrInfo,
         l_mutex
             = (i_addrInfo.opbTarg)->getHbMutexAttr<TARGETING::ATTR_FSI_MASTER_MUTEX>();
 
-        mutex_lock(l_mutex);
-        need_unlock = true;
+        // skip the mutex lock if we're already inside a previous operation
+        if( !iv_ffdcCollection )
+        {
+            mutex_lock(l_mutex);
+            need_unlock = true;
+        }
 
         // always read/write 64 bits to SCOM
         size_t scom_size = sizeof(uint64_t);
@@ -790,8 +794,12 @@ errlHndl_t FsiDD::write(const FsiAddrInfo_t& i_addrInfo,
         l_mutex
             = (i_addrInfo.opbTarg)->getHbMutexAttr<TARGETING::ATTR_FSI_MASTER_MUTEX>();
 
-        mutex_lock(l_mutex);
-        need_unlock = true;
+        // skip the mutex lock if we're already inside a previous operation
+        if( !iv_ffdcCollection )
+        {
+            mutex_lock(l_mutex);
+            need_unlock = true;
+        }
 
         // write the OPB command register
         TRACUCOMP(g_trac_fsi, "FsiDD::write> ScomWRITE : opbaddr=%.16llX, data=%.16llX", opbaddr, fsicmd );
@@ -908,6 +916,7 @@ errlHndl_t FsiDD::handleOpbErrors(const FsiAddrInfo_t& i_addrInfo,
                 TRACFCOMP( g_trac_fsi, "MDTRB0(1DC) = %.8X", data );
             }
 
+            //MAGIC_INSTRUCTION(MAGIC_BREAK);
             iv_ffdcCollection = false;
         }
 
@@ -1059,7 +1068,7 @@ errlHndl_t FsiDD::genFullFsiAddr(FsiAddrInfo_t& io_addrInfo)
     //pull the FSI info out for this target
     FsiChipInfo_t fsi_info = getFsiInfo( io_addrInfo.fsiTarg );
 
-    TRACUCOMP( g_trac_fsi, "target=%llX : Link Id=%.8X", target_to_uint64(io_addrInfo.fsiTarg), i_fsiInfo.linkid.id );
+    TRACUCOMP( g_trac_fsi, "target=%llX : Link Id=%.8X", target_to_uint64(io_addrInfo.fsiTarg), fsi_info.linkid.id );
 
     //FSI master is the master proc, find the port
     if( fsi_info.master == iv_master )
diff --git a/src/usr/fsi/test/fsiddtest.H b/src/usr/fsi/test/fsiddtest.H
index 815fabfc1..12b6edb68 100644
--- a/src/usr/fsi/test/fsiddtest.H
+++ b/src/usr/fsi/test/fsiddtest.H
@@ -66,7 +66,6 @@ class FsiDDTest : public CxxTest::TestSuite
             TRACFCOMP(g_trac_fsi, "FsiDDTest::test_init> Error from device : RC=%X", l_err->reasonCode() );
             TS_FAIL( "FsiDDTest::test_init> ERROR : Unexpected error log from initMaster" );
             errlCommit(l_err,FSI_COMP_ID);
-            delete l_err;
         }
 
         TRACFCOMP( g_trac_fsi, "FsiDDTest::test_init> %d/%d fails", fails, total );
@@ -199,8 +198,7 @@ class FsiDDTest : public CxxTest::TestSuite
             //** Master Control Space
             // version number
             { PROC0, 0x003074, 0x91010800, false, true }, //CMFSI MVER
-            { PROC0, 0x003474, 0x91010800, false, true }, //MFSI MVER
-            //@fixme - should be 0x92010800 but Simics is wrong
+            { PROC0, 0x003474, 0x92010800, false, true }, //MFSI MVER
 
             //** Slave Regs (cheating)
             { PROC0, 0x080000, 0xC0010EA0, false, false }, //Config Table entry for slave0 off MFSI-0 
@@ -297,7 +295,6 @@ class FsiDDTest : public CxxTest::TestSuite
                 TS_FAIL( "FsiDDTest::test_readWrite> ERROR : Unexpected error log from read1" );
                 fails++;
                 errlCommit(l_err,FSI_COMP_ID);
-                delete l_err;
             }
 
             TRACDCOMP( g_trac_fsi, "READ Reg 0x%X = 0x%X", test_data[x].addr, read_data[x] );
@@ -325,7 +322,6 @@ class FsiDDTest : public CxxTest::TestSuite
                     TS_FAIL( "FsiDDTest::test_readWrite> ERROR : Unexpected error log from write1" );
                     fails++;
                     errlCommit(l_err,FSI_COMP_ID);
-                    delete l_err;
                 }
             }
         }
@@ -350,7 +346,6 @@ class FsiDDTest : public CxxTest::TestSuite
                 TS_FAIL( "FsiDDTest::test_readWrite> ERROR : Unexpected error log from read2" );
                 fails++;
                 errlCommit(l_err,FSI_COMP_ID);
-                delete l_err;
             }
         }
 
@@ -390,7 +385,6 @@ class FsiDDTest : public CxxTest::TestSuite
                     TS_FAIL( "FsiDDTest::test_readWrite> ERROR : Unexpected error log from write1" );
                     fails++;
                     errlCommit(l_err,FSI_COMP_ID);
-                    delete l_err;
                 }
             }
         }
@@ -443,7 +437,6 @@ class FsiDDTest : public CxxTest::TestSuite
             if( l_err )
             {
                 errlCommit(l_err,FSI_COMP_ID);
-                delete l_err;
             }
         }