PRD: Initial Axone rule files

Change-Id: I46993aa204f525e84b42eaad861cd12154430ec7
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68739
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68846
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

1 files changed, 764 insertions, 0 deletions

diff --git a/src/usr/diag/prdf/common/plat/axone/axone_phb.rule b/src/usr/diag/prdf/common/plat/axone/axone_phb.rule
new file mode 100644
index 000000000..844739ee2
--- /dev/null
+++ b/src/usr/diag/prdf/common/plat/axone/axone_phb.rule
@@ -0,0 +1,764 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/diag/prdf/common/plat/axone/axone_phb.rule $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2018
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+chip axone_phb
+{
+    name        "AXONE PHB target";
+    targettype  TYPE_PHB;
+    sigoff      0x0000;
+    dump        DUMP_CONTENT_HW;
+    scomlen     64;
+
+ #############################################################################
+ #                                                                           #
+ #  ######                                                                   #
+ #  #     #  ######   ####     ###    ####    #####  ######  #####    ####   #
+ #  #     #  #       #    #     #    #          #    #       #    #  #       #
+ #  ######   #####   #          #     ####      #    #####   #    #   ####   #
+ #  #   #    #       #  ###     #         #     #    #       #####        #  #
+ #  #    #   #       #    #     #    #    #     #    #       #   #   #    #  #
+ #  #     #  ######   ####     ###    ####      #    ######  #    #   ####   #
+ #                                                                           #
+ #############################################################################
+
+    ############################################################################
+    # P9 PHB target PHBNFIR
+    ############################################################################
+
+    register PHBNFIR
+    {
+        name        "P9 PHB target PHBNFIR";
+        scomaddr    0x04010c40;
+        reset       (&, 0x04010c41);
+        mask        (|, 0x04010c45);
+        capture     group default;
+    };
+
+    register PHBNFIR_MASK
+    {
+        name        "P9 PHB target PHBNFIR MASK";
+        scomaddr    0x04010c43;
+        capture     group default;
+    };
+
+    register PHBNFIR_ACT0
+    {
+        name        "P9 PHB target PHBNFIR ACT0";
+        scomaddr    0x04010c46;
+        capture     group default;
+        capture     req nonzero("PHBNFIR");
+    };
+
+    register PHBNFIR_ACT1
+    {
+        name        "P9 PHB target PHBNFIR ACT1";
+        scomaddr    0x04010c47;
+        capture     group default;
+        capture     req nonzero("PHBNFIR");
+    };
+
+    ############################################################################
+    # P9 PHB target PCIFIR
+    ############################################################################
+
+    register PCIFIR
+    {
+        name        "P9 PHB target PCIFIR";
+        scomaddr    0x0d010840;
+        reset       (&, 0x0d010841);
+        mask        (|, 0x0d010845);
+        capture     group default;
+    };
+
+    register PCIFIR_MASK
+    {
+        name        "P9 PHB target PCIFIR MASK";
+        scomaddr    0x0d010843;
+        capture     group default;
+    };
+
+    register PCIFIR_ACT0
+    {
+        name        "P9 PHB target PCIFIR ACT0";
+        scomaddr    0x0d010846;
+        capture     group default;
+        capture     req nonzero("PCIFIR");
+    };
+
+    register PCIFIR_ACT1
+    {
+        name        "P9 PHB target PCIFIR ACT1";
+        scomaddr    0x0d010847;
+        capture     group default;
+        capture     req nonzero("PCIFIR");
+    };
+
+    ############################################################################
+    # P9 PHB target ETUFIR
+    ############################################################################
+
+    register ETUFIR
+    {
+        name        "P9 PHB target ETUFIR";
+        scomaddr    0x0d010908;
+        reset       (&, 0x0d010909);
+        mask        (|, 0x0d01090d);
+        capture     group default;
+    };
+
+    register ETUFIR_MASK
+    {
+        name        "P9 PHB target ETUFIR MASK";
+        scomaddr    0x0d01090b;
+        capture     group default;
+    };
+
+    register ETUFIR_ACT0
+    {
+        name        "P9 PHB target ETUFIR ACT0";
+        scomaddr    0x0d01090e;
+        capture     group default;
+        capture     req nonzero("ETUFIR");
+    };
+
+    register ETUFIR_ACT1
+    {
+        name        "P9 PHB target ETUFIR ACT1";
+        scomaddr    0x0d01090f;
+        capture     group default;
+        capture     req nonzero("ETUFIR");
+    };
+
+# Include registers not defined by the xml
+.include "p9_common_phb_regs.rule";
+
+};
+
+ ##############################################################################
+ #                                                                            #
+ # ####                                 #                                     #
+ # #   # #   # #    #####  ###      #  # #    ##  ##### ###  ###  #   #  ###  #
+ # #   # #   # #    #     #        #  #   #  #  #   #    #  #   # ##  # #     #
+ # ####  #   # #    ####   ###    #  ####### #      #    #  #   # # # #  ###  #
+ # #  #  #   # #    #         #  #   #     # #  #   #    #  #   # #  ##     # #
+ # #   #  ###  #### #####  ###  #    #     #  ##    #   ###  ###  #   #  ###  #
+ #                                                                            #
+ ##############################################################################
+
+################################################################################
+# Summary for PHB
+################################################################################
+
+rule rPHB
+{
+  CHECK_STOP:
+    summary( 0, rPHBNFIR ) |
+    summary( 1, rPCIFIR ) |
+    summary( 2, rETUFIR );
+
+  RECOVERABLE:
+    summary( 0, rPHBNFIR ) |
+    summary( 1, rPCIFIR ) |
+    summary( 2, rETUFIR );
+
+};
+
+group gPHB attntype CHECK_STOP, RECOVERABLE
+    filter singlebit
+{
+    (rPHB, bit(0)) ? analyzePHBNFIR;
+    (rPHB, bit(1)) ? analyzePCIFIR;
+    (rPHB, bit(2)) ? analyzeETUFIR;
+};
+
+################################################################################
+# P9 PHB target PHBNFIR
+################################################################################
+
+rule rPHBNFIR
+{
+  CHECK_STOP:
+    PHBNFIR & ~PHBNFIR_MASK & ~PHBNFIR_ACT0 & ~PHBNFIR_ACT1;
+  RECOVERABLE:
+    PHBNFIR & ~PHBNFIR_MASK & ~PHBNFIR_ACT0 &  PHBNFIR_ACT1;
+};
+
+group gPHBNFIR
+    filter singlebit,
+           cs_root_cause
+{
+    /** PHBNFIR[0]
+     *  BAR Parity Error
+     */
+    (rPHBNFIR, bit(0)) ? self_th_1;
+
+    /** PHBNFIR[1]
+     *  Parity Errors on Registers besides BAR
+     */
+    (rPHBNFIR, bit(1)) ? externalAttention;
+
+    /** PHBNFIR[2]
+     *  Power Bus to PEC CE
+     */
+    (rPHBNFIR, bit(2)) ? self_th_32perDay;
+
+    /** PHBNFIR[3]
+     *  Power Bus to PEC UE
+     */
+    (rPHBNFIR, bit(3)) ? externalAttention;
+
+    /** PHBNFIR[4]
+     *  Power Bus to PEC SUE
+     */
+    (rPHBNFIR, bit(4)) ? externalAttention;
+
+    /** PHBNFIR[5]
+     *  Array CE
+     */
+    (rPHBNFIR, bit(5)) ? self_th_32perDay;
+
+    /** PHBNFIR[6]
+     *  Array UE
+     */
+    (rPHBNFIR, bit(6)) ? externalAttention;
+
+    /** PHBNFIR[7]
+     *  Array SUE
+     */
+    (rPHBNFIR, bit(7)) ? externalAttention;
+
+    /** PHBNFIR[8]
+     *  Register Array Parity Error
+     */
+    (rPHBNFIR, bit(8)) ? self_th_1;
+
+    /** PHBNFIR[9]
+     *  Power Bus Interface Parity Error
+     */
+    (rPHBNFIR, bit(9)) ? self_th_1;
+
+    /** PHBNFIR[10]
+     *  Power Bus Data Hang
+     */
+    (rPHBNFIR, bit(10)) ? defaultMaskedError;
+
+    /** PHBNFIR[11]
+     *  Power Bus Hang
+     */
+    (rPHBNFIR, bit(11)) ? defaultMaskedError;
+
+    /** PHBNFIR[12]
+     *  RD ARE Error
+     */
+    (rPHBNFIR, bit(12)) ? externalAttention;
+
+    /** PHBNFIR[13]
+     *  NonRd ARE Error
+     */
+    (rPHBNFIR, bit(13)) ? externalAttention;
+
+    /** PHBNFIR[14]
+     *  PCI Hang
+     */
+    (rPHBNFIR, bit(14)) ? externalAttention;
+
+    /** PHBNFIR[15]
+     *  PCI Clock Error
+     */
+    (rPHBNFIR, bit(15)) ? externalAttention;
+
+    /** PHBNFIR[16]
+     *  AIB Fence
+     */
+    (rPHBNFIR, bit(16)) ? externalAttention;
+
+    /** PHBNFIR[17]
+     *  Hardware Error
+     */
+    (rPHBNFIR, bit(17)) ? self_th_1;
+
+    /** PHBNFIR[18]
+     *  Unsolicited Power Bus Data
+     */
+    (rPHBNFIR, bit(18)) ? level2_th_1;
+
+    /** PHBNFIR[19]
+     *  UnExpected Combined Response
+     */
+    (rPHBNFIR, bit(19)) ? level2_th_1;
+
+    /** PHBNFIR[20]
+     *  Invalid Combined Response
+     */
+    (rPHBNFIR, bit(20)) ? level2_M_proc_L_th_1;
+
+    /** PHBNFIR[21]
+     *  Power Bus Unsupported Size
+     */
+    (rPHBNFIR, bit(21)) ? level2_M_proc_L_th_1;
+
+    /** PHBNFIR[22]
+     *  Power Bus Unsupported Command
+     */
+    (rPHBNFIR, bit(22)) ? level2_M_proc_L_th_1;
+
+    /** PHBNFIR[23]
+     *  PBAIB error
+     */
+    (rPHBNFIR, bit(23)) ? externalAttention;
+
+    /** PHBNFIR[24]
+     *  CAPP Error
+     */
+    (rPHBNFIR, bit(24)) ? externalAttention;
+
+    /** PHBNFIR[25]
+     *  NMMU Error
+     */
+    (rPHBNFIR, bit(25)) ? externalAttention;
+
+    /** PHBNFIR[26]
+     *  Software Defined
+     */
+    (rPHBNFIR, bit(26)) ? externalAttention;
+
+    /** PHBNFIR[27]
+     *  PEC SCOM Engine Error
+     */
+    (rPHBNFIR, bit(27)) ? defaultMaskedError;
+
+    /** PHBNFIR[28]
+     *  scom error
+     */
+    (rPHBNFIR, bit(28)) ? defaultMaskedError;
+
+    /** PHBNFIR[29]
+     *  scom error
+     */
+    (rPHBNFIR, bit(29)) ? defaultMaskedError;
+
+};
+
+################################################################################
+# P9 PHB target PCIFIR
+################################################################################
+
+rule rPCIFIR
+{
+  CHECK_STOP:
+    PCIFIR & ~PCIFIR_MASK & ~PCIFIR_ACT0 & ~PCIFIR_ACT1;
+  RECOVERABLE:
+    PCIFIR & ~PCIFIR_MASK & ~PCIFIR_ACT0 &  PCIFIR_ACT1;
+};
+
+group gPCIFIR
+    filter singlebit,
+           cs_root_cause
+{
+    /** PCIFIR[0]
+     *  PBAIB register parity error
+     */
+    (rPCIFIR, bit(0)) ? externalAttention;
+
+    /** PCIFIR[1]
+     *  Hardware error
+     */
+    (rPCIFIR, bit(1)) ? self_th_1;
+
+    /** PCIFIR[2]
+     *  AIB interface error
+     */
+    (rPCIFIR, bit(2)) ? externalAttention;
+
+    /** PCIFIR[3]
+     *  ETU reset error
+     */
+    (rPCIFIR, bit(3)) ? externalAttention;
+
+    /** PCIFIR[4]
+     *  PEC scom error
+     */
+    (rPCIFIR, bit(4)) ? defaultMaskedError;
+
+    /** PCIFIR[5]
+     *  scom error
+     */
+    (rPCIFIR, bit(5)) ? defaultMaskedError;
+
+    /** PCIFIR[6]
+     *  scom error
+     */
+    (rPCIFIR, bit(6)) ? defaultMaskedError;
+
+};
+
+################################################################################
+# P9 PHB target ETUFIR
+################################################################################
+
+rule rETUFIR
+{
+  CHECK_STOP:
+    ETUFIR & ~ETUFIR_MASK & ~ETUFIR_ACT0 & ~ETUFIR_ACT1;
+  RECOVERABLE:
+    ETUFIR & ~ETUFIR_MASK & ~ETUFIR_ACT0 &  ETUFIR_ACT1;
+};
+
+group gETUFIR
+    filter singlebit,
+           cs_root_cause
+{
+    /** ETUFIR[0]
+     *  AIB_COMMAND_INVALID
+     */
+    (rETUFIR, bit(0)) ? defaultMaskedError;
+
+    /** ETUFIR[1]
+     *  AIB_ADDRESS_INVALID
+     */
+    (rETUFIR, bit(1)) ? defaultMaskedError;
+
+    /** ETUFIR[2]
+     *  AIB_ACCESS_ERROR
+     */
+    (rETUFIR, bit(2)) ? defaultMaskedError;
+
+    /** ETUFIR[3]
+     *  PAPR_OUTBOUND_INJECT_ERROR
+     */
+    (rETUFIR, bit(3)) ? defaultMaskedError;
+
+    /** ETUFIR[4]
+     *  AIB_FATAL_CLASS_ERROR
+     */
+    (rETUFIR, bit(4)) ? defaultMaskedError;
+
+    /** ETUFIR[5]
+     *  AIB_INF_CLASS_ERROR
+     */
+    (rETUFIR, bit(5)) ? defaultMaskedError;
+
+    /** ETUFIR[6]
+     *  spare
+     */
+    (rETUFIR, bit(6)) ? defaultMaskedError;
+
+    /** ETUFIR[7]
+     *  PE_STOP_STATE_SIGNALED
+     */
+    (rETUFIR, bit(7)) ? defaultMaskedError;
+
+    /** ETUFIR[8]
+     *  OUT_COMMON_ARRAY_FATAL_ERROR
+     */
+    (rETUFIR, bit(8)) ? defaultMaskedError;
+
+    /** ETUFIR[9]
+     *  OUT_COMMON_LATCH_FATAL_ERROR
+     */
+    (rETUFIR, bit(9)) ? defaultMaskedError;
+
+    /** ETUFIR[10]
+     *  OUT_COMMON_LOGIC_FATAL_ERROR
+     */
+    (rETUFIR, bit(10)) ? defaultMaskedError;
+
+    /** ETUFIR[11]
+     *  BLIF_OUT_INTERFACE_PARITY_ERROR
+     */
+    (rETUFIR, bit(11)) ? defaultMaskedError;
+
+    /** ETUFIR[12]
+     *  CFG_WRITE_CA_OR_UR_RESPONSE
+     */
+    (rETUFIR, bit(12)) ? defaultMaskedError;
+
+    /** ETUFIR[13]
+     *  MMIO_REQUEST_TIMEOUT
+     */
+    (rETUFIR, bit(13)) ? defaultMaskedError;
+
+    /** ETUFIR[14]
+     *  OUT_RRB_SOURCED_ERROR
+     */
+    (rETUFIR, bit(14)) ? defaultMaskedError;
+
+    /** ETUFIR[15]
+     *  CFG_LOGIC_SIGNALED_ERROR
+     */
+    (rETUFIR, bit(15)) ? defaultMaskedError;
+
+    /** ETUFIR[16]
+     *  RSB_REG_REQUEST_ADDRESS_ERROR
+     */
+    (rETUFIR, bit(16)) ? defaultMaskedError;
+
+    /** ETUFIR[17]
+     *  RSB_FDA_FATAL_ERROR
+     */
+    (rETUFIR, bit(17)) ? defaultMaskedError;
+
+    /** ETUFIR[18]
+     *  RSB_FDA_INF_ERROR
+     */
+    (rETUFIR, bit(18)) ? defaultMaskedError;
+
+    /** ETUFIR[19]
+     *  RSB_FDB_FATAL_ERROR
+     */
+    (rETUFIR, bit(19)) ? defaultMaskedError;
+
+    /** ETUFIR[20]
+     *  RSB_FDB_INF_ERROR
+     */
+    (rETUFIR, bit(20)) ? defaultMaskedError;
+
+    /** ETUFIR[21]
+     *  RSB_ERR_FATAL_ERROR
+     */
+    (rETUFIR, bit(21)) ? defaultMaskedError;
+
+    /** ETUFIR[22]
+     *  RSB_ERR_INF_ERROR
+     */
+    (rETUFIR, bit(22)) ? defaultMaskedError;
+
+    /** ETUFIR[23]
+     *  RSB_DBG_FATAL_ERROR
+     */
+    (rETUFIR, bit(23)) ? defaultMaskedError;
+
+    /** ETUFIR[24]
+     *  RSB_DBG_INF_ERROR
+     */
+    (rETUFIR, bit(24)) ? defaultMaskedError;
+
+    /** ETUFIR[25]
+     *  PCIE_REQUEST_ACCESS_ERROR
+     */
+    (rETUFIR, bit(25)) ? defaultMaskedError;
+
+    /** ETUFIR[26]
+     *  RSB_BUS_LOGIC_ERROR
+     */
+    (rETUFIR, bit(26)) ? defaultMaskedError;
+
+    /** ETUFIR[27]
+     *  RSB_UVI_FATAL_ERROR
+     */
+    (rETUFIR, bit(27)) ? defaultMaskedError;
+
+    /** ETUFIR[28]
+     *  RSB_UVI_INF_ERROR
+     */
+    (rETUFIR, bit(28)) ? defaultMaskedError;
+
+    /** ETUFIR[29]
+     *  SCOM_FATAL_ERROR
+     */
+    (rETUFIR, bit(29)) ? defaultMaskedError;
+
+    /** ETUFIR[30]
+     *  SCOM_INF_ERROR
+     */
+    (rETUFIR, bit(30)) ? defaultMaskedError;
+
+    /** ETUFIR[31]
+     *  PCIE_MACRO_ERROR_ACTIVE_STATUS
+     */
+    (rETUFIR, bit(31)) ? defaultMaskedError;
+
+    /** ETUFIR[32]
+     *  ARB_IODA_FATAL_ERROR
+     */
+    (rETUFIR, bit(32)) ? defaultMaskedError;
+
+    /** ETUFIR[33]
+     *  ARB_MSI_PE_MATCH_ERROR
+     */
+    (rETUFIR, bit(33)) ? defaultMaskedError;
+
+    /** ETUFIR[34]
+     *  ARB_MSI_ADDRESS_ERROR
+     */
+    (rETUFIR, bit(34)) ? defaultMaskedError;
+
+    /** ETUFIR[35]
+     *  ARB_TVT_ERROR
+     */
+    (rETUFIR, bit(35)) ? defaultMaskedError;
+
+    /** ETUFIR[36]
+     *  ARB_RCVD_FATAL_ERROR_MSG
+     */
+    (rETUFIR, bit(36)) ? defaultMaskedError;
+
+    /** ETUFIR[37]
+     *  ARB_RCVD_NONFATAL_ERROR_MSG
+     */
+    (rETUFIR, bit(37)) ? defaultMaskedError;
+
+    /** ETUFIR[38]
+     *  ARB_RCVD_CORRECTIBLE_ERROR_MSG
+     */
+    (rETUFIR, bit(38)) ? defaultMaskedError;
+
+    /** ETUFIR[39]
+     *  PAPR_INBOUND_INJECT_ERROR
+     */
+    (rETUFIR, bit(39)) ? defaultMaskedError;
+
+    /** ETUFIR[40]
+     *  ARB_COMMON_FATAL_ERROR
+     */
+    (rETUFIR, bit(40)) ? defaultMaskedError;
+
+    /** ETUFIR[41]
+     *  ARB_TABLE_BAR_DISABLED_ERROR
+     */
+    (rETUFIR, bit(41)) ? defaultMaskedError;
+
+    /** ETUFIR[42]
+     *  ARB_BLIF_COMPLETION_ERROR
+     */
+    (rETUFIR, bit(42)) ? defaultMaskedError;
+
+    /** ETUFIR[43]
+     *  ARB_PCT_TIMEOUT_ERROR
+     */
+    (rETUFIR, bit(43)) ? defaultMaskedError;
+
+    /** ETUFIR[44]
+     *  ARB_ECC_CORRECTABLE_ERROR
+     */
+    (rETUFIR, bit(44)) ? defaultMaskedError;
+
+    /** ETUFIR[45]
+     *  ARB_ECC_UNCORRECTABLE_ERROR
+     */
+    (rETUFIR, bit(45)) ? defaultMaskedError;
+
+    /** ETUFIR[46]
+     *  ARB_TLP_POISON_SIGNALED
+     */
+    (rETUFIR, bit(46)) ? defaultMaskedError;
+
+    /** ETUFIR[47]
+     *  ARB_RTT_PENUM_INVALID_ERROR
+     */
+    (rETUFIR, bit(47)) ? defaultMaskedError;
+
+    /** ETUFIR[48]
+     *  MRG_COMMON_FATAL_ERROR
+     */
+    (rETUFIR, bit(48)) ? defaultMaskedError;
+
+    /** ETUFIR[49]
+     *  MRG_TABLE_BAR_DISABLED_ERROR
+     */
+    (rETUFIR, bit(49)) ? defaultMaskedError;
+
+    /** ETUFIR[50]
+     *  MRG_ECC_CORRECTABLE_ERROR
+     */
+    (rETUFIR, bit(50)) ? defaultMaskedError;
+
+    /** ETUFIR[51]
+     *  MRG_ECC_UNCORRECTABLE_ERROR
+     */
+    (rETUFIR, bit(51)) ? defaultMaskedError;
+
+    /** ETUFIR[52]
+     *  MRG_AIB2_TX_TIMEOUT_ERROR
+     */
+    (rETUFIR, bit(52)) ? defaultMaskedError;
+
+    /** ETUFIR[53]
+     *  MRG_MRT_ERROR
+     */
+    (rETUFIR, bit(53)) ? defaultMaskedError;
+
+    /** ETUFIR[54:55]
+     *  spare
+     */
+    (rETUFIR, bit(54|55)) ? defaultMaskedError;
+
+    /** ETUFIR[56]
+     *  TCE_IODA_PAGE_ACCESS_ERROR
+     */
+    (rETUFIR, bit(56)) ? defaultMaskedError;
+
+    /** ETUFIR[57]
+     *  TCE_REQUEST_TIMEOUT_ERROR
+     */
+    (rETUFIR, bit(57)) ? defaultMaskedError;
+
+    /** ETUFIR[58]
+     *  TCE_UNEXPECTED_RESPONSE_ERROR
+     */
+    (rETUFIR, bit(58)) ? defaultMaskedError;
+
+    /** ETUFIR[59]
+     *  TCE_COMMON_FATAL_ERROR
+     */
+    (rETUFIR, bit(59)) ? defaultMaskedError;
+
+    /** ETUFIR[60]
+     *  TCE_ECC_CORRECTABLE_ERROR
+     */
+    (rETUFIR, bit(60)) ? defaultMaskedError;
+
+    /** ETUFIR[61]
+     *  TCE_ECC_UNCORRECTABLE_ERROR
+     */
+    (rETUFIR, bit(61)) ? defaultMaskedError;
+
+    /** ETUFIR[62]
+     *  spare
+     */
+    (rETUFIR, bit(62)) ? defaultMaskedError;
+
+    /** ETUFIR[63]
+     *  FIR_INTERNAL_PARITY_ERROR
+     */
+    (rETUFIR, bit(63)) ? defaultMaskedError;
+
+};
+
+ ##############################################################################
+ #                                                                            #
+ #    #                                  ###                                  #
+ #   # #    ##  ##### ###  ###  #   #   #   # #     #    ###   ###  ###  ###  #
+ #  #   #  #  #   #    #  #   # ##  #   #     #    # #  #     #     #   #     #
+ # ####### #      #    #  #   # # # #   #     #   #####  ###   ###  ##   ###  #
+ # #     # #  #   #    #  #   # #  ##   #   # #   #   #     #     # #       # #
+ # #     #  ##    #   ###  ###  #   #    ###  ### #   #  ###   ###  ###  ###  #
+ #                                                                            #
+ ##############################################################################
+
+# Include the actions defined for this target
+.include "p9_common_actions.rule";
+.include "p9_common_phb_actions.rule";
+